From patchwork Fri Aug 13 22:55:33 2010
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Subject: Add FEATURE_WRSR_WREN to feature_bits for all supported Macronix SPI
	flash chips
Date: Fri, 13 Aug 2010 21:55:33 -0000
From: David Hendricks <dhendrix@google.com>
X-Patchwork-Id: 1742
Message-Id: <AANLkTik_WJXXsQE7qAKWRd+GkeXFpE+wheyQ0Hyg8b_X@mail.gmail.com>
To: flashrom <flashrom@flashrom.org>

This patch adds the FEATURE_WRSR_WREN bit to the feature_bits for all
supported Macronix SPI flash chips.

FWIW, the datasheets I used were for the MX25L1005/2005/4005/8005,
MX25L1605D/3205D/6405D, MX25L3235D, MX25L512, MX25L2805D. All of them
specify in the exact same wording that "Before sending WRSR instruction,
the Write Enable (WREN) instruction must be decoded and executed to set the
Write Enable Latch (WEL) bit in advance."

Signed-off-by: David Hendricks <dhendrix@google.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>


Index: flashrom-head/flashchips.c
===================================================================
--- flashrom-head.orig/flashchips.c
+++ flashrom-head/flashchips.c
@@ -3383,6 +3383,7 @@ struct flashchip flashchips[] = {
 		.model_id	= MX_25L512,
 		.total_size	= 64,
 		.page_size	= 256,
+		.feature_bits	= FEATURE_WRSR_WREN,
 		.tested		= TEST_UNTESTED,
 		.probe		= probe_spi_rdid,
 		.probe_timing	= TIMING_ZERO,
@@ -3418,6 +3419,7 @@ struct flashchip flashchips[] = {
 		.model_id	= MX_25L1005,
 		.total_size	= 128,
 		.page_size	= 256,
+		.feature_bits	= FEATURE_WRSR_WREN,
 		.tested		= TEST_UNTESTED,
 		.probe		= probe_spi_rdid,
 		.probe_timing	= TIMING_ZERO,
@@ -3450,6 +3452,7 @@ struct flashchip flashchips[] = {
 		.model_id	= MX_25L2005,
 		.total_size	= 256,
 		.page_size	= 256,
+		.feature_bits	= FEATURE_WRSR_WREN,
 		.tested		= TEST_UNTESTED,
 		.probe		= probe_spi_rdid,
 		.probe_timing	= TIMING_ZERO,
@@ -3485,6 +3488,7 @@ struct flashchip flashchips[] = {
 		.model_id	= MX_25L4005,
 		.total_size	= 512,
 		.page_size	= 256,
+		.feature_bits	= FEATURE_WRSR_WREN,
 		.tested		= TEST_OK_PRW,
 		.probe		= probe_spi_rdid,
 		.probe_timing	= TIMING_ZERO,
@@ -3520,6 +3524,7 @@ struct flashchip flashchips[] = {
 		.model_id	= MX_25L8005,
 		.total_size	= 1024,
 		.page_size	= 256,
+		.feature_bits	= FEATURE_WRSR_WREN,
 		.tested		= TEST_OK_PREW,
 		.probe		= probe_spi_rdid,
 		.probe_timing	= TIMING_ZERO,
@@ -3555,6 +3560,7 @@ struct flashchip flashchips[] = {
 		.model_id	= MX_25L1605,
 		.total_size	= 2048,
 		.page_size	= 256,
+		.feature_bits	= FEATURE_WRSR_WREN,
 		.tested		= TEST_OK_PRW,
 		.probe		= probe_spi_rdid,
 		.probe_timing	= TIMING_ZERO,
@@ -3590,6 +3596,7 @@ struct flashchip flashchips[] = {
 		.model_id	= MX_25L1635D,
 		.total_size	= 2048,
 		.page_size	= 256,
+		.feature_bits	= FEATURE_WRSR_WREN,
 		.tested		= TEST_UNTESTED,
 		.probe		= probe_spi_rdid,
 		.probe_timing	= TIMING_ZERO,
@@ -3622,6 +3629,7 @@ struct flashchip flashchips[] = {
 		.model_id	= MX_25L3205,
 		.total_size	= 4096,
 		.page_size	= 256,
+		.feature_bits	= FEATURE_WRSR_WREN,
 		.tested		= TEST_OK_PRW,
 		.probe		= probe_spi_rdid,
 		.probe_timing	= TIMING_ZERO,
@@ -3654,6 +3662,7 @@ struct flashchip flashchips[] = {
 		.model_id	= MX_25L3235D,
 		.total_size	= 4096,
 		.page_size	= 256,
+		.feature_bits	= FEATURE_WRSR_WREN,
 		.tested		= TEST_UNTESTED,
 		.probe		= probe_spi_rdid,
 		.probe_timing	= TIMING_ZERO,
@@ -3686,6 +3695,7 @@ struct flashchip flashchips[] = {
 		.model_id	= MX_25L6405,
 		.total_size	= 8192,
 		.page_size	= 256,
+		.feature_bits	= FEATURE_WRSR_WREN,
 		.tested		= TEST_OK_PROBE,
 		.probe		= probe_spi_rdid,
 		.probe_timing	= TIMING_ZERO,
@@ -3718,6 +3728,7 @@ struct flashchip flashchips[] = {
 		.model_id	= MX_25L12805,
 		.total_size	= 16384,
 		.page_size	= 256,
+		.feature_bits	= FEATURE_WRSR_WREN,
 		.tested		= TEST_UNTESTED,
 		.probe		= probe_spi_rdid,
 		.probe_timing	= TIMING_ZERO,