Patchwork MSI K9VGM-V(MS-7253)....

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Submitter Rudolf Marek
Date 2010-03-04 22:17:35
Message ID <4B90317F.6090800@assembler.cz>
Download mbox | patch
Permalink /patch/1006/
State New
Headers show

Comments

Rudolf Marek - 2010-03-04 22:17:35
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Hi,

I somehow automated the checks for differences between VT8237S and VT8237A. They
look very very similar. I even hacked a coreboot for you. If we are VERY lucky
it can boot linux ;)

I'm attaching the patch. I put for you whole tree on
assembler.cz/coreboot-K9VGM-V.tgz

You now have to use the board M2V-MX SE, it contains already changed serial.

I generated the image for a flash in build/coreboot.rom

It contains an image with SeaBIOS and needs a serial line on 115200 bauds
connected to see something.

Please try. Be sure you can recover if your image does not work!!!! (like from
bad flash of BIOS) Handy would be second flash and hot swap and burn to new one
(so you can use orig bios as backup solution ;)

Please can you post

lspci -xxx -vvv

Because I'm just unsure about one settings of LPC bridge. Maybe you will need to
change the 0x58 register to some other value then 0x43 see the comment in the patch.

SATA may or may not work don't know. Otherwise it looks promissing, but from now
treat the stuff like nothing works and a lot of things may work ;)

Rudolf






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Patch

Index: src/southbridge/via/vt8237r/vt8237_ctrl.c
===================================================================
--- src/southbridge/via/vt8237r/vt8237_ctrl.c	(revision 5184)
+++ src/southbridge/via/vt8237r/vt8237_ctrl.c	(working copy)
@@ -183,6 +183,9 @@ 
 	 */
 	device_t devsb = dev_find_device(PCI_VENDOR_ID_VIA,
 					 PCI_DEVICE_ID_VIA_VT8237S_LPC, 0);
+
+	/* this needs to be fixed but we leave it as it is now vlink can be done later */
+
 	if (devsb) {
 		vt8237s_vlink_init(dev);
 	}
Index: src/southbridge/via/vt8237r/vt8237r_early_smbus.c
===================================================================
--- src/southbridge/via/vt8237r/vt8237r_early_smbus.c	(revision 5184)
+++ src/southbridge/via/vt8237r/vt8237r_early_smbus.c	(working copy)
@@ -139,11 +139,22 @@ 
 	/* Power management controller */
 	dev = pci_locate_device(PCI_ID(PCI_VENDOR_ID_VIA,
 				       PCI_DEVICE_ID_VIA_VT8237R_LPC), 0);
+
+
 	if (dev == PCI_DEV_INVALID) {
 		/* Power management controller */
 		dev = pci_locate_device(PCI_ID(PCI_VENDOR_ID_VIA,
 					PCI_DEVICE_ID_VIA_VT8237S_LPC), 0);
-		if (dev == PCI_DEV_INVALID)
+	}
+
+	if (dev == PCI_DEV_INVALID) {
+		/* Power management controller */
+		dev = pci_locate_device(PCI_ID(PCI_VENDOR_ID_VIA,
+					PCI_DEVICE_ID_VIA_VT8237A_LPC), 0);
+	}
+
+
+	if (dev == PCI_DEV_INVALID) {
 			die("Power management controller not found\r\n");
 	}
 
@@ -224,6 +235,8 @@ 
 {
 	device_t dev, devctl;
 
+/* this may need fix */
+
 	/* Power management controller */
 	dev = pci_locate_device(PCI_ID(PCI_VENDOR_ID_VIA,
 				       PCI_DEVICE_ID_VIA_VT8237R_LPC), 0);
@@ -282,14 +295,22 @@ 
 	/* Power management controller */
 	dev = pci_locate_device(PCI_ID(PCI_VENDOR_ID_VIA,
 				       PCI_DEVICE_ID_VIA_VT8237R_LPC), 0);
+
 	if (dev == PCI_DEV_INVALID) {
 		/* Power management controller */
 		dev = pci_locate_device(PCI_ID(PCI_VENDOR_ID_VIA,
 					PCI_DEVICE_ID_VIA_VT8237S_LPC), 0);
-		if (dev == PCI_DEV_INVALID)
-			return;
 	}
 
+	if (dev == PCI_DEV_INVALID) {
+		/* Power management controller */
+		dev = pci_locate_device(PCI_ID(PCI_VENDOR_ID_VIA,
+					PCI_DEVICE_ID_VIA_VT8237A_LPC), 0);
+	}
+
+	if (dev == PCI_DEV_INVALID)
+			return;
+
 	/* ROM decode last 1MB FFC00000 - FFFFFFFF. */
 	pci_write_config8(dev, 0x41, 0x7f);
 }
@@ -305,14 +326,22 @@ 
 	/* Power management controller */
 	dev = pci_locate_device(PCI_ID(PCI_VENDOR_ID_VIA,
 				       PCI_DEVICE_ID_VIA_VT8237R_LPC), 0);
+
 	if (dev == PCI_DEV_INVALID) {
 		/* Power management controller */
 		dev = pci_locate_device(PCI_ID(PCI_VENDOR_ID_VIA,
 					PCI_DEVICE_ID_VIA_VT8237S_LPC), 0);
-		if (dev == PCI_DEV_INVALID)
-			die("Power management controller not found\r\n");
 	}
 
+	if (dev == PCI_DEV_INVALID) {
+		/* Power management controller */
+		dev = pci_locate_device(PCI_ID(PCI_VENDOR_ID_VIA,
+					PCI_DEVICE_ID_VIA_VT8237A_LPC), 0);
+	}
+
+	if (dev == PCI_DEV_INVALID)
+		die("Power management controller not found\r\n");
+
 	/* Set ACPI base address to I/O VT8237R_ACPI_IO_BASE. */
 	pci_write_config16(dev, 0x88, VT8237R_ACPI_IO_BASE | 0x1);
 
Index: src/southbridge/via/vt8237r/vt8237_fadt.c
===================================================================
--- src/southbridge/via/vt8237r/vt8237_fadt.c	(revision 5184)
+++ src/southbridge/via/vt8237r/vt8237_fadt.c	(working copy)
@@ -42,6 +42,15 @@ 
 	if (dev)
 		is_vt8237s = 1;
 
+	/* Power management controller */
+	dev = dev_find_device(PCI_VENDOR_ID_VIA,
+				PCI_DEVICE_ID_VIA_VT8237A_LPC, 0);
+
+	/* A is the same */
+	if (dev)
+		is_vt8237s = 1;
+
+
 	memset((void *) fadt, 0, sizeof(acpi_fadt_t));
 	memcpy(header->signature, "FACP", 4);
 	header->length = 244;
Index: src/southbridge/via/vt8237r/vt8237r_lpc.c
===================================================================
--- src/southbridge/via/vt8237r/vt8237r_lpc.c	(revision 5184)
+++ src/southbridge/via/vt8237r/vt8237r_lpc.c	(working copy)
@@ -352,8 +352,12 @@ 
 	 * Allow SLP# signal to assert LDTSTOP_L.
 	 * Will work for C3 and for FID/VID change. FIXME FIXME, pre rev A2.
 	 */
-	outb(0xff, VT8237R_ACPI_IO_BASE + 0x50);
+//	outb(0xff, VT8237R_ACPI_IO_BASE + 0x50);
 
+	/* this may need a fix for powernow should go to some A tree*/
+	outb(0x1, VT8237R_ACPI_IO_BASE + 0x11);
+
+
 	dump_south(dev);
 }
 
@@ -446,6 +450,8 @@ 
 	pci_write_config8(dev, 0x5b, 0xb);
 
 	/* Set 0x58 to 0x43 APIC and RTC. */
+
+	//FIX this reg use orig value it may be just 0x3?
 	pci_write_config8(dev, 0x58, 0x43);
 
 	/* Enable serial IRQ, 6PCI clocks. */
@@ -534,6 +540,15 @@ 
 	init_keyboard(dev);
 }
 
+static const struct device_operations vt8237r_lpc_ops_a = {
+	.read_resources		= vt8237r_read_resources,
+	.set_resources		= pci_dev_set_resources,
+	.enable_resources	= vt8237r_enable_resources,
+	.init			= &vt8237s_init,
+	.scan_bus		= scan_static_bus,
+};
+
+
 static const struct device_operations vt8237r_lpc_ops_s = {
 	.read_resources		= vt8237r_read_resources,
 	.set_resources		= pci_dev_set_resources,
@@ -561,3 +576,9 @@ 
 	.vendor	= PCI_VENDOR_ID_VIA,
 	.device	= PCI_DEVICE_ID_VIA_VT8237S_LPC,
 };
+
+static const struct pci_driver lpc_driver_a __pci_driver = {
+	.ops	= &vt8237r_lpc_ops_a,
+	.vendor	= PCI_VENDOR_ID_VIA,
+	.device	= PCI_DEVICE_ID_VIA_VT8237A_LPC,
+};
Index: src/include/device/pci_ids.h
===================================================================
--- src/include/device/pci_ids.h	(revision 5184)
+++ src/include/device/pci_ids.h	(working copy)
@@ -1186,6 +1186,7 @@ 
 #define PCI_DEVICE_ID_VIA_K8T890CE_PEX3	0xf238
 #define PCI_DEVICE_ID_VIA_K8T890CE_BR	0xb188
 #define PCI_DEVICE_ID_VIA_VT6420_SATA	0x3149
+#define PCI_DEVICE_ID_VIA_VT8237A_LPC	0x3337
 #define PCI_DEVICE_ID_VIA_VT8237R_LPC	0x3227
 #define PCI_DEVICE_ID_VIA_VT8237S_LPC	0x3372
 #define PCI_DEVICE_ID_VIA_VT8237_SATA	0x5372
Index: src/mainboard/asus/m2v-mx_se/romstage.c
===================================================================
--- src/mainboard/asus/m2v-mx_se/romstage.c	(revision 5184)
+++ src/mainboard/asus/m2v-mx_se/romstage.c	(working copy)
@@ -66,15 +66,18 @@ 
 #include "northbridge/amd/amdk8/reset_test.c"
 #include "northbridge/amd/amdk8/debug.c"
 #include "northbridge/amd/amdk8/early_ht.c"
-#include "superio/ite/it8712f/it8712f_early_serial.c"
+#include "superio/winbond/w83627ehg/w83627ehg_early_serial.c"
+//#include "superio/ite/it8712f/it8712f_early_serial.c"
 #include "southbridge/via/vt8237r/vt8237r_early_smbus.c"
 #include "cpu/amd/mtrr/amd_earlymtrr.c"
 #include "cpu/x86/bist.h"
 #include "northbridge/amd/amdk8/setup_resource_map.c"
 
-#define SERIAL_DEV PNP_DEV(0x2e, IT8712F_SP1)
-#define WATCHDOG_DEV PNP_DEV(0x2e, IT8712F_GPIO)
+#define SERIAL_DEV PNP_DEV(0x2e, W83627EHG_SP1)
 
+//#define SERIAL_DEV PNP_DEV(0x2e, IT8712F_SP1)
+//#define WATCHDOG_DEV PNP_DEV(0x2e, IT8712F_GPIO)
+
 static void memreset_setup(void)
 {
 }
@@ -153,7 +156,7 @@ 
 	device_t dev;
 
 	dev = pci_locate_device_on_bus(PCI_ID(PCI_VENDOR_ID_VIA,
-					PCI_DEVICE_ID_VIA_VT8237R_LPC), bus);
+					PCI_DEVICE_ID_VIA_VT8237A_LPC), bus);
 	return (dev >> 15) & 0x1f;
 }
 
@@ -188,9 +191,10 @@ 
 	u8 reg;
 
 	sio_init();
-	it8712f_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
-	it8712f_kill_watchdog();
-	it8712f_enable_3vsbsw();
+	w83627ehg_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
+
+//	it8712f_kill_watchdog();
+//	it8712f_enable_3vsbsw();
 	uart_init();
 	console_init();
 	enable_rom_decode();
Index: src/mainboard/asus/m2v-mx_se/mainboard.c
===================================================================
--- src/mainboard/asus/m2v-mx_se/mainboard.c	(revision 5184)
+++ src/mainboard/asus/m2v-mx_se/mainboard.c	(working copy)
@@ -38,12 +38,6 @@ 
 					    res->size);
 	}
 
-#if CONFIG_HAVE_ACPI_RESUME == 1
-	lb_add_memory_range(mem, LB_MEM_RESERVED,
-		CONFIG_RAMBASE, ((CONFIG_RAMTOP) - CONFIG_RAMBASE));
-	lb_add_memory_range(mem, LB_MEM_RESERVED,
-		CONFIG_DCACHE_RAM_BASE, CONFIG_DCACHE_RAM_SIZE);
-#endif
 	return 0;
 }