Submitter | Bao, Zheng |
---|---|
Date | 2010-03-16 08:34:56 |
Message ID | <DD1CC71B621B004FA76856E5129D6B170388AE0D@sbjgexmb1.amd.com> |
Download | mbox | patch |
Permalink | /patch/1069/ |
State | New |
Headers | show |
Comments
On Tue, Mar 16, 2010 at 2:34 AM, Bao, Zheng <Zheng.Bao@amd.com> wrote: > This patch configures the toppology of rs780 graphics. The new > gfx_dual_slot option 2 is for the board which can configure the > double/single mode. In that case, we need to know whether a device > is plugged behind DEV 3. So the is_dev3_present() is needed. > This doesn't help mahogany much. You will need in the future. > > Add an option for HDMI display. If you need it, just uncomment it. > > + vgainfo.ulDDISlot1Config = 0x000c0011; //0; //VGA >+ //vgainfo.ulDDISlot1Config = 0x000c00FF; //0; //HDMI Instead of requiring it to be uncommented in the sb source code, can it be a mainboard device option in devicetree.cb like the gpp_configuration? Marc
Patch
Index: src/mainboard/amd/mahogany_fam10/mainboard.c =================================================================== --- src/mainboard/amd/mahogany_fam10/mainboard.c (revision 5223) +++ src/mainboard/amd/mahogany_fam10/mainboard.c (working copy) @@ -35,6 +35,12 @@ uint64_t uma_memory_base, uma_memory_size; +/* This function is stub for mahogany. */ +u8 is_dev3_present() +{ + return 0; +} + /* * Mahogany uses GPIO 6 as PCIe slot reset, GPIO4 as GFX slot reset. We need to * pull it up before training the slot. Index: src/mainboard/amd/mahogany_fam10/mainboard.c =================================================================== --- src/mainboard/amd/mahogany_fam10/mainboard.c (revision 5223) +++ src/mainboard/amd/mahogany_fam10/mainboard.c (working copy) @@ -35,6 +35,12 @@ uint64_t uma_memory_base, uma_memory_size; +/* This function is stub for mahogany. */ +u8 is_dev3_present() +{ + return 0; +} + /* * Mahogany uses GPIO 6 as PCIe slot reset, GPIO4 as GFX slot reset. We need to * pull it up before training the slot. Index: src/southbridge/amd/rs780/rs780_gfx.c =================================================================== --- src/southbridge/amd/rs780/rs780_gfx.c (revision 5223) +++ src/southbridge/amd/rs780/rs780_gfx.c (working copy) @@ -37,6 +37,7 @@ void set_pcie_reset(); void set_pcie_dereset(); +u8 is_dev3_present(); #define CLK_CNTL_INDEX 0x8 #define CLK_CNTL_DATA 0xC @@ -430,7 +431,8 @@ //vgainfo.ulSystemConfig |= 1<<1 | 1<<3 | 1<<4 | 1<<5 | 1<<6 | 1<<7 | 1; vgainfo.ulBootUpReqDisplayVector = 0; //? vgainfo.ulOtherDisplayMisc = 0; //? - vgainfo.ulDDISlot1Config = 0x000c0011; //0; //? + vgainfo.ulDDISlot1Config = 0x000c0011; //0; //VGA + //vgainfo.ulDDISlot1Config = 0x000c00FF; //0; //HDMI vgainfo.ulDDISlot2Config = 0x00130022; //0; //? vgainfo.ucMemoryType = 2;