| Submitter | Maximilian Thuermer |
|---|---|
| Date | 2010-03-18 16:43:44 |
| Message ID | <4BA25840.3010708@ziti.uni-heidelberg.de> |
| Download | mbox | patch |
| Permalink | /patch/1087/ |
| State | Superseded |
| Headers | show |
Comments
On 3/18/10 5:43 PM, Maximilian Thuermer wrote: > Hi all, > > I am working with a Tyan S2912 board and fam10 Opterons and > recently updated my coreboot environment. I stumbled across > an error which I thought was already removed a while ago. > The HT link offsets reported by function "AMD_CpuFindCapability" in > init_cpus.c > are not correct (they always evaluate to 0x08) and therefore do not > comply with link offsets as specified by AMDs BKDG. > Below is a simple fix which produces correct behavior - at least on my > box. > Dont know what side effects this might have on systems other than the PHY > electrical settings and erratas not getting applied. > Looks good to me.. We can check it in as soon as we have a good Sign-off... http://www.coreboot.org/Development_Guidelines#Sign-off_Procedure
On Fri, Mar 19, 2010 at 8:43 AM, Stefan Reinauer <stepan@coresystems.de> wrote: > On 3/18/10 5:43 PM, Maximilian Thuermer wrote: >> Hi all, >> >> I am working with a Tyan S2912 board and fam10 Opterons and >> recently updated my coreboot environment. I stumbled across >> an error which I thought was already removed a while ago. >> The HT link offsets reported by function "AMD_CpuFindCapability" in >> init_cpus.c >> are not correct (they always evaluate to 0x08) and therefore do not >> comply with link offsets as specified by AMDs BKDG. >> Below is a simple fix which produces correct behavior - at least on my >> box. >> Dont know what side effects this might have on systems other than the PHY >> electrical settings and erratas not getting applied. >> > Looks good to me.. We can check it in as soon as we have a good Sign-off... > > http://www.coreboot.org/Development_Guidelines#Sign-off_Procedure I agree, this change looks right. Marc
Patch
Index: src/cpu/amd/model_10xxx/init_cpus.c =================================================================== --- src/cpu/amd/model_10xxx/init_cpus.c (revision 5256) +++ src/cpu/amd/model_10xxx/init_cpus.c (working copy) @@ -702,29 +702,32 @@ */ BOOL AMD_CpuFindCapability (u8 node, u8 cap_count, u8 *offset) { + u32 reg; u32 val; - + /* get start of CPU HT Host Capabilities */ val = pci_read_config32(NODE_PCI(node, 0), 0x34); - val &= 0xFF; + val &= 0xFF; //reg offset of first link cap_count++; /* Traverse through the capabilities. */ do { - val = pci_read_config32(NODE_PCI(node, 0), val); + reg = pci_read_config32(NODE_PCI(node, 0), val); /* Is the capability block a HyperTransport capability block? */ - if ((val & 0xFF) == 0x08) { + if ((reg & 0xFF) == 0x08) { /* Is the HT capability block an HT Host Capability? */ - if ((val & 0xE0000000) == (1 << 29)) + if ((reg & 0xE0000000) == (1 << 29)) cap_count--; } - if (cap_count) - val = (val >> 8) & 0xFF; + + if(cap_count) + val = (reg >> 8) & 0xFF; //update reg offset } while (cap_count && val); *offset = (u8) val; + /* If requested capability found val != 0 */
Hi all, I am working with a Tyan S2912 board and fam10 Opterons and recently updated my coreboot environment. I stumbled across an error which I thought was already removed a while ago. The HT link offsets reported by function "AMD_CpuFindCapability" in init_cpus.c are not correct (they always evaluate to 0x08) and therefore do not comply with link offsets as specified by AMDs BKDG. Below is a simple fix which produces correct behavior - at least on my box. Dont know what side effects this might have on systems other than the PHY electrical settings and erratas not getting applied. Best regards, Maximilian Thuermer if (!cap_count) return TRUE;