| Submitter | Patrick Georgi |
|---|---|
| Date | 2010-04-09 21:43:03 |
| Message ID | <4BBF9F67.6090702@georgi-clan.de> |
| Download | mbox | patch |
| Permalink | /patch/1214/ |
| State | Accepted |
| Commit | r5409 |
| Headers | show |
Comments
On Fri, Apr 09, 2010 at 11:43:03PM +0200, Patrick Georgi wrote: > Hi, > > attached patch does: > - move the XIP_ROM_* flags to src/cpu/x86/Kconfig exclusively > - set them to span the last 64k, instead of the last 128k > by default > - fixes via CAR for tiny bootblock > - enabled tiny bootblock for via/vt8454c > > Other C7 based boards should be simple to adapt, too. They will however > require some refactoring if ROM mappings must be configured. Looks correct to me. (If I'm allowed to ack, then I ack.) -Kevin
> > On Fri, Apr 09, 2010 at 11:43:03PM +0200, Patrick Georgi wrote: > >> Hi, >> >> attached patch does: >> - move the XIP_ROM_* flags to src/cpu/x86/Kconfig exclusively >> - set them to span the last 64k, instead of the last 128k >> by default >> - fixes via CAR for tiny bootblock >> - enabled tiny bootblock for via/vt8454c >> >> Other C7 based boards should be simple to adapt, too. They will however >> require some refactoring if ROM mappings must be configured. >> > Looks correct to me. (If I'm allowed to ack, then I ack.) > > Yes, of course you are! me too. Acked-by: Stefan Reinauer <stepan@coresystems.de>
Patch
Index: src/Kconfig =================================================================== --- src/Kconfig (revision 5399) +++ src/Kconfig (working copy) @@ -116,14 +116,6 @@ int default 36 -config XIP_ROM_BASE - hex - default 0xfffe0000 - -config XIP_ROM_SIZE - hex - default 0x20000 - config LOGICAL_CPUS bool default y Index: src/cpu/via/car/cache_as_ram.inc =================================================================== --- src/cpu/via/car/cache_as_ram.inc (revision 5399) +++ src/cpu/via/car/cache_as_ram.inc (working copy) @@ -139,7 +139,7 @@ xorl $0x5c5c5c5c,%eax rep stosl - movl CONFIG_XIP_ROM_BASE, %esi + movl REAL_XIP_ROM_BASE, %esi movl %esi, %edi movl $(CONFIG_XIP_ROM_SIZE>>2), %ecx rep lodsl @@ -241,10 +241,10 @@ movl $((~(( 0 + 0x40000) - 1)) | 0x800), %eax wrmsr - /* cache CONFIG_XIP_ROM_BASE-SIZE to speedup coreboot code */ + /* cache XIP_ROM_BASE-SIZE to speedup coreboot code */ movl $0x206, %ecx xorl %edx, %edx - movl $CONFIG_XIP_ROM_BASE,%eax + movl $REAL_XIP_ROM_BASE,%eax orl $(0 | 6), %eax wrmsr Index: src/cpu/x86/Kconfig =================================================================== --- src/cpu/x86/Kconfig (revision 5399) +++ src/cpu/x86/Kconfig (working copy) @@ -25,8 +25,8 @@ config XIP_ROM_BASE hex - default 0xfffe0000 + default 0xffff0000 config XIP_ROM_SIZE hex - default 0x20000 + default 0x10000 Index: src/mainboard/via/vt8454c/Kconfig =================================================================== --- src/mainboard/via/vt8454c/Kconfig (revision 5399) +++ src/mainboard/via/vt8454c/Kconfig (working copy) @@ -12,6 +12,7 @@ select HAVE_ACPI_TABLES select BOARD_ROMSIZE_KB_512 select USE_DCACHE_RAM + select TINY_BOOTBLOCK config MAINBOARD_DIR string
Hi, attached patch does: - move the XIP_ROM_* flags to src/cpu/x86/Kconfig exclusively - set them to span the last 64k, instead of the last 128k by default - fixes via CAR for tiny bootblock - enabled tiny bootblock for via/vt8454c Other C7 based boards should be simple to adapt, too. They will however require some refactoring if ROM mappings must be configured. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>