From patchwork Mon Apr 12 21:36:06 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Subject: warning days - m57sli/mcp55 Date: Mon, 12 Apr 2010 21:36:06 -0000 From: Ward Vandewege X-Patchwork-Id: 1231 Message-Id: <20100412213606.GA18071@countzero.vandewege.net> To: coreboot@coreboot.org If there are better ways to kill the warnings, please let me know! Thanks, Ward. This fixes a number of warnings when building m57sli (and other boards with mcp55). This patch is boot tested on m57sli. What appears to be a shortening of the delay in src/southbridge/nvidia/mcp55/mcp55_early_setup_car.c is functionally exactly the same as before; the delayx function takes a uint8_t argument, so the old value (1000 - 0x3E8) was truncated to 232 (0xE8). Signed-off-by: Ward Vandewege Index: src/southbridge/nvidia/mcp55/mcp55_fadt.c =================================================================== --- src/southbridge/nvidia/mcp55/mcp55_fadt.c (revision 5411) +++ src/southbridge/nvidia/mcp55/mcp55_fadt.c (working copy) @@ -51,8 +51,8 @@ printk(BIOS_INFO, "ACPI: pm_base: %u...\n", pm_base); - fadt->firmware_ctrl = facs; - fadt->dsdt = dsdt; + fadt->firmware_ctrl = (u32) facs; + fadt->dsdt = (u32) dsdt; fadt->preferred_pm_profile = 1; //check fadt->sci_int = 9; /* disable system management mode by setting to 0 */ @@ -108,9 +108,9 @@ fadt->reset_reg.addrh = 0x0; fadt->reset_value = 0; - fadt->x_firmware_ctl_l = facs; + fadt->x_firmware_ctl_l = (u32) facs; fadt->x_firmware_ctl_h = 0; - fadt->x_dsdt_l = dsdt; + fadt->x_dsdt_l = (u32) dsdt; fadt->x_dsdt_h = 0; fadt->x_pm1a_evt_blk.space_id = 1; Index: src/southbridge/nvidia/mcp55/mcp55_early_setup_car.c =================================================================== --- src/southbridge/nvidia/mcp55/mcp55_early_setup_car.c (revision 5411) +++ src/southbridge/nvidia/mcp55/mcp55_early_setup_car.c (working copy) @@ -177,7 +177,7 @@ pci_write_config32(dev, 0xe4, dword); // need to wait 100ms - delayx(1000); + delayx(232); } static void mcp55_early_setup(unsigned mcp55_num, unsigned *busn, unsigned *devn, unsigned *io_base, unsigned *pci_e_x) @@ -388,7 +388,7 @@ int mcp55_num = 0; unsigned busnx; unsigned devnx; - int ht_c_index,j; + int ht_c_index; /* FIXME: multi pci segment handling */ Index: src/mainboard/gigabyte/m57sli/fanctl.c =================================================================== --- src/mainboard/gigabyte/m57sli/fanctl.c (revision 5411) +++ src/mainboard/gigabyte/m57sli/fanctl.c (working copy) @@ -71,6 +71,7 @@ /* * Called from superio.c */ +extern void init_ec(uint16_t base); void init_ec(uint16_t base) { int i; Index: src/mainboard/gigabyte/m57sli/romstage.c =================================================================== --- src/mainboard/gigabyte/m57sli/romstage.c (revision 5411) +++ src/mainboard/gigabyte/m57sli/romstage.c (working copy) @@ -146,7 +146,6 @@ static void sio_setup(void) { - unsigned value; uint32_t dword; uint8_t byte; Index: src/northbridge/amd/amdk8/exit_from_self.c =================================================================== --- src/northbridge/amd/amdk8/exit_from_self.c (revision 5411) +++ src/northbridge/amd/amdk8/exit_from_self.c (working copy) @@ -17,6 +17,8 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ +extern void exit_from_self(int controllers, const struct mem_controller *ctrl, + struct sys_info *sysinfo); void exit_from_self(int controllers, const struct mem_controller *ctrl, struct sys_info *sysinfo) {