Patchwork Enable maximum decoded range for VT8237*

login
register
about
Submitter Rudolf Marek
Date 2010-04-22 21:29:52
Message ID <4BD0BFD0.2010206@assembler.cz>
Download mbox | patch
Permalink /patch/1257/
State Superseded
Headers show

Comments

Rudolf Marek - 2010-04-22 21:29:52
-----BEGIN PGP SIGNED MESSAGE-----
Hash: SHA1

Hi again,

Attached patch adds support for tinybootblock on VT8237* to decode whole flash
independent of strapping, making larger flashes work. We cannot walk PCI bus
because HT is not setup yet.

Signed-off-by: Rudolf Marek <r.marek@assembler.cz>

Rudolf


-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.10 (GNU/Linux)
Comment: Using GnuPG with Mozilla - http://enigmail.mozdev.org

iEYEARECAAYFAkvQv88ACgkQ3J9wPJqZRNW7+ACgpucNi8eUXQgQJA/CwGZd/ilU
76kAoJDYgJa0H2/zSkUcjpaICycVdn8y
=WVpW
-----END PGP SIGNATURE-----

Patch

Index: src/southbridge/via/vt8237r/bootblock.c
===================================================================
--- src/southbridge/via/vt8237r/bootblock.c	(revision 0)
+++ src/southbridge/via/vt8237r/bootblock.c	(revision 0)
@@ -0,0 +1,35 @@ 
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2010 Rudolf Marek <r.marek@assembler.cz>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
+ */
+
+#include <arch/io.h>
+#include <arch/romcc_io.h>
+#include <device/pci_ids.h>
+
+static void bootblock_southbridge_init(void)
+{
+	device_t dev;
+
+	/* ROM decode last 8MB FF800000 - FFFFFFFF on VT8237S/VT8237A */
+	/* ROM decode last 4MB FFC00000 - FFFFFFFF on VT8237R */
+
+	/* don't walk the bus if HT is not ready yet, assume 11.0 as default SB address  */
+	pci_write_config8(PCI_DEV(0,0x11,0), 0x41, 0x7f);
+}
+
+
Index: src/southbridge/via/vt8237r/Kconfig
===================================================================
--- src/southbridge/via/vt8237r/Kconfig	(revision 5467)
+++ src/southbridge/via/vt8237r/Kconfig	(working copy)
@@ -25,3 +25,8 @@ 
 	bool
 	default n
 	depends on SOUTHBRIDGE_VIA_VT8237R
+
+config BOOTBLOCK_SOUTHBRIDGE_INIT
+	string
+	default "southbridge/via/vt8237r/bootblock.c"
+	depends on SOUTHBRIDGE_VIA_VT8237R