From patchwork Thu Apr 22 21:41:19 2010
Content-Type: text/plain; charset="utf-8"
MIME-Version: 1.0
Content-Transfer-Encoding: 7bit
Subject: Enable maximum decoded range for VT8237*
Date: Thu, 22 Apr 2010 21:41:19 -0000
From: Rudolf Marek <r.marek@assembler.cz>
X-Patchwork-Id: 1258
Message-Id: <4BD0C27F.6030802@assembler.cz>
To: Myles Watson <mylesgw@gmail.com>
Cc: Stefan Reinauer <stepan@coresystems.de>, coreboot@coreboot.org

-----BEGIN PGP SIGNED MESSAGE-----
Hash: SHA1

Very good idea!

It works!

Attached patch adds support for tinybootblock on VT8237* to decode whole flash
independent of strapping, making larger flashes work. We cannot walk anything
else than PCI bus 0 because HT is not setup yet.

Signed-off-by: Rudolf Marek <r.marek@assembler.cz>


Rudolf
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.10 (GNU/Linux)
Comment: Using GnuPG with Mozilla - http://enigmail.mozdev.org

iEYEARECAAYFAkvQwn8ACgkQ3J9wPJqZRNXjqwCgvrUVovwnCtN/Y+oYdxXhvIhZ
cfEAoIwbEEWwhu1dqWQk/nb768TCS9cj
=21JF
-----END PGP SIGNATURE-----
Acked-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>


Index: src/southbridge/via/vt8237r/bootblock.c
===================================================================
--- src/southbridge/via/vt8237r/bootblock.c	(revision 0)
+++ src/southbridge/via/vt8237r/bootblock.c	(revision 0)
@@ -0,0 +1,46 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2010 Rudolf Marek <r.marek@assembler.cz>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
+ */
+
+#include <arch/io.h>
+#include <arch/romcc_io.h>
+#include <device/pci_ids.h>
+
+static void bootblock_southbridge_init(void)
+{
+	device_t dev;
+	/* don't walk other busses, HT is not enabled */
+
+	/* ROM decode last 8MB FF800000 - FFFFFFFF on VT8237S/VT8237A */
+	/* ROM decode last 4MB FFC00000 - FFFFFFFF on VT8237R */
+
+	/* Power management controller */
+	dev = pci_locate_device_on_bus(PCI_ID(PCI_VENDOR_ID_VIA,
+		    PCI_DEVICE_ID_VIA_VT8237R_LPC), 0);
+
+	if (dev == PCI_DEV_INVALID) {
+		/* Power management controller */
+		dev = pci_locate_device_on_bus(PCI_ID(PCI_VENDOR_ID_VIA,
+			PCI_DEVICE_ID_VIA_VT8237S_LPC), 0);
+
+		if (dev == PCI_DEV_INVALID)
+			return;
+	}
+
+	pci_write_config8(dev, 0x41, 0x7f);
+}
Index: src/southbridge/via/vt8237r/Kconfig
===================================================================
--- src/southbridge/via/vt8237r/Kconfig	(revision 5467)
+++ src/southbridge/via/vt8237r/Kconfig	(working copy)
@@ -25,3 +25,8 @@
 	bool
 	default n
 	depends on SOUTHBRIDGE_VIA_VT8237R
+
+config BOOTBLOCK_SOUTHBRIDGE_INIT
+	string
+	default "southbridge/via/vt8237r/bootblock.c"
+	depends on SOUTHBRIDGE_VIA_VT8237R