| Submitter | Patrick Georgi |
|---|---|
| Date | 2010-05-07 14:17:38 |
| Message ID | <4BE42102.9080209@georgi-clan.de> |
| Download | mbox | patch |
| Permalink | /patch/1294/ |
| State | Accepted |
| Commit | r5580 |
| Headers | show |
Comments
Am 07.05.2010 16:17, schrieb Patrick Georgi: > Hi, > > attached patch adds the rom-enable function on bcm5785 to a > tinybootblock build, allowing for 4MB ROMs (instead of the default > configuration which seems to be 1MB). > > Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> > Ping?
On Fri, May 7, 2010 at 8:17 AM, Patrick Georgi <patrick@georgi-clan.de> wrote: > Hi, > > attached patch adds the rom-enable function on bcm5785 to a > tinybootblock build, allowing for 4MB ROMs (instead of the default > configuration which seems to be 1MB). > > Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Myles Watson <mylesgw@gmail.com> Thanks, Myles
Patch
Index: src/southbridge/broadcom/bcm5785/Kconfig =================================================================== --- src/southbridge/broadcom/bcm5785/Kconfig (Revision 5526) +++ src/southbridge/broadcom/bcm5785/Kconfig (Arbeitskopie) @@ -1,2 +1,8 @@ config SOUTHBRIDGE_BROADCOM_BCM5785 bool + select HAVE_HARD_RESET + +config BOOTBLOCK_SOUTHBRIDGE_INIT + string + default "southbridge/broadcom/bcm5785/bootblock.c" + depends on SOUTHBRIDGE_BROADCOM_BCM5785 Index: src/southbridge/broadcom/bcm5785/bcm5785_early_setup.c =================================================================== --- src/southbridge/broadcom/bcm5785/bcm5785_early_setup.c (Revision 5526) +++ src/southbridge/broadcom/bcm5785/bcm5785_early_setup.c (Arbeitskopie) @@ -4,21 +4,8 @@ */ #include <reset.h> -static void bcm5785_enable_rom(void) -{ - unsigned char byte; - device_t addr; +#include "bcm5785_enable_rom.c" - /* Enable 4MB rom access at 0xFFC00000 - 0xFFFFFFFF */ - /* Locate the BCM 5785 SB PCI Main */ - addr = pci_locate_device(PCI_ID(0x1166, 0x0205), 0); // 0x0201? - - /* Set the 4MB enable bit bit */ - byte = pci_read_config8(addr, 0x41); - byte |= 0x0e; - pci_write_config8(addr, 0x41, byte); -} - static void bcm5785_enable_lpc(void) { Index: src/southbridge/broadcom/bcm5785/bcm5785_enable_rom.c =================================================================== --- src/southbridge/broadcom/bcm5785/bcm5785_enable_rom.c (Revision 0) +++ src/southbridge/broadcom/bcm5785/bcm5785_enable_rom.c (Revision 0) @@ -0,0 +1,14 @@ +static void bcm5785_enable_rom(void) +{ + unsigned char byte; + device_t addr; + + /* Enable 4MB rom access at 0xFFC00000 - 0xFFFFFFFF */ + /* Locate the BCM 5785 SB PCI Main */ + addr = pci_locate_device(PCI_ID(0x1166, 0x0205), 0); // 0x0201? + + /* Set the 4MB enable bit bit */ + byte = pci_read_config8(addr, 0x41); + byte |= 0x0e; + pci_write_config8(addr, 0x41, byte); +} Index: src/southbridge/broadcom/bcm5785/bootblock.c =================================================================== --- src/southbridge/broadcom/bcm5785/bootblock.c (Revision 0) +++ src/southbridge/broadcom/bcm5785/bootblock.c (Revision 0) @@ -0,0 +1,5 @@ +#include "bcm5785_enable_rom.c" + +static void bootblock_southbridge_init(void) { + bcm5785_enable_rom(); +}
Hi, attached patch adds the rom-enable function on bcm5785 to a tinybootblock build, allowing for 4MB ROMs (instead of the default configuration which seems to be 1MB). Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>