Patchwork Include headers instead of sources in romstage, part 2/many

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Submitter Patrick Georgi
Date 2010-05-08 20:59:42
Message ID <4BE5D0BE.7070006@georgi-clan.de>
Download mbox | patch
Permalink /patch/1303/
State Superseded
Headers show

Comments

Patrick Georgi - 2010-05-08 20:59:42
Hi,

attached patch completes the changes from the first part, by eliminating
the direct inclusion of pc80/serial.c in all romstage.c files.
So far, they were still around in ROMCC builds.

I moved the include to console/console.h, guarded so it's only included
for ROMCC, as this file is a direct consumer of the functions in
pc80/serial.c

It's abuild tested and

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Stefan Reinauer - 2010-05-08 21:40:32
On 5/8/10 10:59 PM, Patrick Georgi wrote:
> Index: src/include/lib.h
> ===================================================================
> --- src/include/lib.h	(Revision 5532)
> +++ src/include/lib.h	(Arbeitskopie)
> @@ -49,5 +49,7 @@
>  void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx);
>  #endif
>  
> +#else /* __ROMCC__ */
> +#include "pc80/serial.c"
>  #endif /* __ROMCC__ */
>  #endif /* __LIB_H__ */
>   
It looks like only console/console.h is actually using these functions,
so I think it should rather be included in console/console.h than in lib.h?

Stefan

Patch

Index: src/mainboard/axus/tc320/romstage.c

===================================================================
--- src/mainboard/axus/tc320/romstage.c	(Revision 5532)

+++ src/mainboard/axus/tc320/romstage.c	(Arbeitskopie)

@@ -24,7 +24,6 @@ 

 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
-#include "pc80/serial.c"
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "northbridge/amd/gx1/raminit.c"
Index: src/mainboard/bcom/winnet100/romstage.c

===================================================================
--- src/mainboard/bcom/winnet100/romstage.c	(Revision 5532)

+++ src/mainboard/bcom/winnet100/romstage.c	(Arbeitskopie)

@@ -24,7 +24,6 @@ 

 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
-#include "pc80/serial.c"
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "northbridge/amd/gx1/raminit.c"
Index: src/mainboard/televideo/tc7020/romstage.c

===================================================================
--- src/mainboard/televideo/tc7020/romstage.c	(Revision 5532)

+++ src/mainboard/televideo/tc7020/romstage.c	(Arbeitskopie)

@@ -24,7 +24,6 @@ 

 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
-#include "pc80/serial.c"
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "northbridge/amd/gx1/raminit.c"
Index: src/mainboard/supermicro/x6dai_g/romstage.c

===================================================================
--- src/mainboard/supermicro/x6dai_g/romstage.c	(Revision 5532)

+++ src/mainboard/supermicro/x6dai_g/romstage.c	(Arbeitskopie)

@@ -7,7 +7,6 @@ 

 #include <stdlib.h>
 #include "option_table.h"
 #include "pc80/mc146818rtc_early.c"
-#include "pc80/serial.c"
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "pc80/udelay_io.c"
Index: src/mainboard/supermicro/x6dhe_g/romstage.c

===================================================================
--- src/mainboard/supermicro/x6dhe_g/romstage.c	(Revision 5532)

+++ src/mainboard/supermicro/x6dhe_g/romstage.c	(Arbeitskopie)

@@ -7,7 +7,6 @@ 

 #include <stdlib.h>
 #include "option_table.h"
 #include "pc80/mc146818rtc_early.c"
-#include "pc80/serial.c"
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "pc80/udelay_io.c"
Index: src/mainboard/supermicro/x6dhe_g2/romstage.c

===================================================================
--- src/mainboard/supermicro/x6dhe_g2/romstage.c	(Revision 5532)

+++ src/mainboard/supermicro/x6dhe_g2/romstage.c	(Arbeitskopie)

@@ -7,7 +7,6 @@ 

 #include <stdlib.h>
 #include "option_table.h"
 #include "pc80/mc146818rtc_early.c"
-#include "pc80/serial.c"
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "southbridge/intel/i82801ex/i82801ex_early_smbus.c"
Index: src/mainboard/supermicro/x6dhr_ig/romstage.c

===================================================================
--- src/mainboard/supermicro/x6dhr_ig/romstage.c	(Revision 5532)

+++ src/mainboard/supermicro/x6dhr_ig/romstage.c	(Arbeitskopie)

@@ -7,7 +7,6 @@ 

 #include <stdlib.h>
 #include "option_table.h"
 #include "pc80/mc146818rtc_early.c"
-#include "pc80/serial.c"
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "southbridge/intel/i82801ex/i82801ex_early_smbus.c"
Index: src/mainboard/supermicro/x6dhr_ig2/romstage.c

===================================================================
--- src/mainboard/supermicro/x6dhr_ig2/romstage.c	(Revision 5532)

+++ src/mainboard/supermicro/x6dhr_ig2/romstage.c	(Arbeitskopie)

@@ -7,7 +7,6 @@ 

 #include <stdlib.h>
 #include "option_table.h"
 #include "pc80/mc146818rtc_early.c"
-#include "pc80/serial.c"
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "southbridge/intel/i82801ex/i82801ex_early_smbus.c"
Index: src/mainboard/soyo/sy-6ba-plus-iii/romstage.c

===================================================================
--- src/mainboard/soyo/sy-6ba-plus-iii/romstage.c	(Revision 5532)

+++ src/mainboard/soyo/sy-6ba-plus-iii/romstage.c	(Arbeitskopie)

@@ -25,7 +25,6 @@ 

 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
 #include <stdlib.h>
-#include "pc80/serial.c"
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "southbridge/intel/i82371eb/i82371eb_enable_rom.c"
Index: src/mainboard/a-trend/atc-6240/romstage.c

===================================================================
--- src/mainboard/a-trend/atc-6240/romstage.c	(Revision 5532)

+++ src/mainboard/a-trend/atc-6240/romstage.c	(Arbeitskopie)

@@ -25,7 +25,6 @@ 

 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
-#include "pc80/serial.c"
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "southbridge/intel/i82371eb/i82371eb_enable_rom.c"
Index: src/mainboard/a-trend/atc-6220/romstage.c

===================================================================
--- src/mainboard/a-trend/atc-6220/romstage.c	(Revision 5532)

+++ src/mainboard/a-trend/atc-6220/romstage.c	(Arbeitskopie)

@@ -25,7 +25,6 @@ 

 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
 #include <stdlib.h>
-#include "pc80/serial.c"
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "southbridge/intel/i82371eb/i82371eb_enable_rom.c"
Index: src/mainboard/gigabyte/ga-6bxc/romstage.c

===================================================================
--- src/mainboard/gigabyte/ga-6bxc/romstage.c	(Revision 5532)

+++ src/mainboard/gigabyte/ga-6bxc/romstage.c	(Arbeitskopie)

@@ -25,7 +25,6 @@ 

 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
 #include <stdlib.h>
-#include "pc80/serial.c"
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "southbridge/intel/i82371eb/i82371eb_enable_rom.c"
Index: src/mainboard/digitallogic/msm586seg/romstage.c

===================================================================
--- src/mainboard/digitallogic/msm586seg/romstage.c	(Revision 5532)

+++ src/mainboard/digitallogic/msm586seg/romstage.c	(Arbeitskopie)

@@ -5,7 +5,6 @@ 

 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
 #include "pc80/mc146818rtc_early.c"
-#include "pc80/serial.c"
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "cpu/x86/bist.h"
Index: src/mainboard/mitac/6513wu/romstage.c

===================================================================
--- src/mainboard/mitac/6513wu/romstage.c	(Revision 5532)

+++ src/mainboard/mitac/6513wu/romstage.c	(Arbeitskopie)

@@ -25,7 +25,6 @@ 

 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
-#include "pc80/serial.c"
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "southbridge/intel/i82801ax/i82801ax_early_smbus.c"
Index: src/mainboard/olpc/btest/romstage.c

===================================================================
--- src/mainboard/olpc/btest/romstage.c	(Revision 5532)

+++ src/mainboard/olpc/btest/romstage.c	(Arbeitskopie)

@@ -4,7 +4,6 @@ 

 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
-#include "pc80/serial.c"
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "superio/winbond/w83627hf/w83627hf_early_serial.c"
Index: src/mainboard/olpc/rev_a/romstage.c

===================================================================
--- src/mainboard/olpc/rev_a/romstage.c	(Revision 5532)

+++ src/mainboard/olpc/rev_a/romstage.c	(Arbeitskopie)

@@ -4,7 +4,6 @@ 

 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
-#include "pc80/serial.c"
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "superio/winbond/w83627hf/w83627hf_early_serial.c"
Index: src/mainboard/emulation/qemu-x86/romstage.c

===================================================================
--- src/mainboard/emulation/qemu-x86/romstage.c	(Revision 5532)

+++ src/mainboard/emulation/qemu-x86/romstage.c	(Arbeitskopie)

@@ -7,7 +7,6 @@ 

 #include <arch/hlt.h>
 #include "option_table.h"
 #include "pc80/mc146818rtc_early.c"
-#include "pc80/serial.c"
 #include <console/console.h>
 #include "pc80/udelay_io.c"
 #include "lib/delay.c"
Index: src/mainboard/technologic/ts5300/romstage.c

===================================================================
--- src/mainboard/technologic/ts5300/romstage.c	(Revision 5532)

+++ src/mainboard/technologic/ts5300/romstage.c	(Arbeitskopie)

@@ -11,7 +11,6 @@ 

 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
 #include "pc80/mc146818rtc_early.c"
-#include "pc80/serial.c"
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "cpu/x86/bist.h"
Index: src/mainboard/amd/rumba/romstage.c

===================================================================
--- src/mainboard/amd/rumba/romstage.c	(Revision 5532)

+++ src/mainboard/amd/rumba/romstage.c	(Arbeitskopie)

@@ -4,7 +4,6 @@ 

 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
-#include "pc80/serial.c"
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "superio/winbond/w83627hf/w83627hf_early_serial.c"
Index: src/mainboard/nokia/ip530/romstage.c

===================================================================
--- src/mainboard/nokia/ip530/romstage.c	(Revision 5532)

+++ src/mainboard/nokia/ip530/romstage.c	(Arbeitskopie)

@@ -25,7 +25,6 @@ 

 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
 #include <stdlib.h>
-#include "pc80/serial.c"
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "southbridge/intel/i82371eb/i82371eb_enable_rom.c"
Index: src/mainboard/biostar/m6tba/romstage.c

===================================================================
--- src/mainboard/biostar/m6tba/romstage.c	(Revision 5532)

+++ src/mainboard/biostar/m6tba/romstage.c	(Arbeitskopie)

@@ -25,7 +25,6 @@ 

 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
 #include <stdlib.h>
-#include "pc80/serial.c"
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "southbridge/intel/i82371eb/i82371eb_enable_rom.c"
Index: src/mainboard/azza/pt-6ibd/romstage.c

===================================================================
--- src/mainboard/azza/pt-6ibd/romstage.c	(Revision 5532)

+++ src/mainboard/azza/pt-6ibd/romstage.c	(Arbeitskopie)

@@ -25,7 +25,6 @@ 

 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
 #include <stdlib.h>
-#include "pc80/serial.c"
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "southbridge/intel/i82371eb/i82371eb_enable_rom.c"
Index: src/mainboard/nec/powermate2000/romstage.c

===================================================================
--- src/mainboard/nec/powermate2000/romstage.c	(Revision 5532)

+++ src/mainboard/nec/powermate2000/romstage.c	(Arbeitskopie)

@@ -25,7 +25,6 @@ 

 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
 #include <stdlib.h>
-#include "pc80/serial.c"
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "superio/smsc/smscsuperio/smscsuperio_early_serial.c"
Index: src/mainboard/iei/nova4899r/romstage.c

===================================================================
--- src/mainboard/iei/nova4899r/romstage.c	(Revision 5532)

+++ src/mainboard/iei/nova4899r/romstage.c	(Arbeitskopie)

@@ -24,7 +24,6 @@ 

 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
-#include "pc80/serial.c"
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "superio/winbond/w83977tf/w83977tf_early_serial.c"
Index: src/mainboard/iei/juki-511p/romstage.c

===================================================================
--- src/mainboard/iei/juki-511p/romstage.c	(Revision 5532)

+++ src/mainboard/iei/juki-511p/romstage.c	(Arbeitskopie)

@@ -24,7 +24,6 @@ 

 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
-#include "pc80/serial.c"
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "superio/winbond/w83977f/w83977f_early_serial.c"
Index: src/mainboard/hp/e_vectra_p2706t/romstage.c

===================================================================
--- src/mainboard/hp/e_vectra_p2706t/romstage.c	(Revision 5532)

+++ src/mainboard/hp/e_vectra_p2706t/romstage.c	(Arbeitskopie)

@@ -25,7 +25,6 @@ 

 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
 #include <stdlib.h>
-#include "pc80/serial.c"
 #include <console/console.h>
 #include "lib/ramtest.c"
 /* TODO: It's a PC87364 actually! */
Index: src/mainboard/tyan/Kconfig

===================================================================
--- src/mainboard/tyan/Kconfig	(Revision 5532)

+++ src/mainboard/tyan/Kconfig	(Arbeitskopie)

@@ -35,6 +35,7 @@ 

 source "src/mainboard/tyan/s2895/Kconfig"
 source "src/mainboard/tyan/s2912/Kconfig"
 source "src/mainboard/tyan/s2912_fam10/Kconfig"
+source "src/mainboard/tyan/s3970_fam10/Kconfig"
 source "src/mainboard/tyan/s4880/Kconfig"
 source "src/mainboard/tyan/s4882/Kconfig"
 
Index: src/mainboard/tyan/s1846/romstage.c

===================================================================
--- src/mainboard/tyan/s1846/romstage.c	(Revision 5532)

+++ src/mainboard/tyan/s1846/romstage.c	(Arbeitskopie)

@@ -25,7 +25,6 @@ 

 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
 #include <stdlib.h>
-#include "pc80/serial.c"
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "southbridge/intel/i82371eb/i82371eb_enable_rom.c"
Index: src/mainboard/asi/mb_5blgp/romstage.c

===================================================================
--- src/mainboard/asi/mb_5blgp/romstage.c	(Revision 5532)

+++ src/mainboard/asi/mb_5blgp/romstage.c	(Arbeitskopie)

@@ -23,7 +23,6 @@ 

 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
-#include "pc80/serial.c"
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "northbridge/amd/gx1/raminit.c"
Index: src/mainboard/asi/mb_5blmp/romstage.c

===================================================================
--- src/mainboard/asi/mb_5blmp/romstage.c	(Revision 5532)

+++ src/mainboard/asi/mb_5blmp/romstage.c	(Arbeitskopie)

@@ -24,7 +24,6 @@ 

 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
-#include "pc80/serial.c"
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "northbridge/amd/gx1/raminit.c"
Index: src/mainboard/lippert/frontrunner/romstage.c

===================================================================
--- src/mainboard/lippert/frontrunner/romstage.c	(Revision 5532)

+++ src/mainboard/lippert/frontrunner/romstage.c	(Arbeitskopie)

@@ -4,7 +4,6 @@ 

 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
-#include "pc80/serial.c"
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "superio/winbond/w83627hf/w83627hf_early_serial.c"
Index: src/mainboard/abit/be6-ii_v2_0/romstage.c

===================================================================
--- src/mainboard/abit/be6-ii_v2_0/romstage.c	(Revision 5532)

+++ src/mainboard/abit/be6-ii_v2_0/romstage.c	(Arbeitskopie)

@@ -25,7 +25,6 @@ 

 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
-#include "pc80/serial.c"
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "southbridge/intel/i82371eb/i82371eb_enable_rom.c"
Index: src/mainboard/via/vt8454c/Kconfig

===================================================================
--- src/mainboard/via/vt8454c/Kconfig	(Revision 5532)

+++ src/mainboard/via/vt8454c/Kconfig	(Arbeitskopie)

@@ -29,7 +29,7 @@ 

 	default 15
 	depends on BOARD_VIA_VT8454C
 
-config RAMBASE
-	hex
-	default 0x4000
-	depends on BOARD_VIA_VT8454C
+#config RAMBASE
+#	hex
+#	default 0x4000
+#	depends on BOARD_VIA_VT8454C
Index: src/mainboard/via/epia-m/romstage.c

===================================================================
--- src/mainboard/via/epia-m/romstage.c	(Revision 5532)

+++ src/mainboard/via/epia-m/romstage.c	(Arbeitskopie)

@@ -6,7 +6,6 @@ 

 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
 #include <stdlib.h>
-#include "pc80/serial.c"
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "northbridge/via/vt8623/raminit.h"
Index: src/mainboard/via/epia-n/romstage.c

===================================================================
--- src/mainboard/via/epia-n/romstage.c	(Revision 5532)

+++ src/mainboard/via/epia-n/romstage.c	(Arbeitskopie)

@@ -26,7 +26,6 @@ 

 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
-#include "pc80/serial.c"
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "northbridge/via/cn400/raminit.h"
Index: src/mainboard/via/epia/romstage.c

===================================================================
--- src/mainboard/via/epia/romstage.c	(Revision 5532)

+++ src/mainboard/via/epia/romstage.c	(Arbeitskopie)

@@ -5,7 +5,6 @@ 

 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
 #include <stdlib.h>
-#include "pc80/serial.c"
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "northbridge/via/vt8601/raminit.h"
Index: src/mainboard/dell/s1850/romstage.c

===================================================================
--- src/mainboard/dell/s1850/romstage.c	(Revision 5532)

+++ src/mainboard/dell/s1850/romstage.c	(Arbeitskopie)

@@ -7,7 +7,6 @@ 

 #include <stdlib.h>
 #include "option_table.h"
 #include "pc80/mc146818rtc_early.c"
-#include "pc80/serial.c"
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "southbridge/intel/i82801ex/i82801ex_early_smbus.c"
Index: src/mainboard/compaq/deskpro_en_sff_p600/romstage.c

===================================================================
--- src/mainboard/compaq/deskpro_en_sff_p600/romstage.c	(Revision 5532)

+++ src/mainboard/compaq/deskpro_en_sff_p600/romstage.c	(Arbeitskopie)

@@ -25,7 +25,6 @@ 

 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
 #include <stdlib.h>
-#include "pc80/serial.c"
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "southbridge/intel/i82371eb/i82371eb_enable_rom.c"
Index: src/mainboard/msi/ms6119/romstage.c

===================================================================
--- src/mainboard/msi/ms6119/romstage.c	(Revision 5532)

+++ src/mainboard/msi/ms6119/romstage.c	(Arbeitskopie)

@@ -25,7 +25,6 @@ 

 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
-#include "pc80/serial.c"
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "southbridge/intel/i82371eb/i82371eb_enable_rom.c"
Index: src/mainboard/msi/ms6147/romstage.c

===================================================================
--- src/mainboard/msi/ms6147/romstage.c	(Revision 5532)

+++ src/mainboard/msi/ms6147/romstage.c	(Arbeitskopie)

@@ -25,7 +25,6 @@ 

 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
-#include "pc80/serial.c"
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "southbridge/intel/i82371eb/i82371eb_enable_rom.c"
Index: src/mainboard/msi/ms6156/romstage.c

===================================================================
--- src/mainboard/msi/ms6156/romstage.c	(Revision 5532)

+++ src/mainboard/msi/ms6156/romstage.c	(Arbeitskopie)

@@ -25,7 +25,6 @@ 

 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
-#include "pc80/serial.c"
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "southbridge/intel/i82371eb/i82371eb_enable_rom.c"
Index: src/mainboard/msi/ms6178/romstage.c

===================================================================
--- src/mainboard/msi/ms6178/romstage.c	(Revision 5532)

+++ src/mainboard/msi/ms6178/romstage.c	(Arbeitskopie)

@@ -25,7 +25,6 @@ 

 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
 #include <stdlib.h>
-#include "pc80/serial.c"
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "superio/winbond/w83627hf/w83627hf_early_serial.c"
Index: src/mainboard/advantech/pcm-5820/romstage.c

===================================================================
--- src/mainboard/advantech/pcm-5820/romstage.c	(Revision 5532)

+++ src/mainboard/advantech/pcm-5820/romstage.c	(Arbeitskopie)

@@ -23,7 +23,6 @@ 

 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
-#include "pc80/serial.c"
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "northbridge/amd/gx1/raminit.c"
Index: src/mainboard/eaglelion/5bcm/romstage.c

===================================================================
--- src/mainboard/eaglelion/5bcm/romstage.c	(Revision 5532)

+++ src/mainboard/eaglelion/5bcm/romstage.c	(Arbeitskopie)

@@ -5,7 +5,6 @@ 

 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
 #include <stdlib.h>
-#include "pc80/serial.c"
 #include <console/console.h>
 #include "lib/ramtest.c"
 //#include "southbridge/intel/i440bx/i440bx_early_smbus.c"
Index: src/mainboard/intel/xe7501devkit/romstage.c

===================================================================
--- src/mainboard/intel/xe7501devkit/romstage.c	(Revision 5532)

+++ src/mainboard/intel/xe7501devkit/romstage.c	(Arbeitskopie)

@@ -8,7 +8,6 @@ 

 #include <stdlib.h>
 #include "option_table.h"
 #include "pc80/mc146818rtc_early.c"
-#include "pc80/serial.c"
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "southbridge/intel/i82801cx/i82801cx_early_smbus.c"
Index: src/mainboard/intel/truxton/romstage.c

===================================================================
--- src/mainboard/intel/truxton/romstage.c	(Revision 5532)

+++ src/mainboard/intel/truxton/romstage.c	(Arbeitskopie)

@@ -27,7 +27,6 @@ 

 #include <arch/romcc_io.h>
 #include <cpu/x86/lapic.h>
 #include "pc80/mc146818rtc_early.c"
-#include "pc80/serial.c"
 #include "pc80/udelay_io.c"
 #include <console/console.h>
 #include "lib/ramtest.c"
Index: src/mainboard/intel/mtarvon/romstage.c

===================================================================
--- src/mainboard/intel/mtarvon/romstage.c	(Revision 5532)

+++ src/mainboard/intel/mtarvon/romstage.c	(Arbeitskopie)

@@ -27,7 +27,6 @@ 

 #include <arch/romcc_io.h>
 #include <cpu/x86/lapic.h>
 #include "pc80/mc146818rtc_early.c"
-#include "pc80/serial.c"
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "southbridge/intel/i3100/i3100_early_smbus.c"
Index: src/mainboard/intel/jarrell/romstage.c

===================================================================
--- src/mainboard/intel/jarrell/romstage.c	(Revision 5532)

+++ src/mainboard/intel/jarrell/romstage.c	(Arbeitskopie)

@@ -7,7 +7,6 @@ 

 #include <stdlib.h>
 #include "option_table.h"
 #include "pc80/mc146818rtc_early.c"
-#include "pc80/serial.c"
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "southbridge/intel/i82801ex/i82801ex_early_smbus.c"
Index: src/mainboard/asus/p2b-ls/romstage.c

===================================================================
--- src/mainboard/asus/p2b-ls/romstage.c	(Revision 5532)

+++ src/mainboard/asus/p2b-ls/romstage.c	(Arbeitskopie)

@@ -25,7 +25,6 @@ 

 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
 #include <stdlib.h>
-#include "pc80/serial.c"
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "southbridge/intel/i82371eb/i82371eb_enable_rom.c"
Index: src/mainboard/asus/mew-am/romstage.c

===================================================================
--- src/mainboard/asus/mew-am/romstage.c	(Revision 5532)

+++ src/mainboard/asus/mew-am/romstage.c	(Arbeitskopie)

@@ -25,7 +25,6 @@ 

 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
-#include "pc80/serial.c"
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "southbridge/intel/i82801ax/i82801ax_early_smbus.c"
Index: src/mainboard/asus/p2b/romstage.c

===================================================================
--- src/mainboard/asus/p2b/romstage.c	(Revision 5532)

+++ src/mainboard/asus/p2b/romstage.c	(Arbeitskopie)

@@ -25,7 +25,6 @@ 

 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
 #include <stdlib.h>
-#include "pc80/serial.c"
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "southbridge/intel/i82371eb/i82371eb_enable_rom.c"
Index: src/mainboard/asus/p2b-d/romstage.c

===================================================================
--- src/mainboard/asus/p2b-d/romstage.c	(Revision 5532)

+++ src/mainboard/asus/p2b-d/romstage.c	(Arbeitskopie)

@@ -26,7 +26,6 @@ 

 #include <arch/hlt.h>
 #include <stdlib.h>
 #include <cpu/x86/lapic.h>
-#include "pc80/serial.c"
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "southbridge/intel/i82371eb/i82371eb_enable_rom.c"
Index: src/mainboard/asus/p2b-f/romstage.c

===================================================================
--- src/mainboard/asus/p2b-f/romstage.c	(Revision 5532)

+++ src/mainboard/asus/p2b-f/romstage.c	(Arbeitskopie)

@@ -25,7 +25,6 @@ 

 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
 #include <stdlib.h>
-#include "pc80/serial.c"
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "southbridge/intel/i82371eb/i82371eb_enable_rom.c"
Index: src/mainboard/asus/p2b-ds/romstage.c

===================================================================
--- src/mainboard/asus/p2b-ds/romstage.c	(Revision 5532)

+++ src/mainboard/asus/p2b-ds/romstage.c	(Arbeitskopie)

@@ -26,7 +26,6 @@ 

 #include <arch/hlt.h>
 #include <stdlib.h>
 #include <cpu/x86/lapic.h>
-#include "pc80/serial.c"
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "southbridge/intel/i82371eb/i82371eb_enable_rom.c"
Index: src/mainboard/asus/p3b-f/romstage.c

===================================================================
--- src/mainboard/asus/p3b-f/romstage.c	(Revision 5532)

+++ src/mainboard/asus/p3b-f/romstage.c	(Arbeitskopie)

@@ -25,7 +25,6 @@ 

 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
 #include <stdlib.h>
-#include "pc80/serial.c"
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "southbridge/intel/i82371eb/i82371eb_enable_rom.c"
Index: src/mainboard/asus/mew-vm/romstage.c

===================================================================
--- src/mainboard/asus/mew-vm/romstage.c	(Revision 5532)

+++ src/mainboard/asus/mew-vm/romstage.c	(Arbeitskopie)

@@ -25,7 +25,6 @@ 

 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
 #include <stdlib.h>
-#include "pc80/serial.c"
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "superio/smsc/lpc47b272/lpc47b272_early_serial.c"
Index: src/include/lib.h

===================================================================
--- src/include/lib.h	(Revision 5532)

+++ src/include/lib.h	(Arbeitskopie)

@@ -49,5 +49,7 @@ 

 void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx);
 #endif
 
+#else /* __ROMCC__ */
+#include "pc80/serial.c"
 #endif /* __ROMCC__ */
 #endif /* __LIB_H__ */