Comments
Patch
===================================================================
@@ -33,7 +33,9 @@
#include "lib/debug.c"
#include "pc80/udelay_io.c"
#include "lib/delay.c"
+#if CONFIG_ROMCC==1
#include "cpu/x86/mtrr/earlymtrr.c"
+#endif
#include "cpu/x86/bist.h"
/* FIXME: The ASUS P2B-LS has a Winbond W83977EF, actually. */
#include "superio/winbond/w83977tf/w83977tf_early_serial.c"
@@ -46,12 +48,20 @@
}
#include "northbridge/intel/i440bx/raminit.c"
+#if CONFIG_DEBUG_RAM_SETUP
#include "northbridge/intel/i440bx/debug.c"
+#endif
-static void main(unsigned long bist)
+#if CONFIG_ROMCC
+static /* This is part of main() declaration below for romcc only. */
+#endif
+
+void main(unsigned long bist)
{
+#if CONFIG_ROMCC
if (bist == 0)
early_mtrr_init();
+#endif
/* FIXME: The ASUS P2B-LS has a Winbond W83977EF, actually. */
w83977tf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
@@ -63,10 +73,14 @@
i82371eb_enable_rom(PCI_DEV(0, 4, 0)); /* ISA bridge at 00:04.0. */
enable_smbus();
- /* dump_spd_registers(); */
+#if CONFIG_DEBUG_RAM_SETUP
+ dump_spd_registers();
+#endif
sdram_set_registers();
sdram_set_spd_registers();
sdram_enable();
- /* ram_check(0, 640 * 1024); */
+#if CONFIG_DEBUG_RAM_SETUP
+ ram_check(0, 640 * 1024);
+#endif
}