Patchwork update reference tool chain

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Submitter Stefan Reinauer
Date 2010-05-17 14:09:06
Message ID <4BF14E02.40809@coresystems.de>
Download mbox | patch
Permalink /patch/1346/
State Not Applicable, archived
Headers show

Comments

Stefan Reinauer - 2010-05-17 14:09:06
On 5/17/10 3:00 AM, Carl-Daniel Hailfinger wrote:
> On 16.05.2010 21:45, Patrick Georgi wrote:
>   
>> Am 14.05.2010 19:19, schrieb Stefan Reinauer:
>>     
>>> See patch
>>>
>>>    
>>>       
>> +GCC_VERSION=4.4.4
>> +GCC_VERSION=4.5.0 # enable for Link Time Optimization&  Co
>>
>> That's supposed to be a user option with 4.5.0 as default? Why
>> "enable" in that line?
>>     
> Does GCC 4.5.0 generate smaller code than 4.4.4?
>
> Regards,
> Carl-Daniel
>   

It does create slightly smaller code than 4.4.2:

kontron 986lcd-m with 4.4.2:

*Name                           Offset     Type         Size
fallback/romstage              0x0        stage        33881
fallback/coreboot_ram          0x84c0     stage        101427
(empty)                        0x21140    null         912358
*
vs kontron 986lcd-m with 4.5.0:

*Name                           Offset     Type         Size
fallback/romstage              0x0        stage        32673
fallback/coreboot_ram          0x8000     stage        100936
(empty)                        0x20a80    null         914086*

In my tests there was absolutely no difference when using -flto, though.
Not even when getting rid of coreboot.a (which, as Kevin stated earlier,
might confuse lto)

*Index: src/arch/i386/Makefile.inc
 if which gcc 2>/dev/null >/dev/null; then
     HOSTCC=gcc*

Patch

===================================================================
--- src/arch/i386/Makefile.inc    (revision 5568)
+++ src/arch/i386/Makefile.inc    (working copy)
@@ -83,20 +83,15 @@ 
 #######################################################################
 # Build the coreboot_ram (stage 2)
 
-$(obj)/coreboot_ram: $(obj)/coreboot_ram.o
$(src)/arch/i386/coreboot_ram.ld #ldoptions
+$(obj)/coreboot_ram: $(obj)/coreboot_ram.o $(src)/arch/i386/coreboot_ram.ld
     @printf "    CC         $(subst $(obj)/,,$(@))\n"
-    $(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T
$(src)/arch/i386/coreboot_ram.ld $(obj)/coreboot_ram.o
+    $(CC) $(CFLAGS) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T
$(src)/arch/i386/coreboot_ram.ld $(obj)/coreboot_ram.o
     $(NM) -n $(obj)/coreboot_ram | sort > $(obj)/coreboot_ram.map
 
-$(obj)/coreboot_ram.o: $(obj)/arch/i386/lib/c_start.o $$(drivers)
$(obj)/coreboot.a $(LIBGCC_FILE_NAME)
+$(obj)/coreboot_ram.o: $(obj)/arch/i386/lib/c_start.o $$(drivers)
$$(objs) $(LIBGCC_FILE_NAME)
     @printf "    CC         $(subst $(obj)/,,$(@))\n"
-    $(CC) -nostdlib -r -o $@ $(obj)/arch/i386/lib/c_start.o $(drivers)
-Wl,--wrap,__divdi3 -Wl,--wrap,__udivdi3 -Wl,--wrap,__moddi3
-Wl,--wrap,__umoddi3 -Wl,--start-group $(obj)/coreboot.a
$(LIBGCC_FILE_NAME) -Wl,--end-group
+    $(CC) $(CFLAGS) -nostdlib -r -o $@ $(obj)/arch/i386/lib/c_start.o
$(drivers) -Wl,--wrap,__divdi3 -Wl,--wrap,__udivdi3 -Wl,--wrap,__moddi3
-Wl,--wrap,__umoddi3 -Wl,--start-group $$(objs) $(LIBGCC_FILE_NAME)
-Wl,--end-group
 
-$(obj)/coreboot.a: $$(objs)
-    @printf "    AR         $(subst $(obj)/,,$(@))\n"
-    rm -f $(obj)/coreboot.a
-    $(AR) cr $(obj)/coreboot.a $^
-
 #######################################################################
 # coreboot_ap.rom
 
@@ -104,7 +99,7 @@ 
 
 $(obj)/coreboot_ap: $(obj)/mainboard/$(MAINBOARDDIR)/ap_romstage.o
     @printf "    CC         $(subst $(obj)/,,$(@))\n"
-    $(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T
$(src)/arch/i386/init/ldscript_apc.lb $^
+    $(CC) $(CFLAGS) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T
$(src)/arch/i386/init/ldscript_apc.lb $^
     $(NM) -n $(obj)/coreboot_ap | sort > $(obj)/coreboot_ap.map
 
 
Index: util/xcompile/xcompile
===================================================================
--- util/xcompile/xcompile    (revision 5568)
+++ util/xcompile/xcompile    (working copy)
@@ -78,6 +78,7 @@ 
 testcc "$CC" "$CFLAGS-Wa,--divide " && CFLAGS="$CFLAGS-Wa,--divide "
 testcc "$CC" "$CFLAGS-fno-stack-protector " &&
CFLAGS="$CFLAGS-fno-stack-protector "
 testcc "$CC" "$CFLAGS-Wl,--build-id=none " &&
CFLAGS="$CFLAGS-Wl,--build-id=none "
+testcc "$CC" "$CFLAGS-flto " && CFLAGS="$CFLAGS-flto "