Patchwork Support for HP DL165 G6

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Submitter Arne Georg Gleditsch
Date 2010-05-26 11:27:54
Message ID <4BFD05BA.9030809@numascale.com>
Download mbox | patch
Permalink /patch/1392/
State Superseded
Headers show

Comments

Arne Georg Gleditsch - 2010-05-26 11:27:54
Hi,

Attached is a patch to board_enable.c for the HP DL165 board.
Apparently, the PCI signature of the DL165 is identical to the DL145,
but the enable pins are placed differently... :/  I'm not sure what the
best way to handle that is.

Signed-off-by: Arne Georg Gleditsch <arne.gleditsch@numascale.com>
Michael Karcher - 2010-05-26 13:56:56
Am Mittwoch, den 26.05.2010, 13:27 +0200 schrieb Arne Georg Gleditsch:
> Attached is a patch to board_enable.c for the HP DL165 board.
> Apparently, the PCI signature of the DL165 is identical to the DL145,
> but the enable pins are placed differently... :/  I'm not sure what the
> best way to handle that is.
Try to find an lspci dump of that DL145 and check whether some PCI
signature is different. If not, check whether DMI contains some string
that makes it possible to tell the systems apart. If nothing helps, PCI
subsystem IDs (not the normal vendor/device IDs!) have to be ripped out
for both systems, disabling auto-detection, and manual -m is needed in
any case.

Regards,
  Michael Karcher
Arne Georg Gleditsch - 2010-05-26 14:08:11
On 26. mai 2010 15:56, Michael Karcher wrote:
> Try to find an lspci dump of that DL145 and check whether some PCI
> signature is different. If not, check whether DMI contains some string
> that makes it possible to tell the systems apart. If nothing helps, PCI
> subsystem IDs (not the normal vendor/device IDs!) have to be ripped out
> for both systems, disabling auto-detection, and manual -m is needed in
> any case.

As Google has it, it would appear that the onboard NIC is different:

DL145:
08:04.0 Ethernet controller [0200]: Broadcom Corporation NetXtreme BCM5715 Gigabit Ethernet [14e4:1678] (rev a3)
08:04.1 Ethernet controller [0200]: Broadcom Corporation NetXtreme BCM5715 Gigabit Ethernet [14e4:1678] (rev a3)

DL165:
02:02.0 Ethernet controller [0200]: Broadcom Corporation NetXtreme BCM5704 Gigabit Ethernet [14e4:1648] (rev 10)
02:02.1 Ethernet controller [0200]: Broadcom Corporation NetXtreme BCM5704 Gigabit Ethernet [14e4:1648] (rev 10)

Perhaps that could be used for the secondary PCI device in the signature?
I believe the device currently listed there is the on-board VGA chip; I'm
not sure why that was chosen.
Michael Karcher - 2010-05-26 14:18:47
Am Mittwoch, den 26.05.2010, 16:08 +0200 schrieb Arne Georg Gleditsch:
> On 26. mai 2010 15:56, Michael Karcher wrote:
> > Try to find an lspci dump of that DL145 and check whether some PCI
> > signature is different. If not, check whether DMI contains some string

> As Google has it, it would appear that the onboard NIC is different:
> 
> DL145:
> 08:04.0 Ethernet controller [0200]: Broadcom Corporation NetXtreme BCM5715 Gigabit Ethernet [14e4:1678] (rev a3)
> 08:04.1 Ethernet controller [0200]: Broadcom Corporation NetXtreme BCM5715 Gigabit Ethernet [14e4:1678] (rev a3)
> 
> DL165:
> 02:02.0 Ethernet controller [0200]: Broadcom Corporation NetXtreme BCM5704 Gigabit Ethernet [14e4:1648] (rev 10)
> 02:02.1 Ethernet controller [0200]: Broadcom Corporation NetXtreme BCM5704 Gigabit Ethernet [14e4:1648] (rev 10)
> 
> Perhaps that could be used for the secondary PCI device in the signature?
> I believe the device currently listed there is the on-board VGA chip; I'm
> not sure why that was chosen.

Maybe because we preferrably choose chips with subsystem IDs. Maybe
because someone thought that a new board revision very probably contains
a more modern graphics chip. In this case, you are very right in
suggesting to take the network chip as secondary PCI ID. You need to
find out what subsystem IDs are used (if any) in the DL145 and the
DL165.

If you send
 - lspci -vvvxxxnn, superiotool -deV and flashrom -V output of your
DL165 (general requirement for having new boards added),
 - an updated patch that uses the network instead of the graphics chip
for both boards, including a sign-off[1],
 - preferably at least PCI ID info including subsystems for the DL145,

your patch is in my oppinion ready to be added to flashrom.

Regards,
  Michael Karcher

[1]: http://www.coreboot.org/Development_Guidelines#Sign-off_Procedure

Patch

Index: board_enable.c
===================================================================
--- board_enable.c	(revision 1013)
+++ board_enable.c	(working copy)
@@ -518,6 +518,15 @@ 
 	return 0;
 }
 
+static int board_hp_dl165_g6_enable(const char *name)
+{
+	/* Variant of DL145, with slightly different pin placement. */
+	sio_mask(0xcd6, 0x44, 0x80, 0x80); /* TBL# */
+	sio_mask(0xcd6, 0x46, 0x04, 0x04); /* WP# */
+
+	return 0;
+}
+
 static int board_ibm_x3455(const char *name)
 {
 	/* raise gpio13 */
@@ -1435,6 +1444,7 @@ 
 	{0x1106, 0x3227, 0x1458, 0x5001,  0x10ec, 0x8139, 0x1458, 0xe000, NULL,          NULL,         NULL,          "GIGABYTE",    "GA-7VT600",             0,   OK, it8705f_write_enable_2e},
 	{0x10DE, 0x0050, 0x1458, 0x0C11,  0x10DE, 0x005e, 0x1458, 0x5000, NULL,          NULL,         NULL,          "GIGABYTE",    "GA-K8N-SLI",            0,   OK, nvidia_mcp_gpio21_raise},
 	{0x1166, 0x0223, 0x103c, 0x320d,  0x102b, 0x0522, 0x103c, 0x31fa, NULL,          "hp",         "dl145_g3",    "HP",          "DL145 G3",              0,   OK, board_hp_dl145_g3_enable},
+	{0x1166, 0x0223, 0x103c, 0x320d,  0x102b, 0x0522, 0x103c, 0x31fa, NULL,          "hp",         "dl165_g6",    "HP",          "DL165 G6",              0,   OK, board_hp_dl165_g6_enable},
 	{0x8086, 0x2415, 0x103c, 0x1249,  0x10b7, 0x9200, 0x103c, 0x1246, NULL,          NULL,         NULL,          "HP",          "Vectra VL400",          0,   OK, board_hp_vl400}, 
 	{0x8086, 0x1a30, 0x103c, 0x1a30,  0x8086, 0x2443, 0x103c, 0x2440, "^VL420$",     NULL,         NULL,          "HP",          "VL420 SFF",             0,   OK, intel_ich_gpio22_raise},
 	{0x8086, 0x27A0,      0,      0,  0x8086, 0x27B9,      0,      0, NULL,          "ibase",      "mb899",       "iBASE",       "MB899",                 0,   NT, intel_ich_gpio26_raise},