Patchwork : fixing a typo in rs780_gfx

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Submitter Bao, Zheng
Date 2010-06-03 06:24:43
Message ID <DD1CC71B621B004FA76856E5129D6B1703C75FFE@sbjgexmb1.amd.com>
Download mbox | patch
Permalink /patch/1449/
State Accepted, archived
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Comments

Bao, Zheng - 2010-06-03 06:24:43
The code was ported. Now it is what it should be.

Signed-off-by: Zheng Bao <zheng.bao@amd.com>

 	*(GpuF0MMReg + 0x2000/4) = 0x00000011;
 	*(GpuF0MMReg + 0x200c/4) = 0x00000020;
Stefan Reinauer - 2010-06-03 07:33:58
On 6/3/10 8:24 AM, Bao, Zheng wrote:
> The code was ported. Now it is what it should be.
>
> Signed-off-by: Zheng Bao <zheng.bao@amd.com>
>   
Acked-by: Stefan Reinauer <stepan@coresystems.de>
> Index: src/southbridge/amd/rs780/rs780_gfx.c
> ===================================================================
> --- src/southbridge/amd/rs780/rs780_gfx.c	(revision 5605)
> +++ src/southbridge/amd/rs780/rs780_gfx.c	(working copy)
> @@ -337,7 +337,7 @@
>  	value = nbmc_read_index(nb_dev, 0x10);
>  	*(GpuF0MMReg + 0x2000/4) = 0x11;
>  	*(GpuF0MMReg + 0x2180/4) =
> ((value&0xff00)>>8)|((value&0xff000000)>>8);
> -	*(GpuF0MMReg + 0x2c04/4) = ((value&0xff0)<<8);
> +	*(GpuF0MMReg + 0x2c04/4) = ((value&0xff00)<<8);
>  	*(GpuF0MMReg + 0x5428/4) =
> ((value&0xffff0000)+0x10000)-((value&0xffff)<<16);
>  	*(GpuF0MMReg + 0x2000/4) = 0x00000011;
>  	*(GpuF0MMReg + 0x200c/4) = 0x00000020;
>

Patch

Index: src/southbridge/amd/rs780/rs780_gfx.c
===================================================================
--- src/southbridge/amd/rs780/rs780_gfx.c	(revision 5605)
+++ src/southbridge/amd/rs780/rs780_gfx.c	(working copy)
@@ -337,7 +337,7 @@ 
 	value = nbmc_read_index(nb_dev, 0x10);
 	*(GpuF0MMReg + 0x2000/4) = 0x11;
 	*(GpuF0MMReg + 0x2180/4) =
((value&0xff00)>>8)|((value&0xff000000)>>8);
-	*(GpuF0MMReg + 0x2c04/4) = ((value&0xff0)<<8);
+	*(GpuF0MMReg + 0x2c04/4) = ((value&0xff00)<<8);
 	*(GpuF0MMReg + 0x5428/4) =
((value&0xffff0000)+0x10000)-((value&0xffff)<<16);