From patchwork Tue Jun 8 00:29:01 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Subject: [RFC] National Semiconductor DP83815 NIC patch Date: Tue, 08 Jun 2010 00:29:01 -0000 From: Andrew Morgan X-Patchwork-Id: 1486 Message-Id: <4C0D8ECD.6000401@ziltro.com> To: Carl-Daniel Hailfinger , flashrom On 07/06/10 23:47, Carl-Daniel Hailfinger wrote: > Are you sure? AFAICS your code can't support more than 64 kB because it > truncates the address to 16 bits. Due to that, it should definitely set > max_rom_decode.parallel. You can try changing the address mask, and if > that give you good readbacks, you can still increase the size. However, > in the end every programmer with parallel flash has to set this limit to > make flashing safe for users. > Good point. :) I have set it to 128K now, see comment in patch. I hope the comment is ok. > TODO: > Please send a patch which sets max_rom_decode.parallel to a size which > makes sense (i.e. 65536 with the current code) and please add printing > of the programmer PCI devices to print.c and print_wiki.c. > It would be cool if you could add some info to the man page as well. > Just copy and paste from an existing programmer there. Done with the exception of the man page, as CONFIG_NICNATSEMI is off by default it wouldn't make sense to be in the man page yet, and I don't really know the syntax. I could probably just copy '...nicrealtek...' like I have done in other places though... ;) print.c doesn't pad the PCI bus IDs: (0020/0022) National Semiconductor DP83815/DP83816 [100b:20] (untested) National Semiconductor DP83820 [100b:22] (untested) The attached patch adds nicnatsemi to print.c and print_wiki.c, changes the address mask to use MA0-MA16 and sets the maximum decode size to 128KB. Signed-off-by Andrew Morgan Acked-by: Carl-Daniel Hailfinger Index: print_wiki.c =================================================================== --- print_wiki.c (revision 1039) +++ print_wiki.c (working copy) @@ -280,6 +280,9 @@ print_supported_pcidevs_wiki(nics_realtek); print_supported_pcidevs_wiki(nics_realteksmc1211); #endif +#if CONFIG_NICNATSEMI == 1 + print_supported_pcidevs_wiki(nics_natsemi); +#endif #if CONFIG_GFXNVIDIA == 1 print_supported_pcidevs_wiki(gfx_nvidia); #endif Index: nicnatsemi.c =================================================================== --- nicnatsemi.c (revision 1039) +++ nicnatsemi.c (working copy) @@ -43,6 +43,14 @@ buses_supported = CHIP_BUSTYPE_PARALLEL; + /* The datasheet shows address lines MA0-MA16 in one place and MA0-MA15 + * in another. My NIC has MA16 connected to A16 on the boot ROM socket + * so I'm assuming it is accessible. If not then next line wants to be + * max_rom_decode.parallel = 65536; and the mask in the read/write + * functions below wants to be 0x0000FFFF. + */ + max_rom_decode.parallel = 131072; + return 0; } @@ -56,7 +64,7 @@ void nicnatsemi_chip_writeb(uint8_t val, chipaddr addr) { - OUTL((uint32_t)addr & 0x0000FFFF, io_base_addr + BOOT_ROM_ADDR); + OUTL((uint32_t)addr & 0x0001FFFF, io_base_addr + BOOT_ROM_ADDR); /* * The datasheet requires 32 bit accesses to this register, but it seems * that requirement might only apply if the register is memory mapped. @@ -70,7 +78,7 @@ uint8_t nicnatsemi_chip_readb(const chipaddr addr) { - OUTL(((uint32_t)addr & 0x0000FFFF), io_base_addr + BOOT_ROM_ADDR); + OUTL(((uint32_t)addr & 0x0001FFFF), io_base_addr + BOOT_ROM_ADDR); /* * The datasheet requires 32 bit accesses to this register, but it seems * that requirement might only apply if the register is memory mapped. Index: print.c =================================================================== --- print.c (revision 1039) +++ print.c (working copy) @@ -219,7 +219,7 @@ print_supported_boards_helper(boards_known, "boards"); print_supported_boards_helper(laptops_known, "laptops"); #endif -#if CONFIG_NIC3COM+CONFIG_NICREALTEK+CONFIG_GFXNVIDIA+CONFIG_DRKAISER+CONFIG_SATASII+CONFIG_ATAHPT >= 1 +#if CONFIG_NIC3COM+CONFIG_NICREALTEK+CONFIG_NICNATSEMI+CONFIG_GFXNVIDIA+CONFIG_DRKAISER+CONFIG_SATASII+CONFIG_ATAHPT >= 1 printf("\nSupported PCI devices flashrom can use " "as programmer:\n\n"); #endif @@ -230,6 +230,9 @@ print_supported_pcidevs(nics_realtek); print_supported_pcidevs(nics_realteksmc1211); #endif +#if CONFIG_NICNATSEMI == 1 + print_supported_pcidevs(nics_natsemi); +#endif #if CONFIG_GFXNVIDIA == 1 print_supported_pcidevs(gfx_nvidia); #endif