Add initial support for flashing some NVIDIA graphics cards.
The new option is '-p gfxnvidia', rest of the interface is as usual.
I tested a successful identify and read on a "RIVA TNT2 Model 64/Model 64 Pro"
card for now, erase and write did NOT work properly so far!
Please do not attempt to write/erase cards yet, unless you can recover!
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
===================================================================
@@ -148,6 +148,8 @@
.sp
.BR "* satasii" " (for flash ROMs on Silicon Image SATA/IDE controllers)"
.sp
+.BR "* gfxnvidia" " (for flash ROMs on NVIDIA graphics cards)"
+.sp
.BR "* it87spi" " (for flash ROMs behind an ITE IT87xx Super I/O LPC/SPI translation unit)"
.sp
.BR "* ft2232spi" " (for flash ROMs attached to a FT2232H/FT4232H based USB SPI programmer)"
@@ -182,7 +184,8 @@
.sp
Currently the following programmers support this mechanism:
.BR nic3com ,
-.BR satasii .
+.BR satasii ,
+.BR gfxnvidia .
.sp
The ft2232spi has an optional parameter specifying the controller type and
interface/port it should support. For that you have to use the
===================================================================
@@ -88,6 +88,7 @@
#define PROGRAMMER_IT87SPI 0x04
#define PROGRAMMER_FT2232SPI 0x05
#define PROGRAMMER_SERPROG 0x06
+#define PROGRAMMER_GFXNVIDIA 0x07
struct programmer_entry {
const char *vendor;
@@ -367,6 +368,13 @@
uint8_t satasii_chip_readb(const chipaddr addr);
extern struct pcidev_status satas_sii[];
+/* gfxnvidia.c */
+int gfxnvidia_init(void);
+int gfxnvidia_shutdown(void);
+void gfxnvidia_chip_writeb(uint8_t val, chipaddr addr);
+uint8_t gfxnvidia_chip_readb(const chipaddr addr);
+extern struct pcidev_status gfx_nvidia[];
+
/* ft2232_spi.c */
#define FTDI_FT2232H 0x6010
#define FTDI_FT4232H 0x6011
===================================================================
@@ -0,0 +1,100 @@
+/*
+ * This file is part of the flashrom project.
+ *
+ * Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#include <stdlib.h>
+#include <string.h>
+#include <fcntl.h>
+#include <sys/types.h>
+#include <sys/stat.h>
+#include <errno.h>
+#include "flash.h"
+
+#define PCI_VENDOR_ID_NVIDIA 0x10de
+
+uint8_t *nvidia_bar;
+
+struct pcidev_status gfx_nvidia[] = {
+ {0x10de, 0x0010, PCI_NT, "NVIDIA", "Mutara V08 [NV2]" },
+ {0x10de, 0x0018, PCI_NT, "NVIDIA", "RIVA 128" },
+ {0x10de, 0x0020, PCI_NT, "NVIDIA", "RIVA TNT" },
+ {0x10de, 0x0028, PCI_NT, "NVIDIA", "RIVA TNT2/TNT2 Pro" },
+ {0x10de, 0x0029, PCI_NT, "NVIDIA", "RIVA TNT2 Ultra" },
+ {0x10de, 0x002c, PCI_NT, "NVIDIA", "Vanta/Vanta LT" },
+ {0x10de, 0x002d, PCI_NT, "NVIDIA", "RIVA TNT2 Model 64/Model 64 Pro" },
+ {0x10de, 0x00a0, PCI_NT, "NVIDIA", "Aladdin TNT2" },
+ {0x10de, 0x0100, PCI_NT, "NVIDIA", "GeForce 256" },
+ {0x10de, 0x0101, PCI_NT, "NVIDIA", "GeForce DDR" },
+ {0x10de, 0x0103, PCI_NT, "NVIDIA", "Quadro" },
+ {0x10de, 0x0110, PCI_NT, "NVIDIA", "GeForce2 MX" },
+ {0x10de, 0x0111, PCI_NT, "NVIDIA", "GeForce2 MX" },
+ {0x10de, 0x0112, PCI_NT, "NVIDIA", "GeForce2 GO" },
+ {0x10de, 0x0113, PCI_NT, "NVIDIA", "Quadro2 MXR" },
+ {0x10de, 0x0150, PCI_NT, "NVIDIA", "GeForce2 GTS/Pro" },
+ {0x10de, 0x0151, PCI_NT, "NVIDIA", "GeForce2 GTS" },
+ {0x10de, 0x0152, PCI_NT, "NVIDIA", "GeForce2 Ultra" },
+ {0x10de, 0x0153, PCI_NT, "NVIDIA", "Quadro2 Pro" },
+ {0x10de, 0x0200, PCI_NT, "NVIDIA", "GeForce 3 nFX" },
+ {0x10de, 0x0201, PCI_NT, "NVIDIA", "GeForce 3 nFX" },
+ {0x10de, 0x0202, PCI_NT, "NVIDIA", "GeForce 3 nFX Ultra" },
+ {0x10de, 0x0203, PCI_NT, "NVIDIA", "Quadro 3 DDC" },
+
+ {},
+};
+
+int gfxnvidia_init(void)
+{
+ get_io_perms();
+
+ io_base_addr = pcidev_init(PCI_VENDOR_ID_NVIDIA, gfx_nvidia);
+ io_base_addr += 0x300000;
+ printf("Detected NVIDIA I/O base address: 0x%x.\n", io_base_addr);
+
+ /* Allow access to flash interface (will disable screen). */
+ pci_write_long(pcidev_dev, 0x50, 0x00);
+
+ nvidia_bar = physmap("NVIDIA", io_base_addr, 16 * 1024 * 1024);
+
+ buses_supported = CHIP_BUSTYPE_PARALLEL;
+
+ return 0;
+}
+
+int gfxnvidia_shutdown(void)
+{
+ /* Disallow access to flash interface (and re-enable screen). */
+ pci_write_long(pcidev_dev, 0x50, 0x01);
+
+ free(pcidev_bdf);
+ pci_cleanup(pacc);
+#if defined(__FreeBSD__) || defined(__DragonFly__)
+ close(io_fd);
+#endif
+ return 0;
+}
+
+void gfxnvidia_chip_writeb(uint8_t val, chipaddr addr)
+{
+ mmio_writeb(val, nvidia_bar + addr);
+}
+
+uint8_t gfxnvidia_chip_readb(const chipaddr addr)
+{
+ return mmio_readb(nvidia_bar + addr);
+}
===================================================================
@@ -50,7 +50,7 @@
flashrom.o w39v080fa.o sharplhf00l04.o w29ee011.o spi.o it87spi.o \
ichspi.o w39v040c.o sb600spi.o wbsio_spi.o m29f002.o internal.o \
dummyflasher.o pcidev.o nic3com.o satasii.o ft2232_spi.o serprog.o \
- print.o
+ print.o gfxnvidia.o
all: pciutils features dep $(PROGRAM)
===================================================================
@@ -146,6 +146,22 @@
.delay = serprog_delay,
},
+ {
+ .init = gfxnvidia_init,
+ .shutdown = gfxnvidia_shutdown,
+ .map_flash_region = fallback_map,
+ .unmap_flash_region = fallback_unmap,
+ .chip_readb = gfxnvidia_chip_readb,
+ .chip_readw = fallback_chip_readw,
+ .chip_readl = fallback_chip_readl,
+ .chip_readn = fallback_chip_readn,
+ .chip_writeb = gfxnvidia_chip_writeb,
+ .chip_writew = fallback_chip_writew,
+ .chip_writel = fallback_chip_writel,
+ .chip_writen = fallback_chip_writen,
+ .delay = internal_delay,
+ },
+
{},
};
@@ -493,7 +509,7 @@
" -z | --list-supported-wiki: print supported devices in wiki syntax\n"
" -p | --programmer <name>: specify the programmer device\n"
" (internal, dummy, nic3com, satasii,\n"
- " it87spi, ft2232spi, serprog)\n"
+ " gfxnvidia, it87spi, ft2232spi, serprog)\n"
" -h | --help: print this help text\n"
" -R | --version: print the version (release)\n"
"\nYou can specify one of -E, -r, -w, -v or no operation. If no operation is\n"
@@ -645,6 +661,10 @@
programmer = PROGRAMMER_SATASII;
if (optarg[7] == '=')
pcidev_bdf = strdup(optarg + 8);
+ } else if (strncmp(optarg, "gfxnvidia", 9) == 0) {
+ programmer = PROGRAMMER_GFXNVIDIA;
+ if (optarg[9] == '=')
+ pcidev_bdf = strdup(optarg + 10);
} else if (strncmp(optarg, "it87spi", 7) == 0) {
programmer = PROGRAMMER_IT87SPI;
} else if (strncmp(optarg, "ft2232spi", 9) == 0) {