Patchwork add support for Asus P4S800-MX

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Submitter David Borg
Date 2010-07-28 01:06:12
Message ID <AANLkTimROgL7gtNGi143FFfPiN+kp=LEU_Z2VwfGNK=z@mail.gmail.com>
Download mbox | patch
Permalink /patch/1691/
State Superseded
Headers show

Comments

David Borg - 2010-07-28 01:06:12
Updated the patch to remove anything related to chip  (un)locking, as there
is no way to unlock the superio except by a cold reset.

Logs for the different flashrom runs and the outputs of lspci -nnvvvxxx and
superiotool -deV are also attached.

w836xx_memw_enable will work for this board, however i'd still like to see
the function corrected for completeness sake. I haven't yet found a
datasheet for a superio in the w83627 family where the function is correct,
and the supported superio's all work with sio_mask(port, 0x24, 0x28, 0x38);
Perhaps it should be fixed in a separate patch?

Regards,
David

On 1 July 2010 11:50, David Borg <borg.db@gmail.com> wrote:

> Patch to add support for the Asus P4S800-MX motherboard and SIS 963
> chipset. Invalidates previous patch: [PATCH] add support for SIS963
>
> If anyone has the output of superiotool -deV for the following working
> boards, please forward them, so I can merge the functions
> w836xx_unlock_memw_enable_2e and w836xx_memw_enable_2e, and maybe fix
> the function w836xx_memw_enable which I believe has a typo, such that
>                sio_mask(port, 0x24, 0x28, 0x28);
> becomes : sio_mask(port, 0x24, 0x28, 0x38);
>
> Motherboards:
> Albatron - PM266A Pro
> ASUS - A7V8X-MX SE
> EPoX - EP-8K5A2
> Shuttle - AK31
> Tyan - S2498 (Tomcat K7M)
> Termtek - TK-3370 (Rev:2.5B)
> MSI - MS-6590 (KT4 Ultra)
> MSI - MS-6712 (KT4V)
> MSI - MS-7005 (651M-L)
>
> Signed-off-by: David Borg <borg.db@gmail.com>
>
> Regards,
> David
>

Patch

Index: chipset_enable.c
===================================================================
--- chipset_enable.c	(revision 1112)
+++ chipset_enable.c	(working copy)
@@ -198,6 +198,25 @@ 
 	return ret;
 }
 
+static int enable_flash_sis963(struct pci_dev *dev, const char *name)
+{
+	uint8_t tmp;
+
+	/***************************************************************/
+	/* Initialise South-Bridge to enable communication with SuperIO
+	 * for ROM access. No supporting documentation, however it works.
+	 */
+
+	tmp = pci_read_byte(dev, 0x45);
+	tmp &= ~0x80;
+	tmp |= 0x40;
+	pci_write_byte(dev, 0x45, tmp);
+
+	/****************************************************************/
+
+	return 0;
+}
+
 /* Datasheet:
  *   - Name: 82371AB PCI-TO-ISA / IDE XCELERATOR (PIIX4)
  *   - URL: http://www.intel.com/design/intarch/datashts/290562.htm
@@ -1231,6 +1250,7 @@ 
 	{0x1039, 0x0746, NT, "SiS", "746",		enable_flash_sis540},
 	{0x1039, 0x0748, NT, "SiS", "748",		enable_flash_sis540},
 	{0x1039, 0x0755, NT, "SiS", "755",		enable_flash_sis540},
+	{0x1039, 0x0963, OK, "SiS", "963",              enable_flash_sis963},
 	/* VIA northbridges */
 	{0x1106, 0x0585, NT, "VIA", "VT82C585VPX",	via_no_byte_merge},
 	{0x1106, 0x0595, NT, "VIA", "VT82C595",		via_no_byte_merge},
Index: board_enable.c
===================================================================
--- board_enable.c	(revision 1112)
+++ board_enable.c	(working copy)
@@ -352,7 +352,9 @@ 
 }
 
 /**
- * w83627: Enable MEMW# and set ROM size to max.
+ * Enable MEMW# and set ROM size to max.
+ * Supported chips:
+ * W83L517D, W83697HF/F/HG, W83697SF/UF/UG
  */
 static void w836xx_memw_enable(uint16_t port)
 {
@@ -1715,6 +1717,7 @@ 
 	{0x8086, 0x24D3, 0x1043, 0x80A6,  0x8086, 0x2578, 0x1043, 0x80F6, NULL,          NULL,         NULL,          "ASUS",        "P4C800-E Deluxe",       0,   OK, intel_ich_gpio21_raise},
 	{0x8086, 0x2570, 0x1043, 0x80F2,  0x105A, 0x3373, 0x1043, 0x80F5, NULL,          NULL,         NULL,          "ASUS",        "P4P800-E Deluxe",       0,   OK, intel_ich_gpio21_raise},
 	{0x8086, 0x2570, 0x1043, 0x80A5,  0x105A, 0x24D3, 0x1043, 0x80A6, NULL,          NULL,         NULL,          "ASUS",        "P4SD-LA",               0,   NT, intel_ich_gpio32_raise},
+	{0x1039, 0x0963,      0,      0,  0x1039, 0x0661,      0,      0, "^P4S800-MX$", NULL,         NULL,          "ASUS",        "P4S800-MX",           512,   OK, w836xx_memw_enable_2e},
 	{0x10B9, 0x1541,      0,      0,  0x10B9, 0x1533,      0,      0, "^P5A$",       "asus",       "p5a",         "ASUS",        "P5A",                   0,   OK, board_asus_p5a},
 	{0x10DE, 0x0030, 0x1043, 0x818a,  0x8086, 0x100E, 0x1043, 0x80EE, NULL,          NULL,         NULL,          "ASUS",        "P5ND2-SLI Deluxe",      0,   OK, nvidia_mcp_gpio10_raise},
 	{0x8086, 0x24dd, 0x1043, 0x80a6,  0x8086, 0x2570, 0x1043, 0x8157, NULL,          NULL,         NULL,          "ASUS",        "P5PE-VM",               0,   OK, intel_ich_gpio21_raise},