From patchwork Fri Jul 30 18:17:29 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Subject: Board enable for Asus P4S800-MX Date: Fri, 30 Jul 2010 18:17:29 -0000 From: David Borg X-Patchwork-Id: 1704 Message-Id: To: flashrom@flashrom.org Re-sent the same patch as a file, as it lost all formatting in the text. PS. the subsystem ID has been left blank as the PCI bridge has no subsystem ID. On 30 July 2010 19:42, David Borg wrote: > > Tested and works. Thanks to Carl-Daniel Hailfinger for simplifying the > chipset enable for this board! > > Index: board_enable.c > =================================================================== > --- board_enable.c    (revision 1127) > +++ board_enable.c    (working copy) > @@ -352,7 +352,9 @@ >  } > >  /** > - * w83627: Enable MEMW# and set ROM size to max. > + * Enable MEMW# and set ROM size to max. > + * Supported chips: > + * W83L517D, W83697HF/F/HG, W83697SF/UF/UG >   */ >  static void w836xx_memw_enable(uint16_t port) >  { > @@ -1715,6 +1717,7 @@ >      {0x8086, 0x24D3, 0x1043, 0x80A6,  0x8086, 0x2578, 0x1043, 0x80F6, > NULL,          NULL,         NULL,          "ASUS",        "P4C800-E > Deluxe",       0,   OK, intel_ich_gpio21_raise}, >      {0x8086, 0x2570, 0x1043, 0x80F2,  0x105A, 0x3373, 0x1043, 0x80F5, > NULL,          NULL,         NULL,          "ASUS",        "P4P800-E > Deluxe",       0,   OK, intel_ich_gpio21_raise}, >      {0x8086, 0x2570, 0x1043, 0x80A5,  0x105A, 0x24D3, 0x1043, 0x80A6, > NULL,          NULL,         NULL,          "ASUS",        "P4SD-LA", >              0,   NT, intel_ich_gpio32_raise}, > +    {0x1039, 0x0661, 0x1043, 0x8113,  0x1039, 0x0003,     0,       0, > "^P4S800-MX$", NULL,         NULL,          "ASUS", > "P4S800-MX",           512,   OK, w836xx_memw_enable_2e}, >      {0x10B9, 0x1541,      0,      0,  0x10B9, 0x1533,      0,      0, > "^P5A$",       "asus",       "p5a",         "ASUS",        "P5A", >              0,   OK, board_asus_p5a}, >      {0x10DE, 0x0030, 0x1043, 0x818a,  0x8086, 0x100E, 0x1043, 0x80EE, > NULL,          NULL,         NULL,          "ASUS",        "P5ND2-SLI > Deluxe",      0,   OK, nvidia_mcp_gpio10_raise}, >      {0x8086, 0x24dd, 0x1043, 0x80a6,  0x8086, 0x2570, 0x1043, 0x8157, > NULL,          NULL,         NULL,          "ASUS",        "P5PE-VM", >              0,   OK, intel_ich_gpio21_raise}, > > Signed-off-by: David Borg > > > > On 28 July 2010 03:06, David Borg wrote: > > > > Updated the patch to remove anything related to chip  (un)locking, as there is no way to unlock the superio except by a cold reset. > > > > Logs for the different flashrom runs and the outputs of lspci -nnvvvxxx and superiotool -deV are also attached. > > > > w836xx_memw_enable will work for this board, however i'd still like to see the function corrected for completeness sake. I haven't yet found a datasheet for a superio in the w83627 family where the function is correct, and the supported superio's all work with sio_mask(port, 0x24, 0x28, 0x38); Perhaps it should be fixed in a separate patch? > > > > Regards, > > David > > > > On 1 July 2010 11:50, David Borg wrote: > >> > >> Patch to add support for the Asus P4S800-MX motherboard and SIS 963 > >> chipset. Invalidates previous patch: [PATCH] add support for SIS963 > >> > >> If anyone has the output of superiotool -deV for the following working > >> boards, please forward them, so I can merge the functions > >> w836xx_unlock_memw_enable_2e and w836xx_memw_enable_2e, and maybe fix > >> the function w836xx_memw_enable which I believe has a typo, such that > >>                sio_mask(port, 0x24, 0x28, 0x28); > >> becomes : sio_mask(port, 0x24, 0x28, 0x38); > >> > >> Motherboards: > >> Albatron - PM266A Pro > >> ASUS - A7V8X-MX SE > >> EPoX - EP-8K5A2 > >> Shuttle - AK31 > >> Tyan - S2498 (Tomcat K7M) > >> Termtek - TK-3370 (Rev:2.5B) > >> MSI - MS-6590 (KT4 Ultra) > >> MSI - MS-6712 (KT4V) > >> MSI - MS-7005 (651M-L) > >> > >> Signed-off-by: David Borg > >> > >> Regards, > >> David > > > > > > > > -- > > David Borg > > > > -- > David Borg --- David Borg Index: board_enable.c =================================================================== --- board_enable.c (revision 1127) +++ board_enable.c (working copy) @@ -352,7 +352,9 @@ } /** - * w83627: Enable MEMW# and set ROM size to max. + * Enable MEMW# and set ROM size to max. + * Supported chips: + * W83L517D, W83697HF/F/HG, W83697SF/UF/UG */ static void w836xx_memw_enable(uint16_t port) { @@ -1715,6 +1717,7 @@ {0x8086, 0x24D3, 0x1043, 0x80A6, 0x8086, 0x2578, 0x1043, 0x80F6, NULL, NULL, NULL, "ASUS", "P4C800-E Deluxe", 0, OK, intel_ich_gpio21_raise}, {0x8086, 0x2570, 0x1043, 0x80F2, 0x105A, 0x3373, 0x1043, 0x80F5, NULL, NULL, NULL, "ASUS", "P4P800-E Deluxe", 0, OK, intel_ich_gpio21_raise}, {0x8086, 0x2570, 0x1043, 0x80A5, 0x105A, 0x24D3, 0x1043, 0x80A6, NULL, NULL, NULL, "ASUS", "P4SD-LA", 0, NT, intel_ich_gpio32_raise}, + {0x1039, 0x0661, 0x1043, 0x8113, 0x1039, 0x0003, 0, 0, "^P4S800-MX$", NULL, NULL, "ASUS", "P4S800-MX", 512, OK, w836xx_memw_enable_2e}, {0x10B9, 0x1541, 0, 0, 0x10B9, 0x1533, 0, 0, "^P5A$", "asus", "p5a", "ASUS", "P5A", 0, OK, board_asus_p5a}, {0x10DE, 0x0030, 0x1043, 0x818a, 0x8086, 0x100E, 0x1043, 0x80EE, NULL, NULL, NULL, "ASUS", "P5ND2-SLI Deluxe", 0, OK, nvidia_mcp_gpio10_raise}, {0x8086, 0x24dd, 0x1043, 0x80a6, 0x8086, 0x2570, 0x1043, 0x8157, NULL, NULL, NULL, "ASUS", "P5PE-VM", 0, OK, intel_ich_gpio21_raise},