Patchwork Ban device scan to get serialport on ASUS M4A77TD-PRO

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Submitter xdrudis
Date 2010-08-16 22:52:43
Message ID <20100816225243.GC6706@ideafix.casa.ct>
Download mbox | patch
Permalink /patch/1756/
State New
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Comments

xdrudis - 2010-08-16 22:52:43
On Mon, Aug 16, 2010 at 06:21:31PM +0200, Xavi Drudis Ferran wrote:
> > Xavi Drudis Ferran wrote:
> >> 1.- In order to get sb700_lpc_init in sb700_early_setup.c to work
> >> I've got to modifiy pci_locate_device in order to refrain from
> >> scanning some functions in pci bus 0.
> >
> > Hm. Which fn?
> 
> Sorry, I should have said devices. I think it scans every function of every device, reg. 00
> and I told it not to do so for any function of some devices (those with nothing attached
> in my board). I'll send the patch later.
> 

Here's the patch. I'll attach lspci output with the propietary BIOS 
in order to compare with the excluded devices. I'm testing without 
the Nvidia VGA, though. 
With svn 5701 + the earlier patch patch.warnerror + patch.serial1 
that I'll attach here, my mainboard outputs to serial and stops 
at setAMDMSR (after start other cores, so I might misread the log)

> >
> > I don't know if it makes sense. That's not neccessarily the case. It
> > depends on if the SB700 can have a different BDF on different boards.
> >
> 
> I'd say no, but what do I know?
> 
> >
> >> but then I wonder whether my change is acceptable for other
> >> mainboards,
> >
> > No, I don't think it is.
> >
>

Please don't commit this patch. It's just an illustration on 
what I did to have serial output, but it may break other boards,
or (I don't think so) the same mainboard with other hardware attached. 

It seems I have to sign off even if I'm asking not to be commited so: 

Signed off by: Xavi Drudis Ferran <xdrudis@tinet.cat>

> >
> > In general nothing should be hard coded that is not hard coded in
> > documentation. Ie. if BDF *can* change, then it can not be hard
> > coded. However, the BDF should already be available from
> > devicetree.cb, and hopefully that can be used also for early setup.
> >
> 
> Ah, I'll see how to access de devicetree.cb, then. But I think it was
> hardcoded in docs. They said dev 0 func 0x14 IIRC. I'll check again.
> 

I'm rereading docs for SB700 linked from 
http://www.coreboot.org/Datasheets#AMD_SB700.2FSB710.2FSB750

And I only see hardcoded BDF in the docs (in diagrams, chapter titles, 
text and assembler examples). 

So I thik I'll change 
sb700_early_init to use hardcoded BDF unless someone thinks otherwise.


> 
> Ok. I have to clean up the code a little and incorporate las weekend svn changes,
> and then I'll break the changes in patches and start sending them. Beware
> that they are not completely tested (my board does not boot yet).
>

It's getting late. I'll continue tomorrow.
-[0000:00]-+-00.0  ATI Technologies Inc RX780/RX790 Chipset Host Bridge [1002:5957]
           +-02.0-[0000:01]----00.0  nVidia Corporation GeForce 8400 GS [10de:06e4]
           +-0a.0-[0000:02]----00.0  Realtek Semiconductor Co., Ltd. RTL8111/8168B PCI Express Gigabit Ethernet controller [10ec:8168]
           +-11.0  ATI Technologies Inc SB700/SB800 SATA Controller [AHCI mode] [1002:4391]
           +-12.0  ATI Technologies Inc SB700/SB800 USB OHCI0 Controller [1002:4397]
           +-12.1  ATI Technologies Inc SB700 USB OHCI1 Controller [1002:4398]
           +-12.2  ATI Technologies Inc SB700/SB800 USB EHCI Controller [1002:4396]
           +-13.0  ATI Technologies Inc SB700/SB800 USB OHCI0 Controller [1002:4397]
           +-13.1  ATI Technologies Inc SB700 USB OHCI1 Controller [1002:4398]
           +-13.2  ATI Technologies Inc SB700/SB800 USB EHCI Controller [1002:4396]
           +-14.0  ATI Technologies Inc SBx00 SMBus Controller [1002:4385]
           +-14.1  ATI Technologies Inc SB700/SB800 IDE Controller [1002:439c]
           +-14.2  ATI Technologies Inc SBx00 Azalia (Intel HDA) [1002:4383]
           +-14.3  ATI Technologies Inc SB700/SB800 LPC host controller [1002:439d]
           +-14.4-[0000:03]--
           +-14.5  ATI Technologies Inc SB700/SB800 USB OHCI2 Controller [1002:4399]
           +-18.0  Advanced Micro Devices [AMD] Family 10h [Opteron, Athlon64, Sempron] HyperTransport Configuration [1022:1200]
           +-18.1  Advanced Micro Devices [AMD] Family 10h [Opteron, Athlon64, Sempron] Address Map [1022:1201]
           +-18.2  Advanced Micro Devices [AMD] Family 10h [Opteron, Athlon64, Sempron] DRAM Controller [1022:1202]
           +-18.3  Advanced Micro Devices [AMD] Family 10h [Opteron, Athlon64, Sempron] Miscellaneous Control [1022:1203]
           \-18.4  Advanced Micro Devices [AMD] Family 10h [Opteron, Athlon64, Sempron] Link Control [1022:1204]

Patch

Index: src/arch/i386/include/arch/romcc_io.h
===================================================================
--- src/arch/i386/include/arch/romcc_io.h	(revision 5682)
+++ src/arch/i386/include/arch/romcc_io.h	(working copy)
@@ -243,17 +243,26 @@ 
         pci_io_write_config32(dev, where, value);
 #endif
 }
+static inline __attribute__((always_inline)) int forbidden_dev_for_locate(device_t dev) 
+{  // empty pci slots hang pci_locate_device
+    device_t dev_only = (dev & PCI_DEV(0,0x1F,0));
+    return ( ((dev_only >= PCI_DEV(0,2,0)) && (dev_only <  PCI_DEV(0,0x8,0)))
+          || ((dev_only >= PCI_DEV(0,0x9,0)) && (dev_only <  PCI_DEV(0,0x11,0))             )
+           );
+}
 
 #define PCI_DEV_INVALID (0xffffffffU)
 static inline device_t pci_io_locate_device(unsigned pci_id, device_t dev)
 {
         for(; dev <= PCI_DEV(255, 31, 7); dev += PCI_DEV(0,0,1)) {
                 unsigned int id;
+                if (!forbidden_dev_for_locate(dev)) {
                 id = pci_io_read_config32(dev, 0);
                 if (id == pci_id) {
                         return dev;
                 }
         }
+        }
         return PCI_DEV_INVALID;
 }
 
@@ -261,28 +270,30 @@ 
 {
 	for(; dev <= PCI_DEV(255|(((1<<CONFIG_PCI_BUS_SEGN_BITS)-1)<<8), 31, 7); dev += PCI_DEV(0,0,1)) {
 		unsigned int id;
+                if (!forbidden_dev_for_locate(dev)) {
 		id = pci_read_config32(dev, 0);
 		if (id == pci_id) {
 			return dev;
 		}
 	}
+	}  
 	return PCI_DEV_INVALID;
 }
 
 static inline device_t pci_locate_device_on_bus(unsigned pci_id, unsigned bus)
 {
 	device_t dev, last;
-
         dev = PCI_DEV(bus, 0, 0);
         last = PCI_DEV(bus, 31, 7);
-
         for(; dev <=last; dev += PCI_DEV(0,0,1)) {
                 unsigned int id;
+                if (!forbidden_dev_for_locate(dev)) {
                 id = pci_read_config32(dev, 0);
                 if (id == pci_id) {
                         return dev;
                 }
         }
+	}
         return PCI_DEV_INVALID;
 }