===================================================================
@@ -12,6 +12,7 @@
static const char oem[8] = "COREBOOT";
static const char productid[12] = "P4DPE ";
struct mp_config_table *mc;
+ int isa_bus;
mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
memset(mc, 0, sizeof(*mc));
@@ -31,12 +32,8 @@
mc->reserved = 0;
smp_write_processors(mc);
+ mptable_write_buses(mc, NULL, &isa_bus);
-
-/*Bus: Bus ID Type*/
- smp_write_bus(mc, 0, "PCI ");
- smp_write_bus(mc, 1, "PCI ");
- smp_write_bus(mc, 2, "ISA ");
/*I/O APICs: APIC ID Version State Address*/
smp_write_ioapic(mc, 2, 0x20, 0xfec00000);
{
@@ -71,7 +68,7 @@
}
}
}
- mptable_add_isa_interrupts(mc, 0x2, 0x2, 0);
+ mptable_add_isa_interrupts(mc, isa_bus, 0x2, 0);
/*I/O Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x0, 0x40, 0x2, 0x15);
===================================================================
@@ -29,9 +29,6 @@
#include <stdint.h>
#include "../../../southbridge/via/vt8237r/vt8237r.h"
-
-#define bus_isa 2
-
static void *smp_write_config_table(void *v)
{
static const char sig[4] = "PCMP";
@@ -39,7 +36,7 @@
static const char productid[12] = "PC2500 ";
struct mp_config_table *mc;
- int bus_num;
+ int isa_bus;
mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
memset(mc, 0, sizeof(*mc));
@@ -59,21 +56,13 @@
mc->reserved = 0;
smp_write_processors(mc);
+ mptable_write_buses(mc, NULL, &isa_bus);
-
-/* Bus: Bus ID Type*/
- /* define numbers for pci and isa bus */
- for (bus_num = 0; bus_num < bus_isa; bus_num++) {
- smp_write_bus(mc, bus_num, "PCI ");
- }
- smp_write_bus(mc, bus_isa, "ISA ");
-
-
/* I/O APICs: APIC ID Version State Address*/
smp_write_ioapic(mc, VT8237R_APIC_ID, 0x20, VT8237R_APIC_BASE);
/* Now, assemble the table. */
- mptable_add_isa_interrupts(mc, bus_isa, VT8237R_APIC_ID, 0);
+ mptable_add_isa_interrupts(mc, isa_bus, VT8237R_APIC_ID, 0);
#define PCI_INT(bus, dev, fn, pin) \
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, \
===================================================================
@@ -33,6 +33,7 @@
static const char oem[8] = "COREBOOT";
static const char productid[12] = "VIA VT8454C ";
struct mp_config_table *mc;
+ int isa_bus;
mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
memset(mc, 0, sizeof(*mc));
@@ -52,18 +53,12 @@
mc->reserved = 0;
smp_write_processors(mc);
+ mptable_write_buses(mc, NULL, &isa_bus);
- /*Bus: Bus ID Type */
- smp_write_bus(mc, 0, "PCI ");
- smp_write_bus(mc, 1, "PCI ");
- smp_write_bus(mc, 2, "PCI ");
- smp_write_bus(mc, 128, "PCI ");
- smp_write_bus(mc, 129, "ISA ");
-
/* I/O APICs: APIC ID Version State Address */
smp_write_ioapic(mc, 2, 17, 0xfec00000);
- mptable_add_isa_interrupts(mc, 0x81, 0x2, 0);
+ mptable_add_isa_interrupts(mc, isa_bus, 0x2, 0);
/* I/O Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_LOW, 0x0, 0x40, 0x2, 0x14);
===================================================================
@@ -10,6 +10,7 @@
static const char oem[8] = "COREBOOT";
static const char productid[12] = "S2735 ";
struct mp_config_table *mc;
+ int isa_bus;
mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
memset(mc, 0, sizeof(*mc));
@@ -29,15 +30,7 @@
mc->reserved = 0;
smp_write_processors(mc);
-
-
-/*Bus: Bus ID Type*/
- smp_write_bus(mc, 0, "PCI ");
- smp_write_bus(mc, 1, "PCI ");
- smp_write_bus(mc, 2, "PCI ");
- smp_write_bus(mc, 3, "PCI ");
- smp_write_bus(mc, 4, "PCI ");
- smp_write_bus(mc, 5, "ISA ");
+ mptable_write_buses(mc, NULL, &isa_bus);
/*I/O APICs: APIC ID Version State Address*/
smp_write_ioapic(mc, 8, 0x20, 0xfec00000);
{
@@ -58,7 +51,7 @@
}
}
}
- mptable_add_isa_interrupts(mc, 0x5, 0x8, 0);
+ mptable_add_isa_interrupts(mc, isa_bus, 0x8, 0);
/*I/O Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#
*/
===================================================================
@@ -50,8 +50,7 @@
static const char productid[12] = "S2850 ";
struct mp_config_table *mc;
- unsigned char bus_num;
- unsigned char bus_isa;
+ int bus_isa;
unsigned char bus_chain_0;
unsigned char bus_8111_1;
unsigned apicid_base;
@@ -88,24 +87,16 @@
dev = dev_find_slot(bus_chain_0, PCI_DEVFN(0x01,0));
if (dev) {
bus_8111_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
- bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
- bus_isa++;
}
else {
printk(BIOS_DEBUG, "ERROR - could not find PCI 1:01.0, using defaults\n");
bus_8111_1 = 2;
- bus_isa = 3;
}
}
/*Bus: Bus ID Type*/
- /* define bus and isa numbers */
- for(bus_num = 0; bus_num < bus_isa; bus_num++) {
- smp_write_bus(mc, bus_num, "PCI ");
- }
- smp_write_bus(mc, bus_isa, "ISA ");
+ mptable_write_buses(mc, NULL, &bus_isa);
-
/*I/O APICs: APIC ID Version State Address*/
#if CONFIG_LOGICAL_CPUS==1
apicid_base = get_apicid_base(1);
===================================================================
@@ -48,8 +48,7 @@
static const char productid[12] = "S2875 ";
struct mp_config_table *mc;
- unsigned char bus_num;
- unsigned char bus_isa;
+ int bus_isa;
unsigned char bus_chain_0;
unsigned char bus_8111_1;
unsigned char bus_8151_1;
@@ -89,15 +88,11 @@
dev = dev_find_slot(bus_chain_0, PCI_DEVFN(0x04,0));
if (dev) {
bus_8111_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
- bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
- bus_isa++;
- printk(BIOS_DEBUG, "bus_isa=%d\n",bus_isa);
}
else {
printk(BIOS_DEBUG, "ERROR - could not find PCI 1:03.0, using defaults\n");
bus_8111_1 = 3;
- bus_isa = 4;
}
/* 8151 */
dev = dev_find_slot(bus_chain_0, PCI_DEVFN(0x02,0));
@@ -116,11 +111,7 @@
}
/*Bus: Bus ID Type*/
- /* define bus and isa numbers */
- for(bus_num = 0; bus_num < bus_isa; bus_num++) {
- smp_write_bus(mc, bus_num, "PCI ");
- }
- smp_write_bus(mc, bus_isa, "ISA ");
+ mptable_write_buses(mc, NULL, &bus_isa);
/*I/O APICs: APIC ID Version State Address*/
#if CONFIG_LOGICAL_CPUS==1
===================================================================
@@ -50,8 +50,7 @@
static const char productid[12] = "S2880 ";
struct mp_config_table *mc;
- unsigned char bus_num;
- unsigned char bus_isa;
+ int bus_isa;
unsigned char bus_chain_0;
unsigned char bus_8131_1;
unsigned char bus_8131_2;
@@ -94,14 +93,11 @@
dev = dev_find_slot(bus_chain_0, PCI_DEVFN(0x03,0));
if (dev) {
bus_8111_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
- bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
- bus_isa++;
}
else {
printk(BIOS_DEBUG, "ERROR - could not find PCI 1:03.0, using defaults\n");
bus_8111_1 = 4;
- bus_isa = 5;
}
/* 8131-1 */
dev = dev_find_slot(bus_chain_0, PCI_DEVFN(0x01,0));
@@ -128,13 +124,8 @@
}
/*Bus: Bus ID Type*/
- /* define bus and isa numbers */
- for(bus_num = 0; bus_num < bus_isa; bus_num++) {
- smp_write_bus(mc, bus_num, "PCI ");
- }
- smp_write_bus(mc, bus_isa, "ISA ");
+ mptable_write_buses(mc, NULL, &bus_isa);
-
/*I/O APICs: APIC ID Version State Address*/
#if CONFIG_LOGICAL_CPUS==1
apicid_base = get_apicid_base(3);
===================================================================
@@ -48,8 +48,7 @@
static const char productid[12] = "S4880 ";
struct mp_config_table *mc;
- unsigned char bus_num;
- unsigned char bus_isa;
+ int bus_isa;
unsigned char bus_chain_0;
unsigned char bus_8131_1;
unsigned char bus_8131_2;
@@ -93,14 +92,11 @@
dev = dev_find_slot(bus_chain_0, PCI_DEVFN(0x03,0));
if (dev) {
bus_8111_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
- bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
- bus_isa++;
}
else {
printk(BIOS_DEBUG, "ERROR - could not find PCI 1:03.0, using defaults\n");
bus_8111_1 = 4;
- bus_isa = 5;
}
/* 8131-1 */
dev = dev_find_slot(bus_chain_0, PCI_DEVFN(0x01,0));
@@ -127,13 +123,8 @@
}
/*Bus: Bus ID Type*/
- /* define bus and isa numbers */
- for(bus_num = 0; bus_num < bus_isa; bus_num++) {
- smp_write_bus(mc, bus_num, "PCI ");
- }
- smp_write_bus(mc, bus_isa, "ISA ");
+ mptable_write_buses(mc, NULL, &bus_isa);
-
/*I/O APICs: APIC ID Version State Address*/
#if CONFIG_LOGICAL_CPUS==1
apicid_base = get_apicid_base(3);
===================================================================
@@ -49,8 +49,7 @@
static const char productid[12] = "S4882 ";
struct mp_config_table *mc;
- unsigned char bus_num;
- unsigned char bus_isa;
+ int bus_isa;
unsigned char bus_chain_0;
unsigned char bus_8131_1;
unsigned char bus_8131_2;
@@ -94,14 +93,11 @@
dev = dev_find_slot(bus_chain_0, PCI_DEVFN(0x03,0));
if (dev) {
bus_8111_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
- bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
- bus_isa++;
}
else {
printk(BIOS_DEBUG, "ERROR - could not find PCI 1:03.0, using defaults\n");
bus_8111_1 = 4;
- bus_isa = 5;
}
/* 8131-1 */
dev = dev_find_slot(bus_chain_0, PCI_DEVFN(0x01,0));
@@ -128,13 +124,8 @@
}
/*Bus: Bus ID Type*/
- /* define bus and isa numbers */
- for(bus_num = 0; bus_num < bus_isa; bus_num++) {
- smp_write_bus(mc, bus_num, "PCI ");
- }
- smp_write_bus(mc, bus_isa, "ISA ");
+ mptable_write_buses(mc, NULL, &bus_isa);
-
/*I/O APICs: APIC ID Version State Address*/
#if CONFIG_LOGICAL_CPUS==1
apicid_base = get_apicid_base(3);
Hi, attached patch derives coreboot create bus data in the mptable automatically from the device tree for a couple more boards. It's build tested, but not run tested. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>