From patchwork Fri Sep  3 10:13:27 2010
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Subject: [1/2] Amd_ddr2_mct_InitPhyCompensation
Date: Fri, 03 Sep 2010 10:13:27 -0000
From: She, Kerry <Kerry.She@amd.com>
X-Patchwork-Id: 1856
Message-Id: <F53A09371FB723428826B442A4B20A4103F7C856@sbjgexmb1.amd.com>
To: <coreboot@coreboot.org>

Hello,

 

AMD DDR2 MCT function InitPhyCompensation() compliant with AGESA code.

 

Signed-off-by: Kerry She <Kerry.she@amd.com>


Index: src/northbridge/amd/amdmct/mct/mct_d.c
===================================================================
--- src/northbridge/amd/amdmct/mct/mct_d.c	(revision 5773)
+++ src/northbridge/amd/amdmct/mct/mct_d.c	(working copy)
@@ -3461,9 +3461,10 @@
 		i = 0; /* use i for the dct setting required */
 		if (pDCTstat->MAdimms[0] < 4)
 			i = 1;
-		if (((pDCTstat->Speed == 2) || (pDCTstat->Speed == 3)) && (pDCTstat->MAdimms[i] == 4))
+		if (((pDCTstat->Speed == 2) || (pDCTstat->Speed == 3)) && (pDCTstat->MAdimms[i] == 4)) {
 			dword &= 0xF18FFF18;
 			index_reg = 0x98;	/* force dct = 0 */
+		}
 	}
 
 	Set_NB32_index_wait(dev, index_reg, 0x0a, dword);