Patchwork Wait for RTC power well on vt8237r early smbus.

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Submitter Kevin O'Connor
Date 2010-09-06 15:16:58
Message ID <20100906151658.GA18582@morn.localdomain>
Download mbox | patch
Permalink /patch/1871/
State Accepted
Commit r5788
Headers show

Comments

Kevin O'Connor - 2010-09-06 15:16:58
Code must not access the smbus registers before the RTC power well is
ready (PSON gating).  Some boards boot faster than this power well
stabilization, and thus see bad data when accessing the smbus
registers.
---
 src/southbridge/via/vt8237r/vt8237r.h             |    1 +
 src/southbridge/via/vt8237r/vt8237r_early_smbus.c |    9 +++++++++
 2 files changed, 10 insertions(+), 0 deletions(-)
Peter Stuge - 2010-09-06 17:25:36
Kevin O'Connor wrote:
> Code must not access the smbus registers before the RTC power well is
> ready (PSON gating).  Some boards boot faster than this power well
> stabilization, and thus see bad data when accessing the smbus
> registers.
> ---
>  src/southbridge/via/vt8237r/vt8237r.h             |    1 +
>  src/southbridge/via/vt8237r/vt8237r_early_smbus.c |    9 +++++++++
>  2 files changed, 10 insertions(+), 0 deletions(-)

Hint: use git commit -s to add Signed-off-by: automatically.

Acked-by: Peter Stuge <peter@stuge.se>
Kevin O'Connor - 2010-09-06 18:12:50
On Mon, Sep 06, 2010 at 07:25:36PM +0200, Peter Stuge wrote:
> Kevin O'Connor wrote:
> > Code must not access the smbus registers before the RTC power well is
> > ready (PSON gating).  Some boards boot faster than this power well
> > stabilization, and thus see bad data when accessing the smbus
> > registers.
> > ---
> >  src/southbridge/via/vt8237r/vt8237r.h             |    1 +
> >  src/southbridge/via/vt8237r/vt8237r_early_smbus.c |    9 +++++++++
> >  2 files changed, 10 insertions(+), 0 deletions(-)
> 
> Hint: use git commit -s to add Signed-off-by: automatically.

Sorry about that:

Signed-off-by: Kevin O'Connor <kevin@koconnor.net>

> Acked-by: Peter Stuge <peter@stuge.se>

Thanks - I don't have commit access so someone will need to check it
in.

-Kevin

Patch

diff --git a/src/southbridge/via/vt8237r/vt8237r.h b/src/southbridge/via/vt8237r/vt8237r.h
index 54a46f8..d54c533 100644
--- a/src/southbridge/via/vt8237r/vt8237r.h
+++ b/src/southbridge/via/vt8237r/vt8237r.h
@@ -47,6 +47,7 @@ 
 #define IDE_UDMA			0x50
 
 /* SMBus */
+#define VT8237R_PSON			0x82
 #define VT8237R_POWER_WELL		0x94
 #define VT8237R_SMBUS_IO_BASE_REG	0xd0
 #define VT8237R_SMBUS_HOST_CONF		0xd2
diff --git a/src/southbridge/via/vt8237r/vt8237r_early_smbus.c b/src/southbridge/via/vt8237r/vt8237r_early_smbus.c
index 357ad81..4372a4a 100644
--- a/src/southbridge/via/vt8237r/vt8237r_early_smbus.c
+++ b/src/southbridge/via/vt8237r/vt8237r_early_smbus.c
@@ -132,12 +132,15 @@  u8 smbus_read_byte(u8 dimm, u8 offset)
 	return val;
 }
 
+#define PSONREADY_TIMEOUT 0x7fffffff
+
 /**
  * Enable the SMBus on VT8237R-based systems.
  */
 void enable_smbus(void)
 {
 	device_t dev;
+	int loops;
 
 	/* Power management controller */
 	dev = pci_locate_device(PCI_ID(PCI_VENDOR_ID_VIA,
@@ -150,6 +153,12 @@  void enable_smbus(void)
 			die("Power management controller not found\n");
 	}
 
+	/* Make sure the RTC power well is up before touching smbus. */
+	loops = 0;
+	while (!(pci_read_config8(dev, VT8237R_PSON) & (1<<6))
+	       && loops < PSONREADY_TIMEOUT)
+		++loops;
+
 	/*
 	 * 7 = SMBus Clock from RTC 32.768KHz
 	 * 5 = Internal PLL reset from susp