Patchwork [4/4] Don't preload the rom code during the VIA CAR setup.

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Submitter Kevin O'Connor
Date 2010-09-06 23:24:29
Message ID <df7421bca267f8466630965f765c18e2991c5b2b.1283815188.git.kevin@koconnor.net>
Download mbox | patch
Permalink /patch/1876/
State Accepted
Commit r5786
Headers show

Comments

Kevin O'Connor - 2010-09-06 23:24:29
It should not be necessary to read in the rom during CAR setup.
Removing the code preloading reduces the boot time.

Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
---
 src/cpu/via/car/cache_as_ram.inc |    2 ++
 1 files changed, 2 insertions(+), 0 deletions(-)
Patrick Georgi - 2010-09-07 07:10:27
Am 07.09.2010 01:24, schrieb Kevin O'Connor:
> +#ifdef CARTEST
>  	movl	REAL_XIP_ROM_BASE, %esi
>  	movl	%esi, %edi
>  	movl	$(CONFIG_XIP_ROM_SIZE>>2), %ecx
>  	rep	lodsl
> +#endif
Can this be removed altogether then?


Patrick
Kevin O'Connor - 2010-09-08 00:28:27
On Tue, Sep 07, 2010 at 09:10:27AM +0200, Patrick Georgi wrote:
> Am 07.09.2010 01:24, schrieb Kevin O'Connor:
> > +#ifdef CARTEST
> >  	movl	REAL_XIP_ROM_BASE, %esi
> >  	movl	%esi, %edi
> >  	movl	$(CONFIG_XIP_ROM_SIZE>>2), %ecx
> >  	rep	lodsl
> > +#endif
> Can this be removed altogether then?

The next few lines in the file also reference CARTEST:

#ifdef CARTEST
	movl	REAL_XIP_ROM_BASE, %esi
	movl	%esi, %edi
	movl	$(CONFIG_XIP_ROM_SIZE>>2), %ecx
	rep	lodsl
#endif

	/* The key point of this CAR code is C7 cache does not turn into
	 * "no fill" mode, which is not compatible with general CAR code.
	 */

	movl	$(CacheBase + CacheSize - 4), %eax
	movl	%eax, %esp

#ifdef CARTEST
testok:	
	post_code(0x40)
...

I think anyone wanting to run with CARTEST will want the rom preloaded
(to ensure they're doing an accurate test).

-Kevin
Patrick Georgi - 2010-09-08 10:54:03
Am 08.09.2010 02:28, schrieb Kevin O'Connor:
> I think anyone wanting to run with CARTEST will want the rom preloaded
> (to ensure they're doing an accurate test).
True.
It's in as r5786


Patrick

Patch

diff --git a/src/cpu/via/car/cache_as_ram.inc b/src/cpu/via/car/cache_as_ram.inc
index eaa4ac9..4bbefef 100644
--- a/src/cpu/via/car/cache_as_ram.inc
+++ b/src/cpu/via/car/cache_as_ram.inc
@@ -139,10 +139,12 @@  clear_fixed_var_mtrr_out:
 	xorl	$0x5c5c5c5c,%eax
 	rep	stosl
 
+#ifdef CARTEST
 	movl	REAL_XIP_ROM_BASE, %esi
 	movl	%esi, %edi
 	movl	$(CONFIG_XIP_ROM_SIZE>>2), %ecx
 	rep	lodsl
+#endif
 
 	/* The key point of this CAR code is C7 cache does not turn into
 	 * "no fill" mode, which is not compatible with general CAR code.