===================================================================
@@ -15,7 +15,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select HAVE_OPTION_TABLE
select HAVE_HARD_RESET
select HAVE_ACPI_RESUME
- select HAVE_MAINBOARD_RESOURCES
select MMCONF_SUPPORT
select HAVE_SMI_HANDLER
select BOARD_ROMSIZE_KB_1024
===================================================================
@@ -20,20 +20,13 @@
#include <types.h>
#include <device/device.h>
#include <console/console.h>
-#include <boot/tables.h>
#if defined(CONFIG_PCI_OPTION_ROM_RUN_YABEL) && CONFIG_PCI_OPTION_ROM_RUN_YABEL
#include <x86emu/x86emu.h>
#endif
#include <pc80/mc146818rtc.h>
#include <arch/io.h>
-#include <arch/coreboot_tables.h>
#include "chip.h"
-int add_mainboard_resources(struct lb_memory *mem)
-{
- return add_northbridge_resources(mem);
-}
-
#if defined(CONFIG_PCI_OPTION_ROM_RUN_YABEL) && CONFIG_PCI_OPTION_ROM_RUN_YABEL
static int int15_handler(void)
{
===================================================================
@@ -70,20 +70,26 @@ static int get_pcie_bar(u32 *base, u32 *
/* IDG memory */
uint64_t uma_memory_base=0, uma_memory_size=0;
-int add_northbridge_resources(struct lb_memory *mem)
+static void add_fixed_resources(struct device *dev, int index)
{
+ struct resource *resource;
u32 pcie_config_base, pcie_config_size;
printk(BIOS_DEBUG, "Adding UMA memory area\n");
- lb_add_memory_range(mem, LB_MEM_RESERVED,
- uma_memory_base, uma_memory_size);
-
- printk(BIOS_DEBUG, "Adding PCIe config bar\n");
- get_pcie_bar(&pcie_config_base, &pcie_config_size);
- lb_add_memory_range(mem, LB_MEM_RESERVED,
- pcie_config_base, pcie_config_size);
+ resource = new_resource(dev, index);
+ resource->base = (resource_t) uma_memory_base;
+ resource->size = (resource_t) uma_memory_size;
+ resource->flags = IORESOURCE_MEM | IORESOURCE_RESERVE |
+ IORESOURCE_FIXED | IORESOURCE_STORED | IORESOURCE_ASSIGNED;
- return 0;
+ if (get_pcie_bar(&pcie_config_base, &pcie_config_size)) {
+ printk(BIOS_DEBUG, "Adding PCIe config bar\n");
+ resource = new_resource(dev, index+1);
+ resource->base = (resource_t) pcie_config_base;
+ resource->size = (resource_t) pcie_config_size;
+ resource->flags = IORESOURCE_MEM | IORESOURCE_RESERVE |
+ IORESOURCE_FIXED | IORESOURCE_STORED | IORESOURCE_ASSIGNED;
+ }
}
static void ram_resource(device_t dev, unsigned long index, unsigned long basek,
@@ -208,6 +214,8 @@ static void pci_domain_set_resources(dev
ram_resource(dev, 5, 4096 * 1024, tomk - 4 * 1024 * 1024);
}
+ add_fixed_resources(dev, 6);
+
assign_resources(dev->link_list);
#if CONFIG_WRITE_HIGH_TABLES==1
===================================================================
@@ -36,7 +36,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select HAVE_HARD_RESET
select HAVE_ACPI_RESUME
select HAVE_ACPI_SLIC
- select HAVE_MAINBOARD_RESOURCES
select MMCONF_SUPPORT
select AP_IN_SIPI_WAIT
select UDELAY_LAPIC
===================================================================
@@ -98,11 +98,6 @@ static void mainboard_enable(device_t de
verb_setup();
}
-int add_mainboard_resources(struct lb_memory *mem)
-{
- return add_northbridge_resources(mem);
-}
-
struct chip_operations mainboard_ops = {
CHIP_NAME("Getac P470 Rugged Notebook")
.enable_dev = mainboard_enable,
===================================================================
@@ -15,7 +15,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select HAVE_HARD_RESET
select HAVE_OPTION_TABLE
select HAVE_ACPI_RESUME
- select HAVE_MAINBOARD_RESOURCES
select MMCONF_SUPPORT
select HAVE_SMI_HANDLER
select BOARD_ROMSIZE_KB_512
===================================================================
@@ -29,11 +29,6 @@
#include <arch/coreboot_tables.h>
#include "chip.h"
-int add_mainboard_resources(struct lb_memory *mem)
-{
- return add_northbridge_resources(mem);
-}
-
#if CONFIG_PCI_OPTION_ROM_RUN_YABEL
static int int15_handler(void)
{
===================================================================
@@ -36,7 +36,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select HAVE_MP_TABLE
select HAVE_ACPI_TABLES
select HAVE_ACPI_RESUME
- select HAVE_MAINBOARD_RESOURCES
select MMCONF_SUPPORT
select HAVE_ACPI_TABLES
select HAVE_SMI_HANDLER
===================================================================
@@ -23,11 +23,6 @@
#include <arch/coreboot_tables.h>
#include "chip.h"
-int add_mainboard_resources(struct lb_memory *mem)
-{
- return add_northbridge_resources(mem);
-}
-
struct chip_operations mainboard_ops = {
CHIP_NAME("Intel D945GCLF Mainboard")
};
===================================================================
@@ -134,11 +134,6 @@ static void mainboard_enable(device_t de
#endif
}
-int add_mainboard_resources(struct lb_memory *mem)
-{
- return add_northbridge_resources(mem);
-}
-
struct chip_operations mainboard_ops = {
CHIP_NAME("Roda Computer GmbH RK886EX Rugged Notebook (ROCKY3+)")
.enable_dev = mainboard_enable,
I think we should get rid of HAVE_MAINBOARD_RESOURCES. Here's a patch that does that for i945 boards. The Roda board provided add_mainboard_resources(), but it was never called because it didn't select HAVE_MAINBOARD_RESOURCES in Kconfig. Testing & suggestions welcome. Signed-off-by: Myles Watson <mylesgw@gmail.com> Thanks, Myles