From patchwork Fri Sep 24 16:22:11 2010
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Subject: fix option table race (this time for real)
Date: Fri, 24 Sep 2010 16:22:11 -0000
From: Myles Watson <mylesgw@gmail.com>
X-Patchwork-Id: 1971
Message-Id: <AANLkTimnmgMNoRF=ORiPwwCz6kG3hVniDbfDb4W+mFtv@mail.gmail.com>
To: Stefan Reinauer <stefan.reinauer@coresystems.de>
Cc: coreboot@coreboot.org

Thanks for fixing it!

Acked-by: Myles Watson <mylesgw@gmail.com>

I think it would be nice to keep the mc146818rtc.h include close to
the option table include where possible.  I did it for a few boards to
see what you thought.  It also removes a stray space.

Signed-off-by: Myles Watson <mylesgw@gmail.com>

Thanks,
Myles


Index: svn/src/mainboard/dell/s1850/romstage.c
===================================================================
--- svn.orig/src/mainboard/dell/s1850/romstage.c
+++ svn/src/mainboard/dell/s1850/romstage.c
@@ -5,7 +5,6 @@
 #include <arch/romcc_io.h>
 #include <cpu/x86/lapic.h>
 #include <stdlib.h>
-#include <pc80/mc146818rtc.h>
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "southbridge/intel/i82801ex/i82801ex_early_smbus.c"
Index: svn/src/mainboard/intel/jarrell/romstage.c
===================================================================
--- svn.orig/src/mainboard/intel/jarrell/romstage.c
+++ svn/src/mainboard/intel/jarrell/romstage.c
@@ -5,7 +5,6 @@
 #include <arch/romcc_io.h>
 #include <cpu/x86/lapic.h>
 #include <stdlib.h>
-#include <pc80/mc146818rtc.h>
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "southbridge/intel/i82801ex/i82801ex_early_smbus.c"
Index: svn/src/mainboard/supermicro/x6dai_g/romstage.c
===================================================================
--- svn.orig/src/mainboard/supermicro/x6dai_g/romstage.c
+++ svn/src/mainboard/supermicro/x6dai_g/romstage.c
@@ -5,7 +5,6 @@
 #include <arch/romcc_io.h>
 #include <cpu/x86/lapic.h>
 #include <stdlib.h>
-#include <pc80/mc146818rtc.h>
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "pc80/udelay_io.c"
Index: svn/src/mainboard/supermicro/x6dhe_g/romstage.c
===================================================================
--- svn.orig/src/mainboard/supermicro/x6dhe_g/romstage.c
+++ svn/src/mainboard/supermicro/x6dhe_g/romstage.c
@@ -5,7 +5,6 @@
 #include <arch/romcc_io.h>
 #include <cpu/x86/lapic.h>
 #include <stdlib.h>
-#include <pc80/mc146818rtc.h>
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "pc80/udelay_io.c"
Index: svn/src/mainboard/supermicro/x6dhe_g2/romstage.c
===================================================================
--- svn.orig/src/mainboard/supermicro/x6dhe_g2/romstage.c
+++ svn/src/mainboard/supermicro/x6dhe_g2/romstage.c
@@ -5,7 +5,6 @@
 #include <arch/romcc_io.h>
 #include <cpu/x86/lapic.h>
 #include <stdlib.h>
-#include <pc80/mc146818rtc.h>
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "southbridge/intel/i82801ex/i82801ex_early_smbus.c"
Index: svn/src/mainboard/supermicro/x6dhr_ig/romstage.c
===================================================================
--- svn.orig/src/mainboard/supermicro/x6dhr_ig/romstage.c
+++ svn/src/mainboard/supermicro/x6dhr_ig/romstage.c
@@ -5,7 +5,6 @@
 #include <arch/romcc_io.h>
 #include <cpu/x86/lapic.h>
 #include <stdlib.h>
-#include <pc80/mc146818rtc.h>
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "southbridge/intel/i82801ex/i82801ex_early_smbus.c"
Index: svn/src/mainboard/supermicro/x6dhr_ig2/romstage.c
===================================================================
--- svn.orig/src/mainboard/supermicro/x6dhr_ig2/romstage.c
+++ svn/src/mainboard/supermicro/x6dhr_ig2/romstage.c
@@ -5,7 +5,6 @@
 #include <arch/romcc_io.h>
 #include <cpu/x86/lapic.h>
 #include <stdlib.h>
-#include <pc80/mc146818rtc.h>
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "southbridge/intel/i82801ex/i82801ex_early_smbus.c"
Index: svn/src/northbridge/intel/e7520/raminit.c
===================================================================
--- svn.orig/src/northbridge/intel/e7520/raminit.c
+++ svn/src/northbridge/intel/e7520/raminit.c
@@ -23,6 +23,7 @@
 #include <stdlib.h>
 #include "raminit.h"
 #include "e7520.h"
+#include <pc80/mc146818rtc.h>
 #if CONFIG_HAVE_OPTION_TABLE
 #include "option_table.h"
 #endif
@@ -626,7 +627,7 @@ static int spd_set_dram_controller_mode(
 	if (read_option(CMOS_VSTART_ECC_memory, CMOS_VLEN_ECC_memory, 1) == 0) {
 		ecc = 0;  /* ECC off in CMOS so disable it */
 		print_debug("ECC off\n");
-	} else 
+	} else
 #endif
 	{
 		print_debug("ECC on\n");
Index: svn/src/northbridge/intel/e7525/raminit.c
===================================================================
--- svn.orig/src/northbridge/intel/e7525/raminit.c
+++ svn/src/northbridge/intel/e7525/raminit.c
@@ -23,6 +23,7 @@
 #include <stdlib.h>
 #include "raminit.h"
 #include "e7525.h"
+#include <pc80/mc146818rtc.h>
 #if CONFIG_HAVE_OPTION_TABLE
 #include "option_table.h"
 #endif