From patchwork Sun Sep 26 00:05:50 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Subject: Kconfig dependencies for USBDEBUG Date: Sun, 26 Sep 2010 00:05:50 -0000 From: Uwe Hermann X-Patchwork-Id: 1979 Message-Id: <20100926000550.GM3256@greenwood> To: coreboot@coreboot.org See patch. Uwe. Acked-by: Peter Stuge Only show the USB Debug Port kconfig option to the user if a mainboard is selected that uses a chipset which actually has that functionality _and_ we have code to initialize the Debug Port in coreboot (for that chipset). Also, remove duplicate list of PCI IDs and just link to the wiki page at: http://www.coreboot.org/EHCI_Debug_Port The list is now less useful in the kconfig help as this option will only appear for those boards where it's actually supported. Signed-off-by: Uwe Hermann Index: src/southbridge/amd/sb600/Kconfig =================================================================== --- src/southbridge/amd/sb600/Kconfig (Revision 5847) +++ src/southbridge/amd/sb600/Kconfig (Arbeitskopie) @@ -20,3 +20,5 @@ config SOUTHBRIDGE_AMD_SB600 bool select IOAPIC + select HAVE_USBDEBUG + Index: src/southbridge/amd/sb700/Kconfig =================================================================== --- src/southbridge/amd/sb700/Kconfig (Revision 5847) +++ src/southbridge/amd/sb700/Kconfig (Arbeitskopie) @@ -20,6 +20,7 @@ config SOUTHBRIDGE_AMD_SB700 bool select IOAPIC + select HAVE_USBDEBUG config SOUTHBRIDGE_AMD_SB700_SKIP_ISA_DMA_INIT bool Index: src/southbridge/nvidia/mcp55/Kconfig =================================================================== --- src/southbridge/nvidia/mcp55/Kconfig (Revision 5847) +++ src/southbridge/nvidia/mcp55/Kconfig (Arbeitskopie) @@ -1,6 +1,7 @@ config SOUTHBRIDGE_NVIDIA_MCP55 bool select IOAPIC + select HAVE_USBDEBUG config ID_SECTION_OFFSET hex Index: src/southbridge/intel/i82801gx/Kconfig =================================================================== --- src/southbridge/intel/i82801gx/Kconfig (Revision 5847) +++ src/southbridge/intel/i82801gx/Kconfig (Arbeitskopie) @@ -21,5 +21,6 @@ bool select IOAPIC select HAVE_HARD_RESET + select HAVE_USBDEBUG select USE_WATCHDOG_ON_BOOT Index: src/southbridge/sis/sis966/Kconfig =================================================================== --- src/southbridge/sis/sis966/Kconfig (Revision 5847) +++ src/southbridge/sis/sis966/Kconfig (Arbeitskopie) @@ -1,6 +1,7 @@ config SOUTHBRIDGE_SIS_SIS966 bool select IOAPIC + select HAVE_USBDEBUG config ID_SECTION_OFFSET hex Index: src/console/Kconfig =================================================================== --- src/console/Kconfig (Revision 5847) +++ src/console/Kconfig (Arbeitskopie) @@ -84,10 +84,14 @@ default 3 depends on CONSOLE_SERIAL8250 -# TODO: FIX DEPENDENCY HERE +# Use "select HAVE_USBDEBUG" on southbridges which have Debug Port code. +config HAVE_USBDEBUG + def_bool n + config USBDEBUG bool "USB 2.0 EHCI debug dongle support" default n + depends on HAVE_USBDEBUG help This option allows you to use a so-called USB EHCI Debug device to retrieve the coreboot debug messages (instead, or in addition @@ -96,26 +100,12 @@ This feature is NOT supported on all chipsets in coreboot! It also requires a USB2 controller which supports the EHCI - Debug Port capability. Controllers which are known to work: + Debug Port capability. - * 10b9:5239 ALi Corporation USB 2.0 (USB PCI card) - * 8086:24cd Intel ICH4/ICH4-M - * 8086:24dd Intel ICH5 - * 8086:265c Intel ICH6 - * 8086:268c Intel 631xESB/632xESB/3100 - * 8086:27cc Intel ICH7 - * 8086:2836 Intel ICH8 - * 8086:283a Intel ICH8 - * 8086:293a Intel ICH9 - * 10de:0088 NVIDIA MCP2A - * 10de:005b NVIDIA CK804 - * 10de:026e NVIDIA MCP51 - * 10de:036d NVIDIA MCP55 - * 10de:03f2 NVIDIA MCP61 - * 1002:4386 ATI/AMD SB600 - * 1106:3104 VIA VX800 + See http://www.coreboot.org/EHCI_Debug_Port for an up-to-date list + of supported controllers. - See http://www.coreboot.org/EHCI_Debug_Port for an up-to-date list. + If unsure, say N. config CONSOLE_VGA bool "Use VGA console once initialized"