From patchwork Fri Oct  1 09:49:47 2010
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Subject: Make i945/raminit.c:fsbclk() return u16 rather than int
Date: Fri, 01 Oct 2010 09:49:47 -0000
From: Peter Stuge <peter@stuge.se>
X-Patchwork-Id: 2017
Message-Id: <20101001094947.22870.qmail@stuge.se>
To: coreboot@coreboot.org

Attached.


//Peter
Make i945/raminit.c:fsbclk() return u16 rather than int

This is needed for Gentoo gcc-4.1.2 to build the i945 code. A warning is
thrown because the comparison in the last hunk is between u16 and -1 and
can never be true.

Signed-off-by: Peter Stuge <peter@stuge.se>


Index: src/northbridge/intel/i945/raminit.c
===================================================================
--- src/northbridge/intel/i945/raminit.c	(revision 5893)
+++ src/northbridge/intel/i945/raminit.c	(working copy)
@@ -103,7 +103,7 @@
 }
 
 #if defined(CONFIG_NORTHBRIDGE_INTEL_I945GM)
-static int fsbclk(void)
+static u16 fsbclk(void)
 {
 	switch (MCHBAR32(CLKCFG) & 7) {
 	case 0: return 400;
@@ -111,10 +111,10 @@
 	case 3: return 667;
 	default: printk(BIOS_DEBUG, "fsbclk: unknown register value %x\n", MCHBAR32(CLKCFG) & 7);
 	}
-	return -1;
+	return 0xffff;
 }
 #elif defined(CONFIG_NORTHBRIDGE_INTEL_I945GC)
-static int fsbclk(void)
+static u16 fsbclk(void)
 {
 	switch (MCHBAR32(CLKCFG) & 7) {
 	case 0: return 1066;
@@ -122,7 +122,7 @@
 	case 2: return 800;
 	default: printk(BIOS_DEBUG, "fsbclk: unknown register value %x\n", MCHBAR32(CLKCFG) & 7);
 	}
-	return -1;
+	return 0xffff;
 }
 #endif
 
@@ -1929,7 +1929,7 @@
 	MCHBAR32(PLLMON) = 0x80800000;
 
 	sysinfo->fsb_frequency = fsbclk();
-	if (sysinfo->fsb_frequency == -1)
+	if (sysinfo->fsb_frequency == 0xffff)
 		die("Unsupported FSB speed");
 
 	/* Program CPCTL according to FSB speed */