Submitter | Myles Watson |
---|---|
Date | 2009-08-27 22:50:04 |
Message ID | <2831fecf0908271550t1aea4f3dq12761097cd378ccf@mail.gmail.com> |
Download | mbox | patch |
Permalink | /patch/212/ |
State | Accepted |
Headers | show |
Comments
Myles Watson wrote: > If we set the cpu family from the socket, then use that to control > things like DCACHE, does that work for everyone? > > Signed-off-by: Myles Watson<mylesgw@gmail.com> > Acked-by: Stefan Reinauer <stepan@coresystems.de>
On Thu, Aug 27, 2009 at 6:22 PM, Stefan Reinauer<stepan@coresystems.de> wrote: > Myles Watson wrote: >> If we set the cpu family from the socket, then use that to control >> things like DCACHE, does that work for everyone? >> >> Signed-off-by: Myles Watson<mylesgw@gmail.com> >> > Acked-by: Stefan Reinauer <stepan@coresystems.de> Rev 4610. Thanks, Myles
Patch
Index: svn/src/cpu/amd/socket_940/Kconfig =================================================================== --- svn/src/cpu/amd/socket_940/Kconfig (revision 4600) +++ svn/src/cpu/amd/socket_940/Kconfig (working copy) @@ -12,3 +12,8 @@ hex default 1 depends on CPU_AMD_SOCKET_940 + +config CPU_AMD_MODEL_FXX + bool + default y + depends on CPU_AMD_SOCKET_940 Index: svn/src/cpu/amd/model_fxx/Kconfig =================================================================== --- svn/src/cpu/amd/model_fxx/Kconfig (revision 4600) +++ svn/src/cpu/amd/model_fxx/Kconfig (working copy) @@ -1,15 +1,40 @@ config HAVE_INIT_TIMER bool default y - depends on CPU_AMD_SOCKET_F + depends on CPU_AMD_MODEL_FXX config HAVE_MOVNTI bool default y - depends on CPU_AMD_SOCKET_F + depends on CPU_AMD_MODEL_FXX config CPU_ADDR_BITS int default 40 - depends on CPU_AMD_SOCKET_F + depends on CPU_AMD_MODEL_FXX +config USE_PRINTK_IN_CAR + bool + default y + depends on CPU_AMD_MODEL_FXX + +config USE_DCACHE_RAM + bool + default y + depends on CPU_AMD_MODEL_FXX + +config DCACHE_RAM_BASE + hex + default 0xc8000 + depends on CPU_AMD_MODEL_FXX + +config DCACHE_RAM_SIZE + hex + default 0x08000 + depends on CPU_AMD_MODEL_FXX + +config DCACHE_RAM_GLOBAL_VAR_SIZE + hex + default 0x01000 + depends on CPU_AMD_MODEL_FXX +
If we set the cpu family from the socket, then use that to control things like DCACHE, does that work for everyone? Signed-off-by: Myles Watson<mylesgw@gmail.com> Thanks, Myles