Patchwork AMD F10h: avoid timeout when waiting for AP core completion

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Submitter Scott
Date 2010-10-18 15:20:33
Message ID <94F89C5110F240008E89D10B96132C95@m3a78>
Download mbox | patch
Permalink /patch/2134/
State Superseded
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Comments

Scott - 2010-10-18 15:20:33
When debug logging is enabled, a message such as '* AP 02 timed out:02010501'
is sometimes logged. The reason is that the AP first sets a completion value
such as 0x13, which is what function wait_cpu_state() is waiting for. Then a
short time later, the AP calls function init_fidvid_ap(). This function sets
a completion value of 01. When logging is off, wait_cpu_state is fast enough
to see the initial completion value for each of the APs. But with logging
enabled, one or more APs may go on to complete function init_fidvid_ap, which
sets the completion value to 01. While mostly harmless, the timeout does
increase boot time. The following patch eliminates the timeout by making
function wait_cpu_state recognize 01 as an additional valid AP completion
value.


Signed-off-by: Scott Duplichan <scott@notabs.org>
Peter Stuge - 2010-10-18 19:15:56
Scott Duplichan wrote:
> patch eliminates the timeout by making function wait_cpu_state
> recognize 01 as an additional valid AP completion value.

Do we want some names for those values? (rather than magical 1?)

> Signed-off-by: Scott Duplichan <scott@notabs.org>

Acked-by: Peter Stuge <peter@stuge.se>

Patch

Index: src/cpu/amd/model_10xxx/init_cpus.c
===================================================================
--- src/cpu/amd/model_10xxx/init_cpus.c (revision 5965)
+++ src/cpu/amd/model_10xxx/init_cpus.c (working copy)
@@ -189,8 +189,10 @@ 
        int loop = 4000000;
        while (--loop > 0) {
                if (lapic_remote_read(apicid, LAPIC_MSG_REG, &readback) != 0)
-                       continue;
-               if ((readback & 0x3f) == state) {
+                       continue;
+               // stop polling if expected state is reached, or if
+               // init_fidvid_ap() sets 'ready for warm reset' state
+               if ((readback & 0x3f) == state || (readback & 0x3f) == 1) {
                        timeout = 0;
                        break;  //target cpu is in stage started
                }
@@ -273,7 +275,7 @@ 

        /* that is from initial apicid, we need nodeid and coreid
           later */
-       id = get_node_core_id_x();
+       id = get_node_core_id_x();

        /* NB_CFG MSR is shared between cores, so we need make sure
           core0 is done at first --- use wait_all_core0_started  */