Submitter | Scott |
---|---|
Date | 2010-10-19 17:47:08 |
Message ID | <51AC17B3FD284FE6BA8547D65AC3C0C5@m3a78> |
Download | mbox | patch |
Permalink | /patch/2145/ |
State | Superseded |
Headers | show |
Comments
> Last night, I thought I would just learn about gas macros and do it > that way. It was more difficult than I thought. I cannot even find > examples of gas macros that use arguments. A C style macro seemed > possible, but I found when gas processes it the needed ?: does not > work. So I ended up with a gas macro that does not use arguments. > The macro allows the awkwark logic and additional error checking to > be placed in an existing include file. The new error checking was > tested by forcing a few failing cases: > > > Signed-off-by: Scott Duplichan <scott@notabs.org> I'm sorry that I wasn't more clear. I think it was better before. The code looks exactly the same, but it's in a different file, which wasn't my intent at all. I like the other version much better. I hope that your new knowledge of gas macros will come in handy in the future :) Thanks, Myles
Hi Scott, On 19.10.2010 19:47, Scott Duplichan wrote: > Last night, I thought I would just learn about gas macros and do it > that way. It was more difficult than I thought. I cannot even find > examples of gas macros that use arguments. Take a look at src/cpu/amd/car/cache_as_ram.inc, specifically extractmask and simplemask. Regards, Carl-Daniel
-----Original Message-----
From: coreboot-bounces@coreboot.org [mailto:coreboot-bounces@coreboot.org] On Behalf Of Carl-Daniel Hailfinger
Sent: Tuesday, October 19, 2010 01:25 PM
To: Scott Duplichan
Cc: 'Arne Georg Gleditsch'; 'Coreboot'
Subject: Re: [coreboot] [PATCH] AMD F10h: set MMCONF bus count according toconfigured value
]Hi Scott,
]
]On 19.10.2010 19:47, Scott Duplichan wrote:
]> Last night, I thought I would just learn about gas macros and do it
]> that way. It was more difficult than I thought. I cannot even find
]> examples of gas macros that use arguments.
]
]Take a look at src/cpu/amd/car/cache_as_ram.inc, specifically
]extractmask and simplemask.
]
]Regards,
]Carl-Daniel
]
]--
]http://www.hailfinger.org/
Thanks Carl-Daniel.
Hello Myles,
I am not so happy with the new one either. What I really wanted was a
macro called highestSetBit. That way, the reader can guess what macro
invocation highestSetBit (CONFIG_MMCONF_BUS_NUMBER) does without
actually digging it out. But I could not find a way to make that work.
Another idea was to find highestSetBit at runtime, if it could be done
a short and readable code sequence. This would be possible with family
15h, where instructions such as lzcnt are supported. But family 10h
does not have this instruction.
Now that Carl-Daniel has showed how to do gas macros, how about I add a
highestSetBit macro to amd/mtrr.h? Then everything else can be inlined?
Thanks,
Scott
On Tue, Oct 19, 2010 at 12:34 PM, Scott Duplichan <scott@notabs.org> wrote: > -----Original Message----- > From: coreboot-bounces@coreboot.org [mailto:coreboot-bounces@coreboot.org] On Behalf Of Carl-Daniel Hailfinger > Sent: Tuesday, October 19, 2010 01:25 PM > To: Scott Duplichan > Cc: 'Arne Georg Gleditsch'; 'Coreboot' > Subject: Re: [coreboot] [PATCH] AMD F10h: set MMCONF bus count according toconfigured value > > ]Hi Scott, > ] > ]On 19.10.2010 19:47, Scott Duplichan wrote: > ]> Last night, I thought I would just learn about gas macros and do it > ]> that way. It was more difficult than I thought. I cannot even find > ]> examples of gas macros that use arguments. > ] > ]Take a look at src/cpu/amd/car/cache_as_ram.inc, specifically > ]extractmask and simplemask. > ] > ]Regards, > ]Carl-Daniel > ] > ]-- > ]http://www.hailfinger.org/ > > > > Thanks Carl-Daniel. > > Hello Myles, > > I am not so happy with the new one either. What I really wanted was a > macro called highestSetBit. That way, the reader can guess what macro > invocation highestSetBit (CONFIG_MMCONF_BUS_NUMBER) does without > actually digging it out. But I could not find a way to make that work. > Another idea was to find highestSetBit at runtime, if it could be done > a short and readable code sequence. This would be possible with family > 15h, where instructions such as lzcnt are supported. But family 10h > does not have this instruction. > > Now that Carl-Daniel has showed how to do gas macros, how about I add a > highestSetBit macro to amd/mtrr.h? Then everything else can be inlined? I would say it isn't worth the effort, but it's up to you. The problem with macros in assembly is that it's unclear which registers they clobber. That was why I suggested a pre-processor macro, but it's not that important. Thanks, Myles
Patch
Index: src/include/cpu/amd/mtrr.h =================================================================== --- src/include/cpu/amd/mtrr.h (revision 5975) +++ src/include/cpu/amd/mtrr.h (working copy) @@ -32,6 +32,44 @@ #define TOP_MEM_MASK 0x007fffff #define TOP_MEM_MASK_KB (TOP_MEM_MASK >> 10) + +#if defined(ASSEMBLY) + +.macro SET_C0010058 + #if (CONFIG_MMCONF_BASE_ADDRESS > 0xFFFFFFFF) + #error MMCONF_BASE_ADDRESS too big + #elif (CONFIG_MMCONF_BASE_ADDRESS & 0xFFFFF) + #error MMCONF_BASE_ADDRESS not 1MB aligned + #endif + movl $0, %edx + movl $((CONFIG_MMCONF_BASE_ADDRESS) | (1 << 0)), %eax + #if (CONFIG_MMCONF_BUS_NUMBER == 1) + #elif (CONFIG_MMCONF_BUS_NUMBER == 2) + orl $(1 << 2), %eax + #elif (CONFIG_MMCONF_BUS_NUMBER == 4) + orl $(2 << 2), %eax + #elif (CONFIG_MMCONF_BUS_NUMBER == 8) + orl $(3 << 2), %eax + #elif (CONFIG_MMCONF_BUS_NUMBER == 16) + orl $(4 << 2), %eax + #elif (CONFIG_MMCONF_BUS_NUMBER == 32) + orl $(5 << 2), %eax + #elif (CONFIG_MMCONF_BUS_NUMBER == 64) + orl $(6 << 2), %eax + #elif (CONFIG_MMCONF_BUS_NUMBER == 128) + orl $(7 << 2), %eax + #elif (CONFIG_MMCONF_BUS_NUMBER == 256) + orl $(8 << 2), %eax + #else + #error "bad MMCONF_BUS_NUMBER value" + #endif + movl $(0xc0010058), %ecx + wrmsr +.endm + +#endif + + #if !defined(__PRE_RAM__) && !defined(ASSEMBLY) void amd_setup_mtrrs(void); #endif Index: src/cpu/amd/car/cache_as_ram.inc =================================================================== --- src/cpu/amd/car/cache_as_ram.inc (revision 5975) +++ src/cpu/amd/car/cache_as_ram.inc (working copy) @@ -132,15 +132,7 @@ wrmsr #if CONFIG_MMCONF_SUPPORT - /* Set MMIO config space BAR. */ - movl $MSR_MCFG_BASE, %ecx - rdmsr - andl $(~(0xfff00000 | (0xf << 2))), %eax - orl $((CONFIG_MMCONF_BASE_ADDRESS & 0xfff00000)), %eax - orl $((8 << 2) | (1 << 0)), %eax - andl $(~(0x0000ffff)), %edx - orl $(CONFIG_MMCONF_BASE_ADDRESS >> 32), %edx - wrmsr + SET_C0010058 #endif CAR_FAM10_out_post_errata: