From patchwork Wed Oct 27 11:30:25 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Subject: [6/8] ASUS M2V support: K8T890 PCIe bugfix Date: Wed, 27 Oct 2010 11:30:25 -0000 From: Tobias Diedrich X-Patchwork-Id: 2184 Message-Id: <20101027113025.GK17791@yumi.tdiedrich.de> To: coreboot@coreboot.org Need to clear downstream read cycle retry bit, or the bus scan will hang. --- Index: src/southbridge/via/k8t890/k8t890_pcie.c =================================================================== --- src.orig/southbridge/via/k8t890/k8t890_pcie.c 2010-10-27 11:34:19.000000000 +0200 +++ src/southbridge/via/k8t890/k8t890_pcie.c 2010-10-27 12:45:22.000000000 +0200 @@ -35,6 +41,13 @@ reg = pci_read_config8(dev, 0x50); pci_write_config8(dev, 0x50, reg | 0x10); + /* + * Disable downstream read cycle retry, + * needed for asus m2v / k8t890cf or bus scan will hang. + */ + reg = pci_read_config8(dev, 0xa3); + pci_write_config8(dev, 0xa3, reg & ~0x01); + /* Award has 0xb, VIA recomends 0x4. */ pci_write_config8(dev, 0xe1, 0xb); @@ -75,6 +88,13 @@ reg = pci_read_config8(dev, 0x50); pci_write_config8(dev, 0x50, reg | 0x10); + /* + * Disable downstream read cycle retry, + * needed for asus m2v / k8t890cf or bus scan will hang. + */ + reg = pci_read_config8(dev, 0xa3); + pci_write_config8(dev, 0xa3, reg & ~0x01); + /* Award has 0xb, VIA recommends 0x4. */ pci_write_config8(dev, 0xe1, 0xb); /* Set replay timer limit. */