From patchwork Wed Oct 27 11:33:48 2010
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Subject: [7/8] ASUS M2V support: Comments
Date: Wed, 27 Oct 2010 11:33:48 -0000
From: Tobias Diedrich <ranma+coreboot@tdiedrich.de>
X-Patchwork-Id: 2185
Message-Id: <20101027113348.GL17791@yumi.tdiedrich.de>
To: coreboot@coreboot.org

Minor comment changes, add pointer to PCIe bridge documentation.

Signed-off-by: Tobias Diedrich <ranma+coreboot@tdiedrich.de>

---


Index: src/southbridge/via/k8t890/k8t890_ctrl.c
===================================================================
--- src.orig/southbridge/via/k8t890/k8t890_ctrl.c	2010-10-27 13:31:02.000000000 +0200
+++ src/southbridge/via/k8t890/k8t890_ctrl.c	2010-10-27 13:31:34.000000000 +0200
@@ -159,7 +159,11 @@
 
 	pci_write_config8(dev, 0x47, 0x30);
 
-	/* VT8237R specific configuration  other SB are done in their own directories */
+	/*
+	 * VT8237R specific configuration,
+	 * other SB are done in their own directories:
+	 * VT8237A and VT8237S are handled in vt8237_ctrl.c
+	 */
 
 	device_t devsb = dev_find_device(PCI_VENDOR_ID_VIA,
 					 PCI_DEVICE_ID_VIA_VT8237R_LPC, 0);
Index: src/southbridge/via/vt8237r/vt8237r_lpc.c
===================================================================
--- src.orig/southbridge/via/vt8237r/vt8237r_lpc.c	2010-10-27 13:31:02.000000000 +0200
+++ src/southbridge/via/vt8237r/vt8237r_lpc.c	2010-10-27 13:31:34.000000000 +0200
@@ -462,7 +462,7 @@
 	/* I/O recovery time, default IDE routing */
 	pci_write_config8(dev, 0x4c, 0x04);
 
-	/* ROM memory cycles go to LPC. */
+	/* Only ROM memory cycles go to LPC. */
 	pci_write_config8(dev, 0x59, 0x80);
 
 	/*
@@ -484,7 +484,7 @@
 	/* I/O recovery time, default IDE routing */
 	pci_write_config8(dev, 0x4c, 0x44);
 
-	/* ROM memory cycles go to LPC. */
+	/* Only ROM memory cycles go to LPC. */
 	pci_write_config8(dev, 0x59, 0x80);
 
 	/*
Index: src/southbridge/via/k8t890/k8t890_pcie.c
===================================================================
--- src.orig/southbridge/via/k8t890/k8t890_pcie.c	2010-10-27 13:31:32.000000000 +0200
+++ src/southbridge/via/k8t890/k8t890_pcie.c	2010-10-27 13:31:34.000000000 +0200
@@ -24,6 +24,12 @@
 #include <device/pci_ids.h>
 #include "k8t890.h"
 
+/*
+ * Note:
+ * The pcie bridges are similar to the VX800 ones documented at
+ * http://linux.via.com.tw/
+ */
+
 static void peg_init(struct device *dev)
 {
 	u8 reg;