| Submitter | Bao, Zheng |
|---|---|
| Date | 2010-12-01 05:50:25 |
| Message ID | <DD1CC71B621B004FA76856E5129D6B17045084A3@sbjgexmb1.amd.com> |
| Download | mbox | patch |
| Permalink | /patch/2373/ |
| State | Accepted |
| Headers | show |
Comments
On Tue, Nov 30, 2010 at 10:50 PM, Bao, Zheng <Zheng.Bao@amd.com> wrote: > More explicite and straight way to set seed. > > Signed-off-by: Zheng Bao <zheng.bao@amd.com> > > > Index: src/northbridge/amd/amdmct/mct/mctsrc.c > =================================================================== > --- src/northbridge/amd/amdmct/mct/mctsrc.c (revision 6135) > +++ src/northbridge/amd/amdmct/mct/mctsrc.c (working copy) > @@ -1023,13 +1023,9 @@ > > dev = pDCTstat->dev_dct; > for (index = 0x50; index <= 0x52; index ++) { > - val = Get_NB32_index_wait(dev, index_reg, index); > - val |= (FenceTrnFinDlySeed & 0x1F); > + val = (FenceTrnFinDlySeed & 0x1F); > if (index != 0x52) { > - val &= ~(0xFF << 8); > - val |= (val & 0xFF) << 8; > - val &= 0xFFFF; > - val |= val << 16; > + val |= val << 8 | val << 16 | val << 24; > } > Set_NB32_index_wait(dev, index_reg, index, val); > } > Index: src/northbridge/amd/amdmct/mct_ddr3/mctsrc.c > =================================================================== > --- src/northbridge/amd/amdmct/mct_ddr3/mctsrc.c (revision 6135) > +++ src/northbridge/amd/amdmct/mct_ddr3/mctsrc.c (working copy) > @@ -972,13 +972,9 @@ > */ > dev = pDCTstat->dev_dct; > for (index = 0x50; index <= 0x52; index ++) { > - val = Get_NB32_index_wait(dev, index_reg, index) & > ~0xFF; > - val |= (FenceTrnFinDlySeed & 0x1F); > + val = (FenceTrnFinDlySeed & 0x1F); > if (index != 0x52) { > - val &= ~(0xFF << 8); > - val |= (val & 0xFF) << 8; > - val &= 0xFFFF; > - val |= val << 16; > + val |= val << 8 | val << 16 | val << 24; > } > Set_NB32_index_wait(dev, index_reg, index, val); > } > Yes, the read-modify-write wasn't needed. This easier to understand. Acked-by: Marc Jones <marcj303@gmail.com>
On Wed, Dec 01, 2010 at 10:35:41AM -0700, Marc Jones wrote:
> Acked-by: Marc Jones <marcj303@gmail.com>
Just for archival purposes, this was r6136.
Uwe.
Patch
Index: src/northbridge/amd/amdmct/mct/mctsrc.c =================================================================== --- src/northbridge/amd/amdmct/mct/mctsrc.c (revision 6135) +++ src/northbridge/amd/amdmct/mct/mctsrc.c (working copy) @@ -1023,13 +1023,9 @@ dev = pDCTstat->dev_dct; for (index = 0x50; index <= 0x52; index ++) { - val = Get_NB32_index_wait(dev, index_reg, index); - val |= (FenceTrnFinDlySeed & 0x1F); + val = (FenceTrnFinDlySeed & 0x1F); if (index != 0x52) { - val &= ~(0xFF << 8); - val |= (val & 0xFF) << 8; - val &= 0xFFFF; - val |= val << 16; + val |= val << 8 | val << 16 | val << 24; } Set_NB32_index_wait(dev, index_reg, index, val); } Index: src/northbridge/amd/amdmct/mct_ddr3/mctsrc.c =================================================================== --- src/northbridge/amd/amdmct/mct_ddr3/mctsrc.c (revision 6135) +++ src/northbridge/amd/amdmct/mct_ddr3/mctsrc.c (working copy) @@ -972,13 +972,9 @@ */ dev = pDCTstat->dev_dct; for (index = 0x50; index <= 0x52; index ++) { - val = Get_NB32_index_wait(dev, index_reg, index) & ~0xFF; - val |= (FenceTrnFinDlySeed & 0x1F); + val = (FenceTrnFinDlySeed & 0x1F); if (index != 0x52) { - val &= ~(0xFF << 8); - val |= (val & 0xFF) << 8; - val &= 0xFFFF; - val |= val << 16; + val |= val << 8 | val << 16 | val << 24; } Set_NB32_index_wait(dev, index_reg, index, val); }