From patchwork Thu Dec 2 16:28:32 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Subject: Porting to Asus M4A78-EM Date: Thu, 02 Dec 2010 16:28:32 -0000 From: Myles Watson X-Patchwork-Id: 2385 Message-Id: To: Scott Duplichan Cc: Juhana Helovuo , coreboot@coreboot.org On Thu, Dec 2, 2010 at 9:17 AM, Myles Watson wrote: >> "Why does the current code for handling fixed resources allow the mmconf >> space to get allocated to a PCI device? Function avoid_fixed_resources >> calls function constrain_resources, which recursively searches the >> device tree for fixed io and memory resources. The ioapic fixed memory >> address is found and avoided during the recursive search because this >> southbridge device is below the level where the search starts. On the >> other hand, the mmconf fixed resource is added from the northbridge code, >> and falls under 'APIC_CLUSTER: 0'. This device is not part of the search >> for two reasons. One is that it is not at or below 'pci_domain 0' in the >> device tree. Another reason is that its type is APIC_CLUSTER and not >> PCI_DOMAIN." > I don't see any reason not to move that resource into the northbridge > to avoid that issue.  It's a simple fix.  Is there a good reason for > having the MMCONF BAR in the APIC cluster? This is what I was thinking. Build tested only. Signed-off-by: Myles Watson Thanks, Myles Signed-off-by: Myles Watson Signed-off-by: Myles Watson Acked-by: Scott Duplichan Index: svn/src/northbridge/amd/amdfam10/northbridge.c =================================================================== --- svn.orig/src/northbridge/amd/amdfam10/northbridge.c +++ svn/src/northbridge/amd/amdfam10/northbridge.c @@ -684,6 +684,13 @@ static void amdfam10_domain_read_resourc resource->flags = IORESOURCE_MEM; } #endif +#if CONFIG_MMCONF_SUPPORT + struct resource *res = new_resource(dev, 0xc0010058); + res->base = CONFIG_MMCONF_BASE_ADDRESS; + res->size = CONFIG_MMCONF_BUS_NUMBER * 4096*256; + res->flags = IORESOURCE_MEM | IORESOURCE_RESERVE | + IORESOURCE_FIXED | IORESOURCE_STORED | IORESOURCE_ASSIGNED; +#endif } static u32 my_find_pci_tolm(struct bus *bus, u32 tolm) @@ -1447,13 +1454,6 @@ static void cpu_bus_noop(device_t dev) static void cpu_bus_read_resources(device_t dev) { -#if CONFIG_MMCONF_SUPPORT - struct resource *resource = new_resource(dev, 0xc0010058); - resource->base = CONFIG_MMCONF_BASE_ADDRESS; - resource->size = CONFIG_MMCONF_BUS_NUMBER * 4096*256; - resource->flags = IORESOURCE_MEM | IORESOURCE_RESERVE | - IORESOURCE_FIXED | IORESOURCE_STORED | IORESOURCE_ASSIGNED; -#endif } static void cpu_bus_set_resources(device_t dev)