From patchwork Wed Dec 29 19:05:21 2010
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Subject: [5/7] Geode GX2 cleanup next round
Date: Wed, 29 Dec 2010 19:05:21 -0000
From: Nils <njacobs8@hetnet.nl>
X-Patchwork-Id: 2467
Message-Id: <201012292005.21836.njacobs8@hetnet.nl>
To: coreboot@coreboot.org

Delete some unused code.

Signed-off-by: Nils Jacobs <njacobs8@hetnet.nl>

Thanks, Nils.


Index: src/northbridge/amd/gx2/northbridge.c
===================================================================
--- src/northbridge/amd/gx2/northbridge.c	(revision 6218)
+++ src/northbridge/amd/gx2/northbridge.c	(working copy)
@@ -16,8 +16,6 @@
 #include <cpu/cpu.h>
 #include "../../../southbridge/amd/cs5536/cs5536.h"
 
-#define NORTHBRIDGE_FILE "northbridge.c"
-
 void print_conf(void);
 
 /* Print the platform configuration - do before PCI init or it will not
@@ -198,12 +196,6 @@
 	return sizem;
 }
 
-/* here is programming for the various MSRs. */
-#define IM_QWAIT 0x100000
-
-#define DMCF_WRITE_SERIALIZE_REQUEST (2<<12) /* 2 outstanding */ /* in high */
-#define DMCF_SERIAL_LOAD_MISSES  (2) /* enabled */
-
 /* these are the 8-bit attributes for controlling RCONF registers */
 #define CACHE_DISABLE (1<<0)
 #define WRITE_ALLOCATE (1<<1)
@@ -216,28 +208,6 @@
 #define RAM_PROPERTIES (0)
 #define DEVICE_PROPERTIES (WRITE_SERIALIZE|CACHE_DISABLE)
 #define ROM_PROPERTIES (WRITE_SERIALIZE|WRITE_PROTECT|CACHE_DISABLE)
-/* build initializer for P2D MSR */
-#define P2D_BM(msr, pdid1, bizarro, pbase, pmask) {msr, {.hi=(pdid1<<29)|(bizarro<<28)|(pbase>>24), .lo=(pbase<<8)|pmask}}
-#define P2D_SC(msr, pdid1, bizarro, wen, ren,pscbase) {msr, {.hi=(pdid1<<29)|(bizarro<<28)|(wen), .lo=(ren<<16)|(pscbase>>18)}}
-
-struct msr_defaults
-{
-	int msr_no;
-	msr_t msr;
-} msr_defaults [] = {
-	{0x1700, {.hi = 0, .lo = IM_QWAIT}},
-	{0x1800, {.hi = DMCF_WRITE_SERIALIZE_REQUEST, .lo = DMCF_SERIAL_LOAD_MISSES}},
-	/* now for GLPCI routing */
-	/* GLIU0 */
-	P2D_BM(0x10000020, 0x1, 0x0, 0x0, 0xfff80),
-	P2D_BM(0x10000021, 0x1, 0x0, 0x80000, 0xfffe0),
-	P2D_SC(0x1000002c, 0x1, 0x0, 0x0,  0xff03, 0xC0000),
-	/* GLIU1 */
-	P2D_BM(0x40000020, 0x1, 0x0, 0x0, 0xfff80),
-	P2D_BM(0x40000021, 0x1, 0x0, 0x80000, 0xfffe0),
-	P2D_SC(0x4000002d, 0x1, 0x0, 0x0,  0xff03, 0xC0000),
-	{0}
-};
 
 /* note that dev is NOT used -- yet */
 static void irq_init_steering(struct device *dev, u16 irq_map)