===================================================================
@@ -124,6 +124,8 @@
source src/superio/Kconfig
comment "Devices"
source src/devices/Kconfig
+comment "Embedded Controllers"
+source src/ec/Kconfig
endmenu
===================================================================
@@ -0,0 +1 @@
+source src/ec/acpi/Kconfig
===================================================================
@@ -0,0 +1 @@
+subdirs-y += acpi
===================================================================
@@ -0,0 +1,2 @@
+config EC_ACPI
+ bool
===================================================================
@@ -0,0 +1 @@
+driver-y += ec.c
===================================================================
@@ -20,9 +20,11 @@
*/
#include <console/console.h>
+#include <device/device.h>
#include <arch/io.h>
#include <delay.h>
#include "ec.h"
+#include "chip.h"
int send_ec_command(u8 command)
{
@@ -112,3 +114,6 @@
return send_ec_data(data);
}
+struct chip_operations ec_acpi_ops = {
+ CHIP_NAME("ACPI Embedded Controller")
+};
===================================================================
@@ -0,0 +1,29 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2011 Sven Schnelle <svens@stackframe.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#ifndef EC_ACPI_H
+#define EC_ACPI_H
+
+struct chip_operations;
+extern struct chip_operations ec_acpi_ops;
+
+struct ec_acpi_config {};
+
+#endif
===================================================================
@@ -17,9 +17,11 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
-#ifndef _MAINBOARD_EC_H
-#define _MAINBOARD_EC_H
+#ifndef _EC_ACPI_H
+#define _EC_ACPI_H
+#include "chip.h"
+
#define EC_DATA 0x62
#define EC_SC 0x66
===================================================================
@@ -28,6 +28,7 @@
select SOUTHBRIDGE_TI_PCIXX12
select SUPERIO_SMSC_FDC37N972
select SUPERIO_SMSC_SIO10N268
+ select EC_ACPI
select BOARD_HAS_FADT
select HAVE_ACPI_TABLES
select HAVE_PIRQ_TABLE
===================================================================
@@ -26,7 +26,8 @@
#include "southbridge/intel/i82801gx/i82801gx.h"
#include "southbridge/intel/i82801gx/nvs.h"
#include "northbridge/intel/i945/udelay.c"
-#include "ec.c"
+#include <ec/acpi/ec.h>
+#include "ec_oem.c"
#define MAX_LCD_BRIGHTNESS 0xd8
===================================================================
@@ -21,3 +21,4 @@
ramstage-$(CONFIG_HAVE_ACPI_SLIC) += acpi_slic.c
smm-$(CONFIG_HAVE_SMI_HANDLER) += mainboard_smi.c
+smm-$(CONFIG_HAVE_SMI_HANDLER) += ../../../ec/acpi/ec.c
===================================================================
@@ -133,6 +133,12 @@
end
device pnp 4e.b off # HWM
end
+ chip ec/acpi
+ device pnp ff.1 on
+ io 0x60 = 0x62
+ io 0x62 = 0x66
+ end
+ end
end
end
===================================================================
@@ -1,235 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2008-2009 coresystems GmbH
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; version 2 of
- * the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
- * MA 02110-1301 USA
- */
-
-#include <console/console.h>
-#include <arch/io.h>
-#include <delay.h>
-#include "ec.h"
-
-int send_ec_command(u8 command)
-{
- int timeout;
-
- timeout = 0x7ff;
- while ((inb(EC_SC) & EC_IBF) && --timeout) {
- udelay(10);
- if ((timeout & 0xff) == 0)
- printk(BIOS_SPEW, ".");
- }
- if (!timeout) {
- printk(BIOS_DEBUG, "Timeout while sending command 0x%02x to EC!\n",
- command);
- // return -1;
- }
-
- outb(command, EC_SC);
- return 0;
-}
-
-int send_ec_data(u8 data)
-{
- int timeout;
-
- timeout = 0x7ff;
- while ((inb(EC_SC) & EC_IBF) && --timeout) { // wait for IBF = 0
- udelay(10);
- if ((timeout & 0xff) == 0)
- printk(BIOS_SPEW, ".");
- }
- if (!timeout) {
- printk(BIOS_DEBUG, "Timeout while sending data 0x%02x to EC!\n",
- data);
- // return -1;
- }
-
- outb(data, EC_DATA);
-
- return 0;
-}
-
-int send_ec_data_nowait(u8 data)
-{
- outb(data, EC_DATA);
-
- return 0;
-}
-
-u8 recv_ec_data(void)
-{
- int timeout;
- u8 data;
-
- timeout = 0x7fff;
- while (--timeout) { // Wait for OBF = 1
- if (inb(EC_SC) & EC_OBF) {
- break;
- }
- udelay(10);
- if ((timeout & 0xff) == 0)
- printk(BIOS_SPEW, ".");
- }
- if (!timeout) {
- printk(BIOS_DEBUG, "\nTimeout while receiving data from EC!\n");
- // return -1;
- }
-
- data = inb(EC_DATA);
- printk(BIOS_SPEW, "recv_ec_data: 0x%02x\n", data);
-
- return data;
-}
-
-u8 ec_read(u8 addr)
-{
- send_ec_command(0x80);
- send_ec_data(addr);
-
- return recv_ec_data();
-}
-
-int ec_write(u8 addr, u8 data)
-{
- send_ec_command(0x81);
- send_ec_data(addr);
- return send_ec_data(data);
-}
-
-int ec_dump_status(void)
-{
- u8 ec_sc = inb(EC_SC);
- printk(BIOS_DEBUG, "Embedded Controller Status: ");
- if (ec_sc & (1 << 6)) printk(BIOS_DEBUG, "SMI_EVT ");
- if (ec_sc & (1 << 5)) printk(BIOS_DEBUG, "SCI_EVT ");
- if (ec_sc & (1 << 4)) printk(BIOS_DEBUG, "BURST ");
- if (ec_sc & (1 << 3)) printk(BIOS_DEBUG, "CMD ");
- if (ec_sc & (1 << 1)) printk(BIOS_DEBUG, "IBF ");
- if (ec_sc & (1 << 0)) printk(BIOS_DEBUG, "OBF ");
- printk(BIOS_DEBUG, "\n");
-
- return ec_sc;
-}
-
-
-/* ********************************** */
-
-int send_ec_oem_command(u8 command)
-{
- int timeout;
-
- timeout = 0x7ff;
- while ((inb(EC_OEM_SC) & EC_IBF) && --timeout) {
- udelay(10);
- if ((timeout & 0xff) == 0)
- printk(BIOS_SPEW, ".");
- }
- if (!timeout) {
- printk(BIOS_DEBUG, "Timeout while sending OEM command 0x%02x to EC!\n",
- command);
- // return -1;
- }
-
- outb(command, EC_OEM_SC);
- return 0;
-}
-
-int send_ec_oem_data(u8 data)
-{
- int timeout;
-
- timeout = 0x7ff;
- while ((inb(EC_OEM_SC) & EC_IBF) && --timeout) { // wait for IBF = 0
- udelay(10);
- if ((timeout & 0xff) == 0)
- printk(BIOS_SPEW, ".");
- }
- if (!timeout) {
- printk(BIOS_DEBUG, "Timeout while sending OEM data 0x%02x to EC!\n",
- data);
- // return -1;
- }
-
- outb(data, EC_OEM_DATA);
-
- return 0;
-}
-
-int send_ec_oem_data_nowait(u8 data)
-{
- outb(data, EC_OEM_DATA);
-
- return 0;
-}
-
-u8 recv_ec_oem_data(void)
-{
- int timeout;
- u8 data;
-
- timeout = 0x7fff;
- while (--timeout) { // Wait for OBF = 1
- if (inb(EC_OEM_SC) & EC_OBF) {
- break;
- }
- udelay(10);
- if ((timeout & 0xff) == 0)
- printk(BIOS_SPEW, ".");
- }
- if (!timeout) {
- printk(BIOS_DEBUG, "\nTimeout while receiving OEM data from EC!\n");
- // return -1;
- }
-
- data = inb(EC_OEM_DATA);
- // printk(BIOS_SPEW, "recv_ec_oem_data: 0x%02x\n", data);
-
- return data;
-}
-
-u8 ec_oem_read(u8 addr)
-{
- send_ec_oem_command(0x80);
- send_ec_oem_data(addr);
-
- return recv_ec_oem_data();
-}
-
-int ec_oem_write(u8 addr, u8 data)
-{
- send_ec_oem_command(0x81);
- send_ec_oem_data(addr);
- return send_ec_oem_data(data);
-}
-
-int ec_oem_dump_status(void)
-{
- u8 ec_sc = inb(EC_OEM_SC);
- printk(BIOS_DEBUG, "Embedded Controller Status: ");
- if (ec_sc & (1 << 6)) printk(BIOS_DEBUG, "SMI_EVT ");
- if (ec_sc & (1 << 5)) printk(BIOS_DEBUG, "SCI_EVT ");
- if (ec_sc & (1 << 4)) printk(BIOS_DEBUG, "BURST ");
- if (ec_sc & (1 << 3)) printk(BIOS_DEBUG, "CMD ");
- if (ec_sc & (1 << 1)) printk(BIOS_DEBUG, "IBF ");
- if (ec_sc & (1 << 0)) printk(BIOS_DEBUG, "OBF ");
- printk(BIOS_DEBUG, "\n");
-
- return ec_sc;
-}
-
===================================================================
@@ -22,114 +22,8 @@
#include <console/console.h>
#include <arch/io.h>
#include <delay.h>
-#include "ec.h"
+#include "ec_oem.h"
-int send_ec_command(u8 command)
-{
- int timeout;
-
- timeout = 0x7ff;
- while ((inb(EC_SC) & EC_IBF) && --timeout) {
- udelay(10);
- if ((timeout & 0xff) == 0)
- printk(BIOS_SPEW, ".");
- }
- if (!timeout) {
- printk(BIOS_DEBUG, "Timeout while sending command 0x%02x to EC!\n",
- command);
- // return -1;
- }
-
- outb(command, EC_SC);
- return 0;
-}
-
-int send_ec_data(u8 data)
-{
- int timeout;
-
- timeout = 0x7ff;
- while ((inb(EC_SC) & EC_IBF) && --timeout) { // wait for IBF = 0
- udelay(10);
- if ((timeout & 0xff) == 0)
- printk(BIOS_SPEW, ".");
- }
- if (!timeout) {
- printk(BIOS_DEBUG, "Timeout while sending data 0x%02x to EC!\n",
- data);
- // return -1;
- }
-
- outb(data, EC_DATA);
-
- return 0;
-}
-
-int send_ec_data_nowait(u8 data)
-{
- outb(data, EC_DATA);
-
- return 0;
-}
-
-u8 recv_ec_data(void)
-{
- int timeout;
- u8 data;
-
- timeout = 0x7fff;
- while (--timeout) { // Wait for OBF = 1
- if (inb(EC_SC) & EC_OBF) {
- break;
- }
- udelay(10);
- if ((timeout & 0xff) == 0)
- printk(BIOS_SPEW, ".");
- }
- if (!timeout) {
- printk(BIOS_DEBUG, "\nTimeout while receiving data from EC!\n");
- // return -1;
- }
-
- data = inb(EC_DATA);
- printk(BIOS_SPEW, "recv_ec_data: 0x%02x\n", data);
-
- return data;
-}
-
-u8 ec_read(u8 addr)
-{
- send_ec_command(0x80);
- send_ec_data(addr);
-
- return recv_ec_data();
-}
-
-int ec_write(u8 addr, u8 data)
-{
- send_ec_command(0x81);
- send_ec_data(addr);
- return send_ec_data(data);
-}
-
-int ec_dump_status(void)
-{
- u8 ec_sc = inb(EC_SC);
- printk(BIOS_DEBUG, "Embedded Controller Status: ");
- if (ec_sc & (1 << 6)) printk(BIOS_DEBUG, "SMI_EVT ");
- if (ec_sc & (1 << 5)) printk(BIOS_DEBUG, "SCI_EVT ");
- if (ec_sc & (1 << 4)) printk(BIOS_DEBUG, "BURST ");
- if (ec_sc & (1 << 3)) printk(BIOS_DEBUG, "CMD ");
- if (ec_sc & (1 << 1)) printk(BIOS_DEBUG, "IBF ");
- if (ec_sc & (1 << 0)) printk(BIOS_DEBUG, "OBF ");
- printk(BIOS_DEBUG, "\n");
-
- return ec_sc;
-}
-
-
-/* ********************************** */
-
int send_ec_oem_command(u8 command)
{
int timeout;
===================================================================
@@ -28,8 +28,10 @@
#include "chip.h"
#include "hda_verb.h"
-#include "ec.c"
+#include <ec/acpi/ec.h>
+#include "ec_oem.c"
+
#define MAX_LCD_BRIGHTNESS 0xd8
static void ec_enable(void)
===================================================================
@@ -1,64 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2008-2009 coresystems GmbH
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; version 2 of
- * the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
- * MA 02110-1301 USA
- */
-
-#ifndef _MAINBOARD_EC_H
-#define _MAINBOARD_EC_H
-
-#define EC_DATA 0x62
-#define EC_SC 0x66
-
-
-#define EC_OEM_DATA 0x68
-#define EC_OEM_SC 0x6c
-
-/* EC_SC input */
-#define EC_SMI_EVT (1 << 6) // 1: SMI event pending
-#define EC_SCI_EVT (1 << 5) // 1: SCI event pending
-#define EC_BURST (1 << 4) // controller is in burst mode
-#define EC_CMD (1 << 3) // 1: byte in data register is command
- // 0: byte in data register is data
-#define EC_IBF (1 << 1) // 1: input buffer full (data ready for ec)
-#define EC_OBF (1 << 0) // 1: output buffer full (data ready for host)
-/* EC_SC output */
-#define RD_EC 0x80 // Read Embedded Controller
-#define WR_EC 0x81 // Write Embedded Controller
-#define BE_EC 0x82 // Burst Enable Embedded Controller
-#define BD_EC 0x83 // Burst Disable Embedded Controller
-#define QR_EC 0x84 // Query Embedded Controller
-
-int send_ec_command(u8 command);
-int send_ec_data(u8 data);
-int send_ec_data_nowait(u8 data);
-u8 recv_ec_data(void);
-u8 ec_read(u8 addr);
-int ec_write(u8 addr, u8 data);
-
-int send_ec_oem_command(u8 command);
-int send_ec_oem_data(u8 data);
-int send_ec_oem_data_nowait(u8 data);
-u8 recv_ec_oem_data(void);
-u8 ec_oem_read(u8 addr);
-int ec_oem_write(u8 addr, u8 data);
-
-int ec_dump_status(void);
-int ec_oem_dump_status(void);
-#endif
-
===================================================================
@@ -22,10 +22,6 @@
#ifndef _MAINBOARD_EC_H
#define _MAINBOARD_EC_H
-#define EC_DATA 0x62
-#define EC_SC 0x66
-
-
#define EC_OEM_DATA 0x68
#define EC_OEM_SC 0x6c
@@ -44,13 +40,6 @@
#define BD_EC 0x83 // Burst Disable Embedded Controller
#define QR_EC 0x84 // Query Embedded Controller
-int send_ec_command(u8 command);
-int send_ec_data(u8 data);
-int send_ec_data_nowait(u8 data);
-u8 recv_ec_data(void);
-u8 ec_read(u8 addr);
-int ec_write(u8 addr, u8 data);
-
int send_ec_oem_command(u8 command);
int send_ec_oem_data(u8 data);
int send_ec_oem_data_nowait(u8 data);
===================================================================
@@ -10,6 +10,7 @@
select SOUTHBRIDGE_TI_PCI7420
select SUPERIO_SMSC_LPC47N227
select SUPERIO_RENESAS_M3885X
+ select EC_ACPI
select BOARD_HAS_FADT
select HAVE_OPTION_TABLE
select HAVE_PIRQ_TABLE
===================================================================
@@ -18,7 +18,6 @@
##
ramstage-y += m3885.c
-ramstage-y += ec.c
driver-y += rtl8168.c
smm-$(CONFIG_HAVE_SMI_HANDLER) += mainboard_smi.c
===================================================================
@@ -104,6 +104,12 @@
device pnp ff.1 on # dummy address
end
end
+ chip ec/acpi
+ device pnp ff.2 on # dummy address
+ io 0x60 = 0x62
+ io 0x62 = 0x66
+ end
+ end
end
#device pci 1f.1 off end # IDE
===================================================================
@@ -25,7 +25,7 @@
#include <arch/io.h>
#include <delay.h>
-#include "ec.h"
+#include <ec/acpi/ec.h>
#include "m3885.h"
#define TH0LOW 80
===================================================================
@@ -1,114 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2008-2009 coresystems GmbH
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; version 2 of
- * the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
- * MA 02110-1301 USA
- */
-
-#include <console/console.h>
-#include <arch/io.h>
-#include <delay.h>
-#include "ec.h"
-
-int send_ec_command(u8 command)
-{
- int timeout;
-
- timeout = 0x7ff;
- while ((inb(EC_SC) & EC_IBF) && --timeout) {
- udelay(10);
- if ((timeout & 0xff) == 0)
- printk(BIOS_SPEW, ".");
- }
- if (!timeout) {
- printk(BIOS_DEBUG, "Timeout while sending command 0x%02x to EC!\n",
- command);
- // return -1;
- }
-
- outb(command, EC_SC);
- return 0;
-}
-
-int send_ec_data(u8 data)
-{
- int timeout;
-
- timeout = 0x7ff;
- while ((inb(EC_SC) & EC_IBF) && --timeout) { // wait for IBF = 0
- udelay(10);
- if ((timeout & 0xff) == 0)
- printk(BIOS_SPEW, ".");
- }
- if (!timeout) {
- printk(BIOS_DEBUG, "Timeout while sending data 0x%02x to EC!\n",
- data);
- // return -1;
- }
-
- outb(data, EC_DATA);
-
- return 0;
-}
-
-int send_ec_data_nowait(u8 data)
-{
- outb(data, EC_DATA);
-
- return 0;
-}
-
-u8 recv_ec_data(void)
-{
- int timeout;
- u8 data;
-
- timeout = 0x7fff;
- while (--timeout) { // Wait for OBF = 1
- if (inb(EC_SC) & EC_OBF) {
- break;
- }
- udelay(10);
- if ((timeout & 0xff) == 0)
- printk(BIOS_SPEW, ".");
- }
- if (!timeout) {
- printk(BIOS_DEBUG, "\nTimeout while receiving data from EC!\n");
- // return -1;
- }
-
- data = inb(EC_DATA);
- printk(BIOS_DEBUG, "recv_ec_data: 0x%02x\n", data);
-
- return data;
-}
-
-u8 ec_read(u8 addr)
-{
- send_ec_command(0x80);
- send_ec_data(addr);
-
- return recv_ec_data();
-}
-
-int ec_write(u8 addr, u8 data)
-{
- send_ec_command(0x81);
- send_ec_data(addr);
- return send_ec_data(data);
-}
-
===================================================================
@@ -30,7 +30,7 @@
#include <arch/coreboot_tables.h>
#include "chip.h"
-#include "ec.h"
+#include <ec/acpi/ec.h>
#include "m3885.h"
#define DUMP_RUNTIME_REGISTERS 0
===================================================================
@@ -1,49 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2008-2009 coresystems GmbH
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-#ifndef _MAINBOARD_EC_H
-#define _MAINBOARD_EC_H
-
-#define EC_DATA 0x62
-#define EC_SC 0x66
-
-/* EC_SC input */
-#define EC_SMI_EVT (1 << 6) // 1: SMI event pending
-#define EC_SCI_EVT (1 << 5) // 1: SCI event pending
-#define EC_BURST (1 << 4) // controller is in burst mode
-#define EC_CMD (1 << 3) // 1: byte in data register is command
- // 0: byte in data register is data
-#define EC_IBF (1 << 1) // 1: input buffer full (data ready for ec)
-#define EC_OBF (1 << 0) // 1: output buffer full (data ready for host)
-/* EC_SC output */
-#define RD_EC 0x80 // Read Embedded Controller
-#define WR_EC 0x81 // Write Embedded Controller
-#define BE_EC 0x82 // Burst Enable Embedded Controller
-#define BD_EC 0x83 // Burst Disable Embedded Controller
-#define QR_EC 0x84 // Query Embedded Controller
-
-int send_ec_command(u8 command);
-int send_ec_data(u8 data);
-int send_ec_data_nowait(u8 data);
-u8 recv_ec_data(void);
-u8 ec_read(u8 addr);
-int ec_write(u8 addr, u8 data);
-
-#endif
-
===================================================================
@@ -123,7 +123,7 @@
PLATFORM-y += src/arch/$(ARCHDIR-y) src/cpu src/mainboard/$(MAINBOARDDIR)
TARGETS-y :=
-BUILD-y := src/lib src/boot src/console src/devices src/southbridge src/northbridge src/superio src/drivers
+BUILD-y := src/lib src/boot src/console src/devices src/ec src/southbridge src/northbridge src/superio src/drivers
BUILD-y += util/cbfstool util/sconfig
BUILD-$(CONFIG_ARCH_X86) += src/pc80
BUILD-y += src/vendorcode
This patch adds a new ec/ subdir for embedded controllers (mostly found in Laptops), and converts Getac P470 and Roda RK886EX to use the new ACPI EC instead of having it's own copy for those functions. Signed-off-by: Sven Schnelle <svens@stackframe.org>