Patchwork inteltool: added MCH register names for Intel NM10

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Submitter Антон Кочков
Date 2011-01-31 09:02:32
Message ID <AANLkTim1W+jNr8ssJf+fLJ7Psr8V4hnA-YX+qxH5fZ4Y@mail.gmail.com>
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Permalink /patch/2585/
State Rejected
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Антон Кочков - 2011-01-31 09:02:32
inteltool: added MCH register names for Intel NM10
Signed-off-by: Anton Kochkov <anton.kochkov@gmail.com>
---

Patch

Index: memory.c
===================================================================
--- memory.c	(revision 6320)
+++ memory.c	(working copy)
@@ -22,6 +22,573 @@ 
 #include <stdlib.h>
 #include "inteltool.h"
 
+static const io_register_t nm10_mch_registers[] = {
+	{ 0x10, 4, "MC_MMIO_HTPACER" },
+	{ 0x14, 4, "MC_MMIO_HPWRCTL1" },
+	{ 0x18, 4, "MC_MMIO_HPWRCTL2" },
+	{ 0x1C, 4, "MC_MMIO_HPWRCTL3" },
+	{ 0x20, 4, "MC_MMIO_HTCLKGTCTL" },
+	{ 0x24, 4, "MC_MMIO_SLIMCFGTMG" },
+	{ 0x28, 4, "MC_MMIO_HTBONUS0" },
+	{ 0x2C, 4, "MC_MMIO_HTBONUS1" },
+	{ 0x30, 4, "MC_MMIO_HIT0" },
+	{ 0x34, 4, "MC_MMIO_HIT1" },
+	{ 0x38, 4, "MC_MMIO_HIT2" },
+	{ 0x3C, 4, "MC_MMIO_HIT3" },
+	{ 0x40, 4, "MC_MMIO_HIT4" },
+	{ 0x44, 4, "MC_MMIO_HIT5" },
+	{ 0x48, 4, "MC_MMIO_HICLKGTCTL" },
+	{ 0x4C, 4, "MC_MMIO_HIBONUS" },
+	{ 0x50, 4, "MC_MMIO_XTPR0" },
+	{ 0x54, 4, "MC_MMIO_XTPR1" },
+	{ 0x58, 4, "MC_MMIO_XTPR2" },
+	{ 0x5C, 4, "MC_MMIO_XTPR3" },
+	{ 0x60, 4, "MC_MMIO_XTPR4" },
+	{ 0x64, 4, "MC_MMIO_XTPR5" },
+	{ 0x68, 4, "MC_MMIO_XTPR6" },
+	{ 0x6C, 4, "MC_MMIO_XTPR7" },
+	{ 0x70, 4, "MC_MMIO_XTPR8" },
+	{ 0x74, 4, "MC_MMIO_XTPR9" },
+	{ 0x78, 4, "MC_MMIO_XTPR10" },
+	{ 0x7C, 4, "MC_MMIO_XTPR11" },
+	{ 0x80, 4, "MC_MMIO_XTPR12" },
+	{ 0x84, 4, "MC_MMIO_XTPR13" },
+	{ 0x88, 4, "MC_MMIO_XTPR14" },
+	{ 0x8C, 4, "MC_MMIO_XTPR15" },
+	{ 0x90, 4, "MC_MMIO_FCCREQ0SET" },
+	{ 0x98, 4, "MC_MMIO_FCCREQ1SET" },
+	{ 0xA0, 4, "MC_MMIO_FCCREQ0MSK" },
+	{ 0xA8, 4, "MC_MMIO_FCCREQ1MSK" },
+	{ 0xB0, 4, "MC_MMIO_FCCDATASET" },
+	{ 0xB8, 4, "MC_MMIO_FCCDATAMSK" },
+	{ 0xC0, 4, "MC_MMIO_FCCCTL" },
+	{ 0xC8, 4, "MC_MMIO_CFGPOCTL1" },
+	{ 0xCC, 4, "MC_MMIO_CFGPOCTL2" },
+	{ 0xD0, 4, "MC_MMIO_NOACFGBUSCTL" },
+	{ 0xF4, 4, "MC_MMIO_POC" },
+	{ 0xFA, 4, "MC_MMIO_POCRL" },
+	{ 0x111, 2, "MC_MMIO_CHDECMISC" },
+	{ 0x114, 1, "MC_MMIO_ZQCALQT" },
+	{ 0x115, 2, "MC_MMIO_SHC2REGI" },
+	{ 0x117, 2, "MC_MMIO_SHC2REGII" },
+	{ 0x120, 4, "MC_MMIO_WRWMCONFIG" },
+	{ 0x124, 1, "MC_MMIO_SHC2REGIII" },
+	{ 0x125, 2, "MC_MMIO_SHPENDREG" },
+	{ 0x127, 2, "MC_MMIO_SHPAGECTRL" },
+	{ 0x129, 1, "MC_MMIO_SHCMPLWRCMD" },
+	{ 0x12A, 2, "MC_MMIO_SHC2MINTM" },
+	{ 0x12C, 1, "MC_MMIO_SHC2IDLETM" },
+	{ 0x12D, 1, "MC_MMIO_BYPACTSF" },
+	{ 0x12E, 1, "MC_MMIO_BYPKNRULE" },
+	{ 0x12F, 1, "MC_MMIO_SHBONUSREG" },
+	{ 0x130, 4, "MC_MMIO_COMPCTRL1" },
+	{ 0x134, 4, "MC_MMIO_COMPCTRL2" },
+	{ 0x138, 4, "MC_MMIO_COMPCTRL3" },
+	{ 0x13C, 4, "MC_MMIO_XCOMP" },
+	{ 0x140, 4, "MC_MMIO_RCMEASBUFXOVR" },
+	{ 0x144, 4, "MC_MMIO_ACTXCOMP" },
+	{ 0x148, 4, "MC_MMIO_FINALXRCOMPRD" },
+	{ 0x14C, 4, "MC_MMIO_SCOMP" },
+	{ 0x150, 4, "MC_MMIO_SCMEASBUFOVR" },
+	{ 0x154, 4, "MC_MMIO_ACTSCOMP" },
+	{ 0x158, 4, "MC_MMIO_FINALXSCOMP" },
+	{ 0x15A, 4, "MC_MMIO_XSCSTART" },
+	{ 0x15C, 4, "MC_MMIO_DCOMPRAW1" },
+	{ 0x160, 4, "MC_MMIO_DCOMPRAW2" },
+	{ 0x164, 4, "MC_MMIO_DCMEASBUFOVR" },
+	{ 0x168, 4, "MC_MMIO_FINALDELCOMP" },
+	{ 0x16C, 4, "MC_MMIO_OFREQDELSEL" },
+	{ 0x170, 4, "MC_MMIO_XCOMPDFCTRL" },
+	{ 0x178, 4, "MC_MMIO_ZQCALCTRL" },
+	{ 0x17A, 4, "MC_MMIO_XCOMPCMNBNS" },
+	{ 0x17C, 4, "MC_MMIO_PSMIOVR" },
+	{ 0x180, 4, "MC_MMIO_CSHRPDCTL" },
+	{ 0x182, 4, "MC_MMIO_CSPDSLVWT" },
+	{ 0x184, 4, "MC_MMIO_CSHRPDSHFTOUTLO" },
+	{ 0x188, 1, "MC_MMIO_CSHRFIFOCTL" },
+	{ 0x189, 4, "MC_MMIO_CSHWRIOBONUS" },
+	{ 0x18A, 2, "MC_MMIO_CSHRPDCTL2" },
+	{ 0x18C, 2, "MC_MMIO_CSHRWRIOMLNS" },
+	{ 0x18E, 2, "MC_MMIO_CSHRPDCTL3" },
+	{ 0x190, 2, "MC_MMIO_CSHRPDCTL4" },
+	{ 0x192, 1, "MC_MMIO_CSHWRIOBONUS2" },
+	{ 0x193, 1, "MC_MMIO_CSHRMSTDYNDLLENB" },
+	{ 0x194, 4, "MC_MMIO_C0TXCCCMISC" },
+	{ 0x198, 4, "MC_MMIO_CSHRMSTRCTL0" },
+	{ 0x19C, 4, "MC_MMIO_CSHRMSTRCTL1" },
+	{ 0x1A0, 4, "MC_MMIO_CSHRDQSTXPGM" },
+	{ 0x1A4, 4, "MC_MMIO_CSHRDQSCMN" },
+	{ 0x1A8, 4, "MC_MMIO_CSHRDDR3CTL" },
+	{ 0x1B0, 4, "MC_MMIO_CSHRDIGANAOBSCTL" },
+	{ 0x1B4, 2, "MC_MMIO_CSHRMISCCTL" },
+	{ 0x1B6, 2, "MC_MMIO_CSHRMISCCTL1" },
+	{ 0x1B8, 2, "MC_MMIO_CSHRDFTCTL" },
+	{ 0x1C0, 4, "MC_MMIO_MPLLCTL" },
+	{ 0x1C4, 4, "MC_MMIO_MPLLDBG" },
+	{ 0x1C8, 4, "MC_MMIO_CREFPI" },
+	{ 0x1E0, 4, "MC_MMIO_CSHRDQSDQTX" },
+	{ 0x200, 2, "MC_MMIO_C0DRB0" },
+	{ 0x202, 2, "MC_MMIO_C0DRB1" },
+	{ 0x204, 2, "MC_MMIO_C0DRB2" },
+	{ 0x206, 2, "MC_MMIO_C0DRB3" },
+	{ 0x208, 2, "MC_MMIO_C0DRA01" },
+	{ 0x20A, 2, "MC_MMIO_C0DRA23" },
+	{ 0x210, 2, "MC_MMIO_CLOCKGATINGIII" },
+	{ 0x212, 4, "MC_MMIO_SHC3C4REG1" },
+	{ 0x216, 2, "MC_MMIO_SHC2REG4" },
+	{ 0x218, 4, "MC_MMIO_C0COREBONUS2" },
+	{ 0x21C, 4, "MC_MMIO_C0GNT2LNCH3" },
+	{ 0x220, 4, "MC_MMIO_C0GNT2LNCH1" },
+	{ 0x224, 4, "MC_MMIO_C0GNT2LNCH2" },
+	{ 0x228, 4, "MC_MMIO_C0MISCTM" },
+	{ 0x22C, 4, "MC_MMIO_SHCYCTRKRDWRSFLV" },
+	{ 0x232, 2, "MC_MMIO_SHCYCTRKRFSHSFLV" },
+	{ 0x234, 4, "MC_MMIO_SHCYCTRKCTLLVOV" },
+	{ 0x239, 4, "MC_MMIO_C0WRDPYN" },
+	{ 0x23C, 2, "MC_MMIO_C0C2REG" },
+	{ 0x23E, 2, "MC_MMIO_C0STATRDADJV" },
+	{ 0x240, 1, "MC_MMIO_C0LATCTRL" },
+	{ 0x241, 2, "MC_MMIO_C0BYPCTRL" },
+	{ 0x243, 1, "MC_MMIO_C0CWBCTRL" },
+	{ 0x244, 2, "MC_MMIO_C0ARBCTRL" },
+	{ 0x246, 2, "MC_MMIO_C0ADDCSCTRL" },
+	{ 0x248, 4, "MC_MMIO_C0STATRDCTRL" },
+	{ 0x24C, 1, "MC_MMIO_C0RDFIFOCTRL" },
+	{ 0x24D, 1, "MC_MMIO_C0WRDATACTRL" },
+	{ 0x250, 2, "MC_MMIO_C0CYCTRKPCHG" },
+	{ 0x252, 4, "MC_MMIO_C0CYCTRKACT" },
+	{ 0x256, 2, "MC_MMIO_C0CYCTRKWR" },
+	{ 0x258, 2, "MC_MMIO_C0CYCTRKRD" },
+	{ 0x25B, 2, "MC_MMIO_C0CYCTRKREFR" },
+	{ 0x25D, 1, "MC_MMIO_C0CYCTRKPCHG2" },
+	{ 0x25E, 2, "MC_MMIO_C0RDQCTRL" },
+	{ 0x260, 4, "MC_MMIO_C0CKECTRL" },
+	{ 0x264, 1, "MC_MMIO_C0CKEDELAY" },
+	{ 0x265, 2, "MC_MMIO_C0PWLRCTRL" },
+	{ 0x267, 1, "MC_MMIO_C0EPCONFIG" },
+	{ 0x268, 1, "MC_MMIO_C0REFRCTRL2" },
+	{ 0x269, 4, "MC_MMIO_C0REFRCTRL" },
+	{ 0x26F, 2, "MC_MMIO_C0PVCFG" },
+	{ 0x271, 1, "MC_MMIO_C0JEDEC" },
+	{ 0x272, 2, "MC_MMIO_C0ARBSPL" },
+	{ 0x274, 4, "MC_MMIO_C0DYNRDCTRL" },
+	{ 0x278, 2, "MC_MMIO_C0WRWMFLSH" },
+	{ 0x284, 4, "MC_MMIO_C0ECCERRLOG" },
+	{ 0x288, 4, "MC_MMIO_C0DITCTRL" },
+	{ 0x294, 4, "MC_MMIO_C0ODTRKCTRL" },
+	{ 0x298, 4, "MC_MMIO_C0ODT" },
+	{ 0x29C, 4, "MC_MMIO_C0ODTCTRL" },
+	{ 0x2A0, 4, "MC_MMIO_C0GTEW" },
+	{ 0x2A4, 4, "MC_MMIO_C0GTC" },
+	{ 0x2A8, 4, "MC_MMIO_C0DTPEW" },
+	{ 0x2AC, 4, "MC_MMIO_C0DTAEW" },
+	{ 0x2B4, 4, "MC_MMIO_C0DTC" },
+	{ 0x2B8, 4, "MC_MMIO_C0REFCTRL" },
+	{ 0x2BF, 1, "MC_MMIO_C0NOASEL" },
+	{ 0x2C0, 4, "MC_MMIO_C0COREBONUS" },
+	{ 0x2C8, 4, "MC_MMIO_C0DARBTEST" },
+	{ 0x2D1, 2, "MC_MMIO_CLOCKGATINGI" },
+	{ 0x2D4, 4, "MC_MMIO_MEMTDPCTW" },
+	{ 0x2D8, 4, "MC_MMIO_MTDPCTWHOTTH" },
+	{ 0x2DC, 4, "MC_MMIO_MTDPCTWHOTTH2" },
+	{ 0x2E0, 4, "MC_MMIO_MTDPCTWHOTTH3" },
+	{ 0x2E4, 4, "MC_MMIO_MTDPCTWHOTTH4" },
+	{ 0x2E8, 4, "MC_MMIO_MTDPCTWAUXTH" },
+	{ 0x2EC, 4, "MC_MMIO_MTDPCTWIRTH" },
+	{ 0x2F0, 4, "MC_MMIO_MTDPCCRWTWHOTTH" },
+	{ 0x2F4, 4, "MC_MMIO_MTDPCCRWTWHOTTH2" },
+	{ 0x2F8, 4, "MC_MMIO_MTDPCCRWTWHOTTH3" },
+	{ 0x2FC, 4, "MC_MMIO_MTDPCCRWTWHOTTH4" },
+	{ 0x300, 4, "MC_MMIO_MTDPCHOTTHINT" },
+	{ 0x304, 4, "MC_MMIO_MTDPCHOTTHINT2" },
+	{ 0x308, 4, "MC_MMIO_MTDPCTLAUXTNTINT" },
+	{ 0x30C, 4, "MC_MMIO_MTDPCMISC" },
+	{ 0x31C, 4, "MC_MMIO_C0RCOMPCTRL0" },
+	{ 0x320, 2, "MC_MMIO_C0RCOMPMULT0" },
+	{ 0x322, 4, "MC_MMIO_C0RCOMPOVR0" },
+	{ 0x326, 4, "MC_MMIO_C0RCOMPOSV0" },
+	{ 0x32A, 2, "MC_MMIO_C0SCOMPVREF0" },
+	{ 0x32C, 2, "MC_MMIO_C0SCOMPOVR0" },
+	{ 0x32E, 2, "MC_MMIO_C0SCOMPOFF0" },
+	{ 0x330, 2, "MC_MMIO_C0DCOMP0" },
+	{ 0x332, 2, "MC_MMIO_C0SLEWBASE0" },
+	{ 0x334, 4, "MC_MMIO_C0SLEWPULUT0" },
+	{ 0x338, 4, "MC_MMIO_C0SLEWPDLUT0" },
+	{ 0x33C, 4, "MC_MMIO_C0DCOMPOVR0" },
+	{ 0x340, 4, "MC_MMIO_C0DCOMPOFF0" },
+	{ 0x374, 4, "MC_MMIO_C0RCOMPCTRL2" },
+	{ 0x378, 2, "MC_MMIO_C0RCOMPMULT2" },
+	{ 0x37A, 2, "MC_MMIO_C0RCOMPOVR2" },
+	{ 0x37E, 4, "MC_MMIO_C0RCOMPOSV2" },
+	{ 0x382, 2, "MC_MMIO_C0SCOMPVREF2" },
+	{ 0x384, 2, "MC_MMIO_C0SCOMPOVR2" },
+	{ 0x386, 2, "MC_MMIO_C0SCOMPOFF2" },
+	{ 0x388, 2, "MC_MMIO_C0DCOMP2" },
+	{ 0x38A, 2, "MC_MMIO_C0SLEWBASE2" },
+	{ 0x38C, 4, "MC_MMIO_C0SLEWPULUT2" },
+	{ 0x390, 4, "MC_MMIO_C0SLEWPDLUT2" },
+	{ 0x394, 4, "MC_MMIO_C0DCOMPOVR2" },
+	{ 0x398, 4, "MC_MMIO_C0DCOMPOFF2" },
+	{ 0x3A2, 4, "MC_MMIO_C0RCOMPCTRL3" },
+	{ 0x3A6, 2, "MC_MMIO_C0RCOMPMULT3" },
+	{ 0x3A8, 4, "MC_MMIO_C0RCOMPOVR3" },
+	{ 0x3AC, 4, "MC_MMIO_C0RCOMPOSV3" },
+	{ 0x3B0, 2, "MC_MMIO_C0SCOMPVREF3" },
+	{ 0x3B2, 2, "MC_MMIO_C0SCOMPOVR3" },
+	{ 0x3B4, 2, "MC_MMIO_C0SCOMPOFF3" },
+	{ 0x3B6, 2, "MC_MMIO_C0DCOMP3" },
+	{ 0x3B8, 2, "MC_MMIO_C0SLEWBASE3" },
+	{ 0x3BA, 4, "MC_MMIO_C0SLEWPULUT3" },
+	{ 0x3BE, 4, "MC_MMIO_C0SLEWPDLUT3" },
+	{ 0x3C2, 4, "MC_MMIO_C0DCOMPOVR3" },
+	{ 0x3C6, 4, "MC_MMIO_C0DCOMPOFF3" },
+	{ 0x3D0, 4, "MC_MMIO_C0RCOMPCTRL4" },
+	{ 0x3D4, 2, "MC_MMIO_C0RCOMPMULT4" },
+	{ 0x3D6, 4, "MC_MMIO_C0RCOMPOVR4" },
+	{ 0x3DA, 4, "MC_MMIO_C0RCOMPOSV4" },
+	{ 0x3DE, 2, "MC_MMIO_C0SCOMPVREF4" },
+	{ 0x3E0, 2, "MC_MMIO_C0SCOMPOVR4" },
+	{ 0x3E2, 2, "MC_MMIO_C0SCOMPOFF4" },
+	{ 0x3E4, 2, "MC_MMIO_C0DCOMP4" },
+	{ 0x3E6, 2, "MC_MMIO_C0SLEWBASE4" },
+	{ 0x3E8, 4, "MC_MMIO_C0SLEWPULUT4" },
+	{ 0x3EC, 4, "MC_MMIO_C0SLEWPDLUT4" },
+	{ 0x3F0, 4, "MC_MMIO_C0DCOMPOVR4" },
+	{ 0x3F4, 4, "MC_MMIO_C0DCOMPOFF4" },
+	{ 0x3FE, 4, "MC_MMIO_C0RCOMPCTRL5" },
+	{ 0x402, 2, "MC_MMIO_C0RCOMPMULT5" },
+	{ 0x404, 4, "MC_MMIO_C0RCOMPOVR5" },
+	{ 0x408, 4, "MC_MMIO_C0RCOMPOSV5" },
+	{ 0x40C, 2, "MC_MMIO_C0SCOMPVREF5" },
+	{ 0x40E, 2, "MC_MMIO_C0SCOMPOVR5" },
+	{ 0x410, 2, "MC_MMIO_C0SCOMPOFF5" },
+	{ 0x412, 2, "MC_MMIO_C0DCOMP5" },
+	{ 0x414, 2, "MC_MMIO_C0SLEWBASE5" },
+	{ 0x416, 4, "MC_MMIO_C0SLEWPULUT5" },
+	{ 0x41A, 4, "MC_MMIO_C0SLEWPDLUT5" },
+	{ 0x41E, 4, "MC_MMIO_C0DCOMPOVR5" },
+	{ 0x422, 4, "MC_MMIO_C0DCOMPOFF5" },
+	{ 0x42C, 4, "MC_MMIO_C0RCOMPCTRL6" },
+	{ 0x430, 2, "MC_MMIO_C0RCOMPMULT6" },
+	{ 0x432, 4, "MC_MMIO_C0RCOMPOVR6" },
+	{ 0x436, 4, "MC_MMIO_C0RCOMPOSV6" },
+	{ 0x43A, 2, "MC_MMIO_C0SCOMPVREF6" },
+	{ 0x43C, 2, "MC_MMIO_C0SCOMPOVR6" },
+	{ 0x43E, 2, "MC_MMIO_C0SCOMPOFF6" },
+	{ 0x440, 2, "MC_MMIO_C0DCOMP6" },
+	{ 0x442, 2, "MC_MMIO_C0SLEWBASE6" },
+	{ 0x444, 4, "MC_MMIO_C0SLEWPULUT6" },
+	{ 0x448, 4, "MC_MMIO_C0SLEWPDLUT6" },
+	{ 0x44C, 4, "MC_MMIO_C0DCOMPOVR6" },
+	{ 0x450, 4, "MC_MMIO_C0DCOMPOFF6" },
+	{ 0x45A, 4, "MC_MMIO_C0ODTRECORDX" },
+	{ 0x462, 4, "MC_MMIO_C0DQSODTRECORDX" },
+	{ 0x4B0, 4, "MC_MMIO_XCOMPSDR0BNS" },
+	{ 0x500, 1, "MC_MMIO_C0TXDQ0R0DLL" },
+	{ 0x501, 1, "MC_MMIO_C0TXDQ0R1DLL" },
+	{ 0x502, 1, "MC_MMIO_C0TXDQ0R2DLL" },
+	{ 0x503, 1, "MC_MMIO_C0TXDQ0R3DLL" },
+	{ 0x504, 1, "MC_MMIO_C0TXDQ1R0DLL" },
+	{ 0x505, 1, "MC_MMIO_C0TXDQ1R1DLL" },
+	{ 0x506, 1, "MC_MMIO_C0TXDQ1R2DLL" },
+	{ 0x507, 1, "MC_MMIO_C0TXDQ1R3DLL" },
+	{ 0x508, 1, "MC_MMIO_C0TXDQ2R0DLL" },
+	{ 0x509, 1, "MC_MMIO_C0TXDQ2R1DLL" },
+	{ 0x50A, 1, "MC_MMIO_C0TXDQ2R2DLL" },
+	{ 0x50B, 1, "MC_MMIO_C0TXDQ2R3DLL" },
+	{ 0x50C, 1, "MC_MMIO_C0TXDQ3R0DLL" },
+	{ 0x50D, 1, "MC_MMIO_C0TXDQ3R1DLL" },
+	{ 0x50E, 1, "MC_MMIO_C0TXDQ3R2DLL" },
+	{ 0x50F, 1, "MC_MMIO_C0TXDQ3R3DLL" },
+	{ 0x510, 1, "MC_MMIO_C0TXDQ4R0DLL" },
+	{ 0x511, 1, "MC_MMIO_C0TXDQ4R1DLL" },
+	{ 0x512, 1, "MC_MMIO_C0TXDQ4R2DLL" },
+	{ 0x513, 1, "MC_MMIO_C0TXDQ4R3DLL" },
+	{ 0x514, 1, "MC_MMIO_C0TXDQ5R0DLL" },
+	{ 0x515, 1, "MC_MMIO_C0TXDQ5R1DLL" },
+	{ 0x516, 1, "MC_MMIO_C0TXDQ5R2DLL" },
+	{ 0x517, 1, "MC_MMIO_C0TXDQ5R3DLL" },
+	{ 0x518, 1, "MC_MMIO_C0TXDQ6R0DLL" },
+	{ 0x519, 1, "MC_MMIO_C0TXDQ6R1DLL" },
+	{ 0x51A, 1, "MC_MMIO_C0TXDQ6R2DLL" },
+	{ 0x51B, 1, "MC_MMIO_C0TXDQ6R3DLL" },
+	{ 0x51C, 1, "MC_MMIO_C0TXDQ7R0DLL" },
+	{ 0x51D, 1, "MC_MMIO_C0TXDQ7R1DLL" },
+	{ 0x51E, 1, "MC_MMIO_C0TXDQ7R2DLL" },
+	{ 0x51F, 1, "MC_MMIO_C0TXDQ7R3DLL" },
+	{ 0x520, 1, "MC_MMIO_C0TXDQS0R0DLL" },
+	{ 0x521, 1, "MC_MMIO_C0TXDQS0R1DLL" },
+	{ 0x522, 1, "MC_MMIO_C0TXDQS0R2DLL" },
+	{ 0x523, 1, "MC_MMIO_C0TXDQS0R3DLL" },
+	{ 0x524, 1, "MC_MMIO_C0TXDQS1R0DLL" },
+	{ 0x525, 1, "MC_MMIO_C0TXDQS1R1DLL" },
+	{ 0x526, 1, "MC_MMIO_C0TXDQS1R2DLL" },
+	{ 0x527, 1, "MC_MMIO_C0TXDQS1R3DLL" },
+	{ 0x528, 1, "MC_MMIO_C0TXDQS2R0DLL" },
+	{ 0x529, 1, "MC_MMIO_C0TXDQS2R1DLL" },
+	{ 0x52A, 1, "MC_MMIO_C0TXDQS2R2DLL" },
+	{ 0x52B, 1, "MC_MMIO_C0TXDQS2R3DLL" },
+	{ 0x52C, 1, "MC_MMIO_C0TXDQS3R0DLL" },
+	{ 0x52D, 1, "MC_MMIO_C0TXDQS3R1DLL" },
+	{ 0x52E, 1, "MC_MMIO_C0TXDQS3R2DLL" },
+	{ 0x52F, 1, "MC_MMIO_C0TXDQS3R3DLL" },
+	{ 0x530, 1, "MC_MMIO_C0TXDQS4R0DLL" },
+	{ 0x531, 1, "MC_MMIO_C0TXDQS4R1DLL" },
+	{ 0x532, 1, "MC_MMIO_C0TXDQS4R2DLL" },
+	{ 0x533, 1, "MC_MMIO_C0TXDQS4R3DLL" },
+	{ 0x534, 1, "MC_MMIO_C0TXDQS5R0DLL" },
+	{ 0x535, 1, "MC_MMIO_C0TXDQS5R1DLL" },
+	{ 0x536, 1, "MC_MMIO_C0TXDQS5R2DLL" },
+	{ 0x537, 1, "MC_MMIO_C0TXDQS5R3DLL" },
+	{ 0x538, 1, "MC_MMIO_C0TXDQS6R0DLL" },
+	{ 0x539, 1, "MC_MMIO_C0TXDQS6R1DLL" },
+	{ 0x53A, 1, "MC_MMIO_C0TXDQS6R2DLL" },
+	{ 0x53B, 1, "MC_MMIO_C0TXDQS6R3DLL" },
+	{ 0x53C, 1, "MC_MMIO_C0TXDQS7R0DLL" },
+	{ 0x53D, 1, "MC_MMIO_C0TXDQS7R1DLL" },
+	{ 0x53E, 1, "MC_MMIO_C0TXDQS7R2DLL" },
+	{ 0x53F, 1, "MC_MMIO_C0TXDQS7R3DLL" },
+	{ 0x540, 4, "MC_MMIO_C0DLLRCVCTL0" },
+	{ 0x544, 4, "MC_MMIO_C0DLLRCVCTL1" },
+	{ 0x548, 4, "MC_MMIO_C0DLLRCVCTL2" },
+	{ 0x54C, 4, "MC_MMIO_C0DLLRCVCTL3" },
+	{ 0x550, 4, "MC_MMIO_C0DLLRCVCTL4" },
+	{ 0x554, 4, "MC_MMIO_C0DLLRCVCTL5" },
+	{ 0x558, 4, "MC_MMIO_C0DLLRCVCTL6" },
+	{ 0x55C, 4, "MC_MMIO_C0DLLRCVCTL7" },
+	{ 0x560, 1, "MC_MMIO_C0RXRCV0DLL" },
+	{ 0x561, 2, "MC_MMIO_C0MISCCTL0" },
+	{ 0x564, 1, "MC_MMIO_C0RXRCV1DLL" },
+	{ 0x565, 2, "MC_MMIO_C0MISCCTL1" },
+	{ 0x568, 1, "MC_MMIO_C0RXRCV2DLL" },
+	{ 0x569, 2, "MC_MMIO_C0MISCCTL2" },
+	{ 0x56C, 1, "MC_MMIO_C0RXRCV3DLL" },
+	{ 0x56D, 2, "MC_MMIO_C0MISCCTL3" },
+	{ 0x570, 1, "MC_MMIO_C0RXRCV4DLL" },
+	{ 0x571, 2, "MC_MMIO_C0MISCCTL4" },
+	{ 0x574, 1, "MC_MMIO_C0RXRCV5DLL" },
+	{ 0x575, 2, "MC_MMIO_C0MISCCTL5" },
+	{ 0x578, 1, "MC_MMIO_C0RXRCV6DLL" },
+	{ 0x579, 2, "MC_MMIO_C0MISCCTL6" },
+	{ 0x57C, 1, "MC_MMIO_C0RXRCV7DLL" },
+	{ 0x57D, 2, "MC_MMIO_C0MISCCTL7" },
+	{ 0x580, 1, "MC_MMIO_C0TXCMD0DLL" },
+	{ 0x581, 1, "MC_MMIO_C0TXCK0DLL" },
+	{ 0x582, 1, "MC_MMIO_C0TXCK1DLL" },
+	{ 0x583, 1, "MC_MMIO_C0TXCMD1DLL" },
+	{ 0x584, 1, "MC_MMIO_C0TXCTL0DLL" },
+	{ 0x585, 1, "MC_MMIO_C0TXCTL1DLL" },
+	{ 0x586, 1, "MC_MMIO_C0TXCTL2DLL" },
+	{ 0x587, 1, "MC_MMIO_C0TXCTL3DLL" },
+	{ 0x588, 4, "MC_MMIO_C0RCVMISCCTL1" },
+	{ 0x58C, 4, "MC_MMIO_C0RCVMISCCTL2" },
+	{ 0x590, 2, "MC_MMIO_C0MCHODTMISCCTL1" },
+	{ 0x592, 2, "MC_MMIO_C0DYNSLVDLLEN" },
+	{ 0x594, 4, "MC_MMIO_C0CMDTX1" },
+	{ 0x598, 4, "MC_MMIO_C0CMDTX2" },
+	{ 0x59C, 4, "MC_MMIO_C0CTLTX2" },
+	{ 0x5A0, 4, "MC_MMIO_C0CKTX" },
+	{ 0x5A4, 4, "MC_MMIO_C0DQR0TX1" },
+	{ 0x5A8, 4, "MC_MMIO_C0DQR1TX1" },
+	{ 0x5AC, 4, "MC_MMIO_C0DQR2TX1" },
+	{ 0x5B0, 4, "MC_MMIO_C0DQR3TX1" },
+	{ 0x5B4, 4, "MC_MMIO_C0DQSR0TX1" },
+	{ 0x5B8, 4, "MC_MMIO_C0DQSR1TX1" },
+	{ 0x5BC, 4, "MC_MMIO_C0DQSR2TX1" },
+	{ 0x5C0, 4, "MC_MMIO_C0DQSR3TX1" },
+	{ 0x5C4, 4, "MC_MMIO_C0DQSDQTX2" },
+	{ 0x5C8, 4, "MC_MMIO_C0DQSDQR0TX3" },
+	{ 0x5CC, 4, "MC_MMIO_C0DQSDQR1TX3" },
+	{ 0x5D0, 4, "MC_MMIO_C0DQSDQR2TX3" },
+	{ 0x5D4, 4, "MC_MMIO_C0DQSDQR3TX3" },
+	{ 0x5D8, 1, "MC_MMIO_C0RSTCTL" },
+	{ 0x5D9, 1, "MC_MMIO_C0MISCCTL" },
+	{ 0x5DA, 1, "MC_MMIO_C0MISC2" },
+	{ 0x5DB, 1, "MC_MMIO_C0BONUS" },
+	{ 0x5DC, 1, "MC_MMIO_CMNDQFIFORST" },
+	{ 0x5DD, 1, "MC_MMIO_C0IOBUFACTCTL" },
+	{ 0x5DE, 2, "MC_MMIO_C0BONUS2" },
+	{ 0x5F0, 4, "MC_MMIO_C0DLLPIEN" },
+	{ 0x5FA, 2, "MC_MMIO_C0COARSEDLY0" },
+	{ 0x5FC, 2, "MC_MMIO_C0COARSEDLY1" },
+	{ 0x610, 2, "MC_MMIO_SHC3C4REG2" },
+	{ 0x612, 2, "MC_MMIO_SHC3C4REG3" },
+	{ 0x614, 2, "MC_MMIO_SHC3C4REG4" },
+	{ 0x62C, 4, "MC_MMIO_SHCYCTRKCKEL" },
+	{ 0x630, 4, "MC_MMIO_SHCYCTRKACTSFLV" },
+	{ 0x634, 4, "MC_MMIO_SHCYCTRKPCHGSFLV" },
+	{ 0x6C0, 4, "MC_MMIO_C1COREBONUS" },
+	{ 0x6D1, 2, "MC_MMIO_CLOCKGATINGII" },
+	{ 0x6D4, 4, "MC_MMIO_CLKXSSH2MCBYPPHAS" },
+	{ 0x6D8, 8, "MC_MMIO_CLKXSSH2MCBYP" },
+	{ 0x6E0, 8, "MC_MMIO_CLKXSSH2MCRDQ" },
+	{ 0x6E8, 8, "MC_MMIO_CLKXSSH2MCRDCST" },
+	{ 0x6F0, 8, "MC_MMIO_CLKXSSMC2H" },
+	{ 0x6F8, 8, "MC_MMIO_CLKXSSMC2HALT" },
+	{ 0x700, 8, "MC_MMIO_CLKXSSH2MD" },
+	{ 0x708, 8, "MC_MMIO_CLKXSSH2X2MD" },
+	{ 0xB00, 4, "MC_MMIO_XSBFTCTL" },
+	{ 0xB04, 4, "MC_MMIO_XSBFTDRR" },
+	{ 0xB08, 4, "MC_MMIO_DACGIOCTRL1" },
+	{ 0xC00, 4, "MC_MMIO_CLKCFG" },
+	{ 0xC04, 4, "MC_MMIO_HMCCMP" },
+	{ 0xC08, 4, "MC_MMIO_HMCCMC" },
+	{ 0xC10, 4, "MC_MMIO_HMPLLO" },
+	{ 0xC1C, 4, "MC_MMIO_CPCTL" },
+	{ 0xC20, 4, "MC_MMIO_SSKPD" },
+	{ 0xC28, 4, "MC_MMIO_HMCCPEXT" },
+	{ 0xC2C, 4, "MC_MMIO_HMDCPEXT" },
+	{ 0xC30, 4, "MC_MMIO_CPBUP" },
+	{ 0xC34, 4, "MC_MMIO_HMBYPEXT" },
+	{ 0xC38, 4, "MC_MMIO_HPLLVCO" },
+	{ 0xC3C, 4, "MC_MMIO_HPLLMONCTLA" },
+	{ 0xC40, 4, "MC_MMIO_HPLLMONCTLB" },
+	{ 0xC44, 4, "MC_MMIO_HPLLMONCTLC" },
+	{ 0xC48, 4, "MC_MMIO_DPLLMONCTLA" },
+	{ 0xC4C, 4, "MC_MMIO_DPLLMONCTLB" },
+	{ 0xC50, 4, "MC_MMIO_HMDCMP" },
+	{ 0xC54, 4, "MC_MMIO_HMBYPCP" },
+	{ 0xC58, 4, "MC_MMIO_FLRCSSEL" },
+	{ 0xC5C, 4, "MC_MMIO_DPLLMONCTLC" },
+	{ 0xC60, 4, "MC_MMIO_MPLLMONCTLA" },
+	{ 0xC64, 4, "MC_MMIO_MPLLMONCTLB" },
+	{ 0xC68, 4, "MC_MMIO_MPLLMONCTLC" },
+	{ 0xC70, 4, "MC_MMIO_PLLFUSEOVR1" },
+	{ 0xC74, 4, "MC_MMIO_PLLFUSEOVR2" },
+	{ 0xC80, 4, "MC_MMIO_GCRCSCP" },
+	{ 0xC84, 2, "MC_MMIO_GCRCSCMP" },
+	{ 0xC86, 2, "MC_MMIO_GCRCSBYPCP" },
+	{ 0xC88, 4, "MC_MMIO_GCPLLO" },
+	{ 0xC8C, 4, "MC_MMIO_GCFGC" },
+	{ 0xD00, 4, "MC_MMIO_GTDPCTSHOTTH" },
+	{ 0xD04, 4, "MC_MMIO_GTDPCTSHOTTH2" },
+	{ 0xD08, 4, "MC_MMIO_MTDPCTSHOTTH" },
+	{ 0xD0C, 4, "MC_MMIO_MTDPCTSHOTTH2" },
+	{ 0xD10, 4, "MC_MMIO_TSROTDPC" },
+	{ 0xD14, 4, "MC_MMIO_TSMISC" },
+	{ 0xE00, 4, "MC_MMIO_TEST_MC" },
+	{ 0xE04, 4, "MC_MMIO_APSMCTL" },
+	{ 0xE08, 4, "MC_MMIO_DFT_STRAP1" },
+	{ 0xE0C, 4, "MC_MMIO_DFT_STRAP2" },
+	{ 0xE10, 4, "MC_MMIO_CFGFUSE1" },
+	{ 0xE1C, 4, "MC_MMIO_FUSEOVR1" },
+	{ 0xE20, 4, "MC_MMIO_FUSEOVR2" },
+	{ 0xE24, 4, "MC_MMIO_FUSEOVR3" },
+	{ 0xE28, 4, "MC_MMIO_FUSEOVR4" },
+	{ 0xE2C, 4, "MC_MMIO_NOA_RCOMP" },
+	{ 0xE30, 4, "MC_MMIO_NOAR1" },
+	{ 0xE34, 4, "MC_MMIO_NOAR2" },
+	{ 0xE38, 4, "MC_MMIO_NOAR3" },
+	{ 0xE3C, 4, "MC_MMIO_NOAR4" },
+	{ 0xE40, 4, "MC_MMIO_NOAR5" },
+	{ 0xE44, 4, "MC_MMIO_NOAR6" },
+	{ 0xE48, 4, "MC_MMIO_NOAR7" },
+	{ 0xE4C, 4, "MC_MMIO_NOAR8" },
+	{ 0xE50, 4, "MC_MMIO_NOAR9" },
+	{ 0xE54, 4, "MC_MMIO_NOAR10" },
+	{ 0xE58, 4, "MC_MMIO_ODOC1" },
+	{ 0xE5C, 4, "MC_MMIO_ODOC2" },
+	{ 0xE60, 4, "MC_MMIO_ODOSTAT" },
+	{ 0xE64, 4, "MC_MMIO_ODOSTAT2" },
+	{ 0xE68, 4, "MC_MMIO_ODOSTAT3" },
+	{ 0xE6C, 4, "MC_MMIO_DPLLMMC" },
+	{ 0xE70, 4, "MC_MMIO_CFGFUSE2" },
+	{ 0xE78, 4, "MC_MMIO_FUSEOVR5" },
+	{ 0xE7C, 4, "MC_MMIO_NOA_LVDSCTRL" },
+	{ 0xE80, 4, "MC_MMIO_NOABUFMSK" },
+	{ 0xF10, 4, "MC_MMIO_PMCFG" },
+	{ 0xF14, 4, "MC_MMIO_PMSTS" },
+	{ 0xF18, 4, "MC_MMIO_PMMISC" },
+	{ 0xF20, 4, "MC_MMIO_GTDPCNME" },
+	{ 0xF24, 4, "MC_MMIO_GTDPCTW" },
+	{ 0xF28, 4, "MC_MMIO_GTDPCTW2" },
+	{ 0xF2C, 4, "MC_MMIO_GTDPTWHOTTH" },
+	{ 0xF30, 4, "MC_MMIO_GTDPTWHOTTH2" },
+	{ 0xF34, 4, "MC_MMIO_GTDPTWHOTTH3" },
+	{ 0xF38, 4, "MC_MMIO_GTDPTWHOTTH4" },
+	{ 0xF3C, 4, "MC_MMIO_GTDPTWAUXTH" },
+	{ 0xF40, 4, "MC_MMIO_GTDPCTWIRTH" },
+	{ 0xF44, 4, "MC_MMIO_GTDPCTWIRTH2NMISC" },
+	{ 0xF48, 4, "MC_MMIO_GTDPHTM" },
+	{ 0xF4C, 4, "MC_MMIO_GTDPHTM2" },
+	{ 0xF50, 4, "MC_MMIO_GTDPHTM3" },
+	{ 0xF54, 4, "MC_MMIO_GTDPHTM4" },
+	{ 0xF58, 4, "MC_MMIO_GTDPAHTMOV" },
+	{ 0xF5C, 4, "MC_MMIO_GTDPAHTMOV2" },
+	{ 0xF60, 4, "MC_MMIO_GTDPAHTMOV3" },
+	{ 0xF64, 4, "MC_MMIO_GTDPAHTMOV4" },
+	{ 0xF68, 4, "MC_MMIO_GTDPATM" },
+	{ 0xF6C, 4, "MC_MMIO_GTDPCGC" },
+	{ 0xF90, 4, "MC_MMIO_PCWBFC" },
+	{ 0xF98, 4, "MC_MMIO_SCWBFC" },
+	{ 0xFA0, 4, "MC_MMIO_SBCTL" },
+	{ 0xFA4, 4, "MC_MMIO_SBCTL2" },
+	{ 0xFA8, 4, "MC_MMIO_PCWBPFC" },
+	{ 0xFAC, 4, "MC_MMIO_SBCTL3" },
+	{ 0xFB0, 4, "MC_MMIO_SBCLKGATECTRL" },
+	{ 0xFB4, 2, "MC_MMIO_SBBONUS0" },
+	{ 0xFB6, 2, "MC_MMIO_SBBONUS1" },
+	{ 0xFC0, 4, "MC_MMIO_PSMICTL" },
+	{ 0xFC4, 4, "MC_MMIO_PSMIMBASE" },
+	{ 0xFC8, 4, "MC_MMIO_PSMIMLIMIT" },
+	{ 0xFCC, 4, "MC_MMIO_PSMIDEBUG" },
+	{ 0xFD0, 4, "MC_MMIO_PSMICTL2" },
+	{ 0xFD4, 4, "MC_MMIO_PSMIRPLYNOAMAP" },
+	{ 0xFF0, 4, "MC_MMIO_CICGDIS" },
+	{ 0xFF4, 4, "MC_MMIO_CICTRL" },
+	{ 0xFF8, 4, "MC_MMIO_CISDCTRL" },
+	{ 0xFFC, 4, "MC_MMIO_CIMBSR" },
+	{ 0x1104, 4, "MC_MMIO_GFXC3C4" },
+	{ 0x1108, 4, "MC_MMIO_PMDSLFRC" },
+	{ 0x110C, 4, "MC_MMIO_PMMSPMRES" },
+	{ 0x1110, 4, "MC_MMIO_PMCLKRC" },
+	{ 0x1114, 4, "MC_MMIO_PMPXPRC" },
+	{ 0x111C, 4, "MC_MMIO_PMC6CTL" },
+	{ 0x1120, 4, "MC_MMIO_PMICHTST" },
+	{ 0x1124, 4, "MC_MMIO_PMBAK" },
+	{ 0x2800, 4, "MC_MMIO_C0TXDQDQS0MISC" },
+	{ 0x2804, 4, "MC_MMIO_C0TXDQDQS1MISC" },
+	{ 0x2808, 4, "MC_MMIO_C0TXDQDQS2MISC" },
+	{ 0x280C, 4, "MC_MMIO_C0TXDQDQS3MISC" },
+	{ 0x2810, 4, "MC_MMIO_C0TXDQDQS4MISC" },
+	{ 0x2814, 4, "MC_MMIO_C0TXDQDQS5MISC" },
+	{ 0x2818, 4, "MC_MMIO_C0TXDQDQS6MISC" },
+	{ 0x281C, 4, "MC_MMIO_C0TXDQDQS7MISC" },
+	{ 0x2C00, 2, "MC_MMIO_CSHRPDCTL5" },
+	{ 0x2C02, 2, "MC_MMIO_CSHWRIOBONUSX" },
+	{ 0x2C04, 4, "MC_MMIO_C0CALRESULT1" },
+	{ 0x2C08, 4, "MC_MMIO_C0CALRESULT2" },
+	{ 0x2C0C, 4, "MC_MMIO_C0MODREFOFFSET1" },
+	{ 0x2C10, 4, "MC_MMIO_C0MODREFOFFSET2" },
+	{ 0x2C14, 1, "MC_MMIO_C0SLVDLLOUTEN" },
+	{ 0x2C15, 1, "MC_MMIO_C0DYNSLVDLLEN2" },
+	{ 0x3000, 4, "MC_MMIO_LVDSICR1" },
+	{ 0x3004, 4, "MC_MMIO_LVDSICR2" },
+	{ 0x3008, 4, "MC_MMIO_IOCKTRR1" },
+	{ 0x300C, 4, "MC_MMIO_IOCKTRR2" },
+	{ 0x3010, 4, "MC_MMIO_IOCKTRR3" },
+	{ 0x3014, 4, "MC_MMIO_IOCKTSTTR" },
+	{ 0x3800, 4, "MC_MMIO_IUB" },
+	{ 0x3804, 4, "MC_MMIO_BIR" },
+	{ 0x3808, 1, "MC_MMIO_TSC1" },
+	{ 0x3809, 1, "MC_MMIO_TSC2" },
+	{ 0x380A, 1, "MC_MMIO_TSS" },
+	{ 0x380B, 1, "MC_MMIO_TR" },
+	{ 0x380C, 1, "MC_MMIO_TSTTP" },
+	{ 0x3812, 1, "MC_MMIO_TCO" },
+	{ 0x3813, 1, "MC_MMIO_TST" },
+	{ 0x3814, 2, "MC_MMIO_THERM1" },
+	{ 0x3816, 2, "MC_MMIO_THERM3" },
+	{ 0x381A, 4, "MC_MMIO_TIS" },
+	{ 0x3820, 1, "MC_MMIO_TERRCMD" },
+	{ 0x3821, 1, "MC_MMIO_TSMICMD" },
+	{ 0x3822, 2, "MC_MMIO_TSCICMD" },
+	{ 0x3824, 1, "MC_MMIO_TSC3" },
+	{ 0x3825, 1, "MC_MMIO_EXTTSCS" },
+	{ 0x3830, 4, "MC_MMIO_C0THRMSTS" }
+};
+
+
 /*
  * (G)MCH MMIO Config Space
  */
@@ -32,6 +599,7 @@ 
 	uint64_t mchbar_phys;
 	struct pci_dev *nb_device6; /* "overflow device" on i865 */
 	uint16_t pcicmd6;
+	const io_register_t *mch_registers = NULL;
 
 	printf("\n============= MCHBAR ============\n\n");
 
@@ -99,6 +667,7 @@ 
 		}
 		mchbar_phys &= 0xfffffffe;
  		mchbar_phys |= ((uint64_t)pci_read_long(nb, 0x4c)) << 32;
+		mch_registers = nm10_mch_registers;
  		break;
 	case PCI_DEVICE_ID_INTEL_82443LX:
 	case PCI_DEVICE_ID_INTEL_82443BX:
@@ -132,9 +701,26 @@ 
 	else
 		printf("MCHBAR = 0x%08llx (MEM)\n\n", mchbar_phys);
 
-	for (i = 0; i < size; i += 4) {
-		if (*(uint32_t *)(mchbar + i))
+	if (mch_registers != NULL) {
+		for (i = 0; i < size; i++) {
+			switch (mch_registers[i].size) {
+				case 4:
+					printf("mchbar+0x%04x: 0x%08x (%s)\n", mch_registers[i].addr, *(uint32_t *)(mchbar+mch_registers[i].addr), mch_registers[i].name);
+					break;
+				case 2:
+					printf("mchbar+0x%04x: 0x%04x (%s)\n", mch_registers[i].addr, *(uint16_t *)(mchbar+mch_registers[i].addr), mch_registers[i].name);
+					break;
+				case 1:
+				    printf("mchbar+0x%04x: 0x%02x (%s)\n", mch_registers[i].addr, *(uint8_t *)(mchbar+mch_registers[i].addr), mch_registers[i].name);
+					break;
+			}
+		}
+	}
+	else {
+		for (i = 0; i < size; i += 4) {
+			if (*(uint32_t *)(mchbar + i))
 			printf("0x%04x: 0x%08x\n", i, *(uint32_t *)(mchbar+i));
+		}
 	}
 
 	unmap_physical((void *)mchbar, size);