Submitter | Josef Kellermann |
---|---|
Date | 2011-02-02 19:06:25 |
Message ID | <4D49AB31.7030007@arcor.de> |
Download | mbox | patch |
Permalink | /patch/2603/ |
State | Accepted |
Headers | show |
Comments
Patch
Index: src/southbridge/amd/rs690/ht.c =================================================================== --- src/southbridge/amd/rs690/ht.c (Revision 6326) +++ src/southbridge/amd/rs690/ht.c (Arbeitskopie) @@ -70,8 +70,13 @@ pci_write_config32(dev, 0x4C, dword); } +static void ht_dev_set_subsystem(struct device *dev, unsigned vendor, unsigned device) +{ + pci_write_config32(dev, 0x50, ((device & 0xffff) << 16) | (vendor & 0xffff)); +} + static struct pci_operations lops_pci = { - .set_subsystem = pci_dev_set_subsystem, + .set_subsystem = ht_dev_set_subsystem, }; static struct device_operations ht_ops = {
The default 'pci_set_subsystem' sets the subvendor/device id register #0x2c. In fact for a few devices in the RS690 the register is 0x4c respectively 0x50. Moved the default set_subsystem implementation to chipset specific. Signed-off-by: Josef Kellermann<seppk@arcor.de> <mailto://seppk@arcor.de> Index: src/southbridge/amd/rs690/gfx.c =================================================================== --- src/southbridge/amd/rs690/gfx.c (Revision 6326) +++ src/southbridge/amd/rs690/gfx.c (Arbeitskopie) @@ -193,8 +193,13 @@ /* TODO: the optimization of voltage and frequency */ } +static void gfx_dev_set_subsystem(struct device *dev, unsigned vendor, unsigned device) +{ + pci_write_config32(dev, 0x4c, ((device & 0xffff) << 16) | (vendor & 0xffff)); +} + static struct pci_operations lops_pci = { - .set_subsystem = pci_dev_set_subsystem, + .set_subsystem = gfx_dev_set_subsystem, }; static struct device_operations pcie_ops = {