Patchwork PyGen: generation from C code to XML and from XML to C code

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Submitter Антон Кочков
Date 2011-02-14 19:53:41
Message ID <AANLkTikWHME3fW-R9vmsffYeWr3kY4POv-ZPU_aUBKAq@mail.gmail.com>
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Permalink /patch/2640/
State New
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Антон Кочков - 2011-02-14 19:53:41
msrtool: add support for code generation from xml files
superiotool: add support for code generation from xml files
Search all *.msr.xml files in directory, creating *.c files from them,
produce *.patch for msrtool.c and msrtool.h
Search all *.sio.xml files in directory, creating *.c files from them
Signed-off-by: Anton Kochkov <anton.kochkov@gmail.com>
---

Next will be gui interface

Patch

Index: util/pygen/generate.py
===================================================================
--- util/pygen/generate.py	(revision 0)
+++ util/pygen/generate.py	(revision 0)
@@ -0,0 +1,25 @@ 
+#!/usr/bin/env python3
+
+""" This file is part of PyGen
+
+	Copyright (C) 2011 Anton Kochkov <anton.kochkov@gmail.com>
+
+	This program is free software; you can redistribute it and/or modify
+	it under the terms of the GNU General Public License version 2 as
+	published by the Free Software Foundation.
+
+	This program is distributed in the hope that it will be useful,
+	but WITHOUT ANY WARRANTY; without even the implied warranty of
+	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+	GNU General Public License for more details.
+
+	You should have received a copy of the GNU General Public License
+	along with this program; if not, write to the Free Software
+	Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
+"""
+
+import modules.msr
+import modules.sio
+
+modules.msr.start(0)
+modules.sio.start(0)
Index: util/pygen/export_msr.c
===================================================================
--- util/pygen/export_msr.c	(revision 0)
+++ util/pygen/export_msr.c	(revision 0)
@@ -0,0 +1,105 @@ 
+/*
+ * This file is part of the superiotool project.
+ *
+ * Copyright (C) Anton Kochkov <anton.kochkov@gmail.com>
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
+ */
+
+#include "msrtool.h"
+#include <stdio.h>
+
+struct cpuid_t* cpuid(void) {return 0;}
+struct pci_dev *pci_dev_find(uint16_t vendor, uint16_t device) {
+	return NULL;
+}
+
+#include "k8.c"
+#include "geodelx.c"
+#include "geodegx2.c"
+#include "cs5536.c"
+
+#define ARRAY_SIZE(a) ((int)(sizeof(a) / sizeof((a)[0])))
+
+typedef struct {
+	long offset;
+	char *name;
+} msr_entry_t;
+
+void export_msr(FILE *stream, const struct msrdef *msarray, char* name, char* description) {
+	int i = 0, j = 0, k = 0;
+	char *msr_type;
+	char *bitfield_type;
+
+	fprintf(stream, "<?xml version=\"1.0\" encoding=\"UTF-8\"?>");
+	fprintf(stream, "<msrarray name=\"%s\" description=\"%s\">\n", name, description);
+	fprintf(stream, "<cpu family=\"0x6\" model=\"0x17\" stepping=\"5\" />\n");
+
+	i = 0;
+	while (msarray[i].type != MSRTYPE_EOT) {
+		if (msarray[i].symbol != NULL) {
+			if (msarray[i].type == MSRTYPE_WRONLY) msr_type = "wo";
+			else if (msarray[i].type == MSRTYPE_RDWR) msr_type = "rw";
+			else msr_type = "ro"; // MSRTYPE_RDONLY
+			
+			fprintf(stream, "<msr address=\"0x%x\" type=\"%s\" name=\"%s\" description=\"%s\">\n", msarray[i].addr, msr_type, msarray[i].symbol, msarray[i].desc);
+			j = 0;
+			while (msarray[i].bits[j].size != 0 ) {
+				if (msarray[i].bits[j].name != NULL) {
+					if (msarray[i].bits[j].present == 	PRESENT_RSVD) bitfield_type = "reserved";
+					else if (msarray[i].bits[j].present == PRESENT_DEC) bitfield_type = "dec";
+					else if (msarray[i].bits[j].present == PRESENT_BIN) bitfield_type = "bin";
+					else if (msarray[i].bits[j].present == PRESENT_OCT) bitfield_type = "oct";
+					else if (msarray[i].bits[j].present ==	PRESENT_HEX) bitfield_type = "hex";
+					else bitfield_type = "hex"; // what is it??	PRESENT_HEXDEC
+
+					fprintf(stream, "<bitfield start=\"%d\" size=\"%d\" name=\"%s\" description=\"%s\" type=\"%s\">\n", msarray[i].bits[j].start, msarray[i].bits[j].size, msarray[i].bits[j].name, msarray[i].bits[j].desc, bitfield_type);
+					k = 0;
+					while (msarray[i].bits[j].bitval[k].text != NULL) {
+						fprintf(stream, "<value number=\"%d\" description=\"%s\" />\n", msarray[i].bits[j].bitval[k].value.lo, msarray[i].bits[j].bitval[k].text);
+					k++;
+					}
+					fprintf(stream, "</bitfield>\n");
+				}
+			j++;
+			}
+			fprintf(stream, "</msr>\n");
+		}
+	i++;
+	}
+	fprintf(stream, "</msrarray>\n");
+}
+
+int main(int argc, char** argv){
+
+	FILE *stream;
+
+	stream = fopen("k8.msr.xml", "w");
+	export_msr(stream, k8_msrs, "k8", "bla-bla");
+	fclose(stream);
+
+	stream = fopen("cs5536.msr.xml", "w");
+	export_msr(stream, cs5536_msrs, "cs5536", "dont seen before");
+	fclose(stream);
+
+	stream = fopen("geodelx.msr.xml", "w");
+	export_msr(stream, geodelx_msrs, "geodelx", "what is this?");
+	fclose(stream);
+
+	stream = fopen("geodegx2.msr.xml", "w");
+	export_msr(stream, geodegx2_msrs, "geodegx2", "is it very different from geodelx?");
+	fclose(stream);
+
+	return 0;
+}
Index: util/pygen/__init__.py
===================================================================
Index: util/pygen/modules/sio.py
===================================================================
--- util/pygen/modules/sio.py	(revision 0)
+++ util/pygen/modules/sio.py	(revision 0)
@@ -0,0 +1,363 @@ 
+#!/usr/bin/env python3
+
+""" This file is part of PyGen
+
+	Copyright (C) 2011 Anton Kochkov <anton.kochkov@gmail.com>
+	
+	This program is free software; you can redistribute it and/or modify
+	it under the terms of the GNU General Public License version 2 as
+	published by the Free Software Foundation.
+
+	This program is distributed in the hope that it will be useful,
+	but WITHOUT ANY WARRANTY; without even the implied warranty of
+	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+	GNU General Public License for more details.
+
+	You should have received a copy of the GNU General Public License
+	along with this program; if not, write to the Free Software
+	Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
+"""
+
+""" Our abstract classes for register, array definitions, etc... """
+# import abstract
+
+""" Standard imports """
+import sys
+import os
+import xml.etree.ElementTree
+import re
+
+# define REGSPACE class
+
+class REGSPACE:
+	
+	# Object initialisation
+
+	def __init__(self, number = "-1" , name = "noldn", description = "none"):
+		self.number = number
+		self.name = name
+		self.description = description
+		self.registers = dict({})
+		self.registers_quantity = 0
+
+	# Define object equation operation
+
+	def __eq__(self, other):
+		return (self.start == other.start)&(self.size == other.size)
+
+	def addRegister(self, address, default_value, description, id):
+		regtmp = dict({})
+		regtmp["address"] = address
+		regtmp["default_value"] = default_value
+		regtmp["description"] = description
+		self.registers[id] = regtmp
+		self.registers_quantity += 1
+
+	def getRegister(self, id):
+		return self.registers.get(id)
+
+	# define properties
+
+	@property
+	def number(self):
+		return self.__number
+	
+	@number.setter
+	def number(self, number):
+		self.__number = number
+
+	@property
+	def name(self):
+		return self.__name
+	
+	@name.setter
+	def name(self, name):
+		self.__name = name
+
+	@property
+	def description(self):
+		return self.__description
+	
+	@description.setter
+	def description(self, description):
+		self.__description = description
+
+	@property
+	def registers_quantity(self):
+		return self.__registers_quantity
+
+	@registers_quantity.setter
+	def registers_quantity(self, registers_quantity):
+		self.__registers_quantity = registers_quantity
+
+# define SIO class
+
+class SIO:
+	
+	# Object initialisation
+
+	def __init__(self, id = 0, name = "", description = ""):
+		self.id = id
+		self.name = name
+		self.description = description
+		self.regspaces = dict({})
+		self.regspaces_quantity = 0
+	
+	# Define object equation operation
+
+	def __eq__(self, other):
+		return self.id == other.id
+
+	# Included structures
+	
+	def addRegSpace(self, regspace, number):
+		self.regspaces[number] = regspace
+		self.regspaces_quantity += 1
+
+	def getRegSpace(self, number):
+		return self.regspaces.get(number)
+
+	# define properties
+
+	@property
+	def id(self):
+		return self.__id
+
+	@id.setter
+	def id(self, id):
+		self.__id = id
+
+	@property
+	def name(self):
+		return self.__name
+	
+	@name.setter
+	def name(self, name):
+		self.__name = name
+
+	@property
+	def description(self):
+		return self.__description
+
+	@description.setter
+	def description(self, description):
+		self.__description = description
+
+	@property
+	def regspaces_quantity(self):
+		return self.__regspaces_quantity
+
+	@regspaces_quantity.setter
+	def regspaces_quantity(self, regspaces_quantity):
+		self.__regspaces_quantity = regspaces_quantity
+
+	
+
+# define SIO_ARRAY class
+
+class SIO_ARRAY:
+	
+	# Object initialisation
+
+	def __init__(self, name = "unknown", description = "none"):
+		self.name = name
+		self.description = description
+		self.sios = dict({})
+		self.sio_quantity = 0
+
+	# Included structures
+	
+	def addSIO(self, sio, id):
+		self.sios[id] = sio
+		self.sio_quantity += 1
+
+	def getSIO(self, id):
+		return self.sios.get(id)
+
+	# define properties
+
+	@property
+	def name(self):
+		return self.__name
+	
+	@name.setter
+	def name(self, name):
+		self.__name = name
+
+	@property
+	def description(self):
+		return self.__description
+	
+	@description.setter
+	def description(self, description):
+		self.__description = description
+
+	@property
+	def sio_quantity(self):
+		return self.__sio_quantity
+
+	@sio_quantity.setter
+	def sio_quantity(self, sio_quantity):
+		self.__sio_quantity = sio_quantity
+
+sioarray = SIO_ARRAY()
+
+# Parse XML file and fill MSR object properties
+
+def parse_definitions(filename):
+	tree = None
+	try:
+		tree = xml.etree.ElementTree.parse(filename)
+	except (EnviromentError, xml.parsers.expat.ExpatError) as err:
+		print("{0}: import error: {1}".format(os.path.basename(sys.argv[0]), err))
+		return False
+	
+	# Read name of MSR module
+
+	xml_sioarray = tree.getroot()
+	sioarray.name = xml_sioarray.get("name")	
+	sioarray.description = xml_sioarray.get("description")
+	sioarray.sio_quantity = 0;
+
+	# Read all SIOs
+	
+	for element in tree.findall("sio"):
+		try:
+
+			# read all msr attributes
+			sio = {}
+			for attribute in ("model", "id", "description"):
+				sio[attribute] = element.get(attribute)
+
+			sio_tmp = SIO(sio["id"], sio["model"], sio["description"])
+
+			# search all ldns defined in msr
+			for ldn in element.findall("ldn"):
+				try:
+
+					# read all bitfield attributes
+					ldn_tmp = {}
+					for ldnattr in ("number", "name", "description"):
+						ldn_tmp[ldnattr] = ldn.get(ldnattr)
+
+					ldn_entry = REGSPACE(ldn_tmp["number"], ldn_tmp["name"], ldn_tmp["description"])
+					
+					# search all possible values with description
+					for regs in ldn.findall("reg"):
+						try:
+
+							# read each value description
+							reg = {}
+							for regattr in ("address", "name", "description", "default_value"):
+								reg[regattr] = regs.get(regattr)
+							
+							ldn_entry.addRegister(reg["address"], reg["default_value"], reg["description"], ldn_entry.registers_quantity)
+						except (ValueError, LookupError) as err:
+							print("{0}: import error: {1}".format(os.path.basename(sys.argv[0]), err))
+							return False
+
+					sio_tmp.addRegSpace(ldn_entry, sio_tmp.regspaces_quantity)
+
+				except (ValueError, LookupError) as err:
+					print("{0}: import error: {1}".format(os.path.basename(sys.argv[0]), err))
+					return False
+
+			sioarray.addSIO(sio_tmp, sioarray.sio_quantity)
+	
+		except (ValueError, LookupError) as err:
+			print("{0}: import error: {1}".format(os.path.basename(sys.argv[0]), err))
+			return False
+	
+	return True
+
+def output_print():
+	print("#include \"superiotool.h\"\n")
+	print(("const struct superio_registers {0}_reg_table[] = ".format(sioarray.name) + "{"))
+	i = 0
+	while i < sioarray.sio_quantity:
+		print(("\t{ " + "{0}, {1}, ".format(sioarray.getSIO(i).id, sioarray.getSIO(i).name) + ", {" + " \\\\ {0}".format(sioarray.getSIO(i).description)))
+		j = 0
+		while j < sioarray.getSIO(i).regspaces_quantity:
+			print("\t\t{ " + "{0}, \"{1}\" ".format(sioarray.getSIO(i).getRegSpace(j).number, sioarray.getSIO(i).getRegSpace(j).name) + " {" + " \\ {0}".format(sioarray.getSIO(i).getRegSpace(j).description))
+			k = 0
+			sys.stdout.write("\t\t\t{ ")
+			while k < sioarray.getSIO(i).getRegSpace(j).registers_quantity:
+				sys.stdout.write("{0}, ".format(sioarray.getSIO(i).getRegSpace(j).getRegister(k)["address"]))
+				k += 1
+			sys.stdout.write("EOT },\n")
+			sys.stdout.flush()
+			k = 0
+			sys.stdout.write("\t\t\t{ ")
+			while k < sioarray.getSIO(i).getRegSpace(j).registers_quantity:
+				sys.stdout.write("{0}, ".format(sioarray.getSIO(i).getRegSpace(j).getRegister(k)["default_value"]))
+				k += 1
+			sys.stdout.write("EOT },\n")
+			sys.stdout.flush()
+			j += 1
+			print("\t\t}},")
+		print("\t\t{ EOT }}},")
+		i += 1
+	print("\t{ EOT }")
+	print("};")
+
+# Simple output implementation
+
+def output_file():
+	filename = "output/" + "_" + sioarray.name + ".c"
+	fh = None
+	try:
+		print("trying write {0}...".format(filename))
+		fh = open(filename, "w", encoding="utf8")
+		fh.write("#include \"superiotool.h\"\n\n")
+		fh.write(("const struct superio_registers reg_table[] = {" + " \\{0} \n".format(sioarray.name)))
+		i = 0
+		while i < sioarray.sio_quantity:
+			fh.write(("\t{ " + "{0}, {1}, ".format(sioarray.getSIO(i).id, sioarray.getSIO(i).name) + ", {" + " \\\\ {0}\n".format(sioarray.getSIO(i).description)))
+			j = 0
+			while j < sioarray.getSIO(i).regspaces_quantity:
+				fh.write("\t\t{ " + "{0}, \"{1}\" ".format(sioarray.getSIO(i).getRegSpace(j).number, sioarray.getSIO(i).getRegSpace(j).name) + " {" + " \\ {0}\n".format(sioarray.getSIO(i).getRegSpace(j).description))
+				k = 0
+				fh.write("\t\t\t{ ")
+				while k < sioarray.getSIO(i).getRegSpace(j).registers_quantity:
+					fh.write("{0}, ".format(sioarray.getSIO(i).getRegSpace(j).getRegister(k)["address"]))
+					k += 1
+				fh.write("EOT },\n")
+				k = 0
+				fh.write("\t\t\t{ ")
+				while k < sioarray.getSIO(i).getRegSpace(j).registers_quantity:
+					fh.write("{0}, ".format(sioarray.getSIO(i).getRegSpace(j).getRegister(k)["default_value"]))
+					k += 1
+				fh.write("EOT },\n")
+				j += 1
+				fh.write("\t\t}},\n")
+			fh.write("\t\t{ EOT }}},\n")
+			i += 1
+		fh.write("\t{ EOT }\n")
+		fh.write("};\n")
+		return True
+	except (EnviromentError) as err:
+		print("{0}: export error: {1}".format(os.path.basename(sys.argv[0]), err))
+		return False
+	finally:
+		if fh is not None:
+			fh.close()
+
+
+# Program body
+# We trying to find all files *.sio.xml
+# read them, produce files, produce patches
+def start(debug):
+	search_cmd = 'find data/sio/ -name "*.sio.xml" -print'
+	
+	for file in os.popen(search_cmd).readlines():     # run find command
+		num  = 1
+		name = file[:-1]
+
+		print("Generating msr from {0}...".format(name))
+		
+		parse_definitions(name)
+		if debug:
+			output_print()
+		output_file()
+#		produce_patch()
+
Index: util/pygen/modules/__init__.py
===================================================================
Index: util/pygen/modules/msr.py
===================================================================
--- util/pygen/modules/msr.py	(revision 0)
+++ util/pygen/modules/msr.py	(revision 0)
@@ -0,0 +1,521 @@ 
+#!/usr/bin/env python3
+
+""" This file is part of PyGen
+
+	Copyright (C) 2011 Anton Kochkov <anton.kochkov@gmail.com>
+	
+	This program is free software; you can redistribute it and/or modify
+	it under the terms of the GNU General Public License version 2 as
+	published by the Free Software Foundation.
+
+	This program is distributed in the hope that it will be useful,
+	but WITHOUT ANY WARRANTY; without even the implied warranty of
+	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+	GNU General Public License for more details.
+
+	You should have received a copy of the GNU General Public License
+	along with this program; if not, write to the Free Software
+	Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
+"""
+
+import sys
+import os
+import xml.etree.ElementTree
+import re
+
+# define BITFIELD class
+
+class BITFIELD:
+	
+	# Object initialisation
+
+	def __init__(self, start = 63, size = 63, name = "unknown", description = "none", type = "bin"):
+		self.start = start
+		self.size = size
+		self.name = name
+		self.description = description
+		self.type = type
+		self.values = dict({})
+		self.value_quantity = 0
+
+	# Define object equation operation
+
+	def __eq__(self, other):
+		return (self.start == other.start)&(self.size == other.size)
+
+	def addValue(self, value, description, id):
+		valtmp = dict({})
+		valtmp["value"] = value
+		valtmp["description"] = description
+		self.values[id] = valtmp
+		self.value_quantity += 1
+
+	def getValue(self, id):
+		return self.values.get(id)
+
+	# define properties
+
+	@property
+	def start(self):
+		return self.__start
+	
+	@start.setter
+	def start(self, start):
+		self.__start = start
+
+	@property
+	def size(self):
+		return self.__size
+	
+	@size.setter
+	def size(self, size):
+		self.__size = size
+
+	@property
+	def name(self):
+		return self.__name
+	
+	@name.setter
+	def name(self, name):
+		self.__name = name
+
+	@property
+	def description(self):
+		return self.__description
+	
+	@description.setter
+	def description(self, description):
+		self.__description = description
+
+	@property
+	def type(self):
+		return self.__type
+	
+	@type.setter
+	def type(self, type):
+		self.__type = type
+
+	@property
+	def value_quantity(self):
+		return self.__value_quantity
+
+	@value_quantity.setter
+	def value_quantity(self, value_quantity):
+		self.__value_quantity = value_quantity
+
+# define MSR class
+
+class MSR:
+	
+	# Object initialisation
+
+	def __init__(self, address = 0, type = "ro", name = "", description = ""):
+		self.address = address
+		self.type = type
+		self.name = name
+		self.description = description
+		self.bitfields = dict({})
+		self.bitfield_quantity = 0
+	
+	# Define object equation operation
+
+	def __eq__(self, other):
+		return self.address == other.address
+
+	# Included structures
+	
+	def addBitfield(self, bitfield, id):
+		self.bitfields[id] = bitfield
+		self.bitfield_quantity += 1
+
+	def getBitfield(self, id):
+		return self.bitfields.get(id)
+
+	# define properties
+
+	@property
+	def address(self):
+		return self.__address
+
+	@address.setter
+	def address(self, address):
+		self.__address = address
+
+	@property
+	def name(self):
+		return self.__name
+	
+	@name.setter
+	def name(self, name):
+		self.__name = name
+
+	@property
+	def description(self):
+		return self.__description
+
+	@description.setter
+	def description(self, description):
+		self.__description = description
+
+	@property
+	def type(self):
+		return self.__type
+
+	@type.setter
+	def type(self, type):
+		self.__type = type
+	
+	@property
+	def bitfield_quantity(self):
+		return self.__bitfield_quantity
+
+	@bitfield_quantity.setter
+	def bitfield_quantity(self, bitfield_quantity):
+		self.__bitfield_quantity = bitfield_quantity
+
+	
+
+# define MSR_ARRAY class
+
+class MSR_ARRAY:
+	
+	# Object initialisation
+
+	def __init__(self, name = "unknown", description = "none"):
+		self.name = name
+		self.description = description
+		self.cpu_condition = ""
+		self.msrs = dict({})
+		self.msr_quantity = 0
+
+	# Included structures
+	
+	def addMsr(self, msr, id):
+		self.msrs[id] = msr
+		self.msr_quantity += 1
+
+	def getMsr(self, id):
+		return self.msrs.get(id)
+
+	# define properties
+
+	@property
+	def name(self):
+		return self.__name
+	
+	@name.setter
+	def name(self, name):
+		self.__name = name
+
+	@property
+	def description(self):
+		return self.__description
+	
+	@description.setter
+	def description(self, description):
+		self.__description = description
+
+	@property
+	def cpu_condition(self):
+		return self.__cpu_condition
+	
+	@cpu_condition.setter
+	def cpu_condition(self, cpu_condition):
+		self.__cpu_condition = cpu_condition
+
+	@property
+	def msr_quantity(self):
+		return self.__msr_quantity
+
+	@msr_quantity.setter
+	def msr_quantity(self, msr_quantity):
+		self.__msr_quantity = msr_quantity
+
+msrarray = MSR_ARRAY()
+
+# Parse XML file and fill MSR object properties
+
+def parse_definitions(filename):
+	tree = None
+	try:
+		tree = xml.etree.ElementTree.parse(filename)
+	except (EnviromentError, xml.parsers.expat.ExpatError) as err:
+		print("{0}: import error: {1}".format(os.path.basename(sys.argv[0]), err))
+		return False
+	
+	# Read name of MSR module
+
+	xml_msrarray = tree.getroot()
+	msrarray.name = xml_msrarray.get("name")	
+	msrarray.description = xml_msrarray.get("description")
+	msrarray.msr_quantity = 0;
+
+	# Read supported CPUs
+
+	for element in tree.findall("cpu"):
+		try:
+			cpu = {}
+			for attribute in ("family", "model", "stepping"):
+				cpu[attribute] = element.get(attribute)
+			
+			# produce code for check cpuid
+
+			if (msrarray.cpu_condition != ""):
+				msrarray.cpu_condition = msrarray.cpu_condition + " | "
+			msrarray.cpu_condition = msrarray.cpu_condition + "(({0} == id->family) & ({1} == id->model))".format(cpu["family"], cpu["model"])
+
+		except (ValueError, LookupError) as err:
+			print("{0}: import error: {1}".format(os.path.basename(sys.argv[0]), err))
+			return False
+
+	# Read all MSRs
+	
+	for element in tree.findall("msr"):
+		try:
+
+			# read all msr attributes
+			msr = {}
+			for attribute in ("address", "type", "name", "description"):
+				msr[attribute] = element.get(attribute)
+
+			if (msr["type"] == "wo"):
+				msr["type"] = "MSRTYPE_WRONLY"
+			elif (msr["type"] == "rw"):
+				msr["type"] = "MSRTYPE_RDRW"
+			else:
+				msr["type"] = "MSRTYPE_RDONLY"
+
+			msr_tmp = MSR(msr["address"], msr["type"], msr["name"], msr["description"])
+
+			# search all bitfields defined in msr
+			for bitf in element.findall("bitfield"):
+				try:
+
+					# read all bitfield attributes
+					bitfield = {}
+					for bitattr in ("start", "size", "name", "description", "type"):
+						bitfield[bitattr] = bitf.get(bitattr)
+
+					if (bitfield["type"] == "bin"):
+						bitfield["type"] = "PRESENT_BIN"
+					elif (bitfield["type"] == "dec"):
+						bitfield["type"] = "PRESENT_DEC"
+					elif (bitfield["type"] == "hex"):
+						bitfield["type"] = "PRESENT_HEX"
+					elif (bitfield["type"] == "oct"):
+						bitfield["type"] = "PRESENT_OCT"
+					else:
+						bitfield["type"] = "PRESENT_RSVD"
+
+					btf_tmp = BITFIELD(bitfield["start"], bitfield["size"], bitfield["name"], bitfield["description"], bitfield["type"])
+					
+					# search all possible values with description
+					for bitval in bitf.findall("value"):
+						try:
+
+							# read each value description
+							value = {}
+							for valattr in ("number", "description"):
+								value[valattr] = bitval.get(valattr)
+							
+							btf_tmp.addValue(value["number"], value["description"], btf_tmp.value_quantity)
+						except (ValueError, LookupError) as err:
+							print("{0}: import error: {1}".format(os.path.basename(sys.argv[0]), err))
+							return False
+
+					msr_tmp.addBitfield(btf_tmp, msr_tmp.bitfield_quantity)
+
+				except (ValueError, LookupError) as err:
+					print("{0}: import error: {1}".format(os.path.basename(sys.argv[0]), err))
+					return False
+
+			msrarray.addMsr(msr_tmp, msrarray.msr_quantity)
+	
+		except (ValueError, LookupError) as err:
+			print("{0}: import error: {1}".format(os.path.basename(sys.argv[0]), err))
+			return False
+	
+	return True
+
+# Simple output implementation
+
+def output_print():
+	print("#include \"msrtool.h\"\n")
+	print("int {0}_probe(const struct targetdef *target) ".format(msrarray.name) + "{")
+	print("\tstruct cpuid_t *id = cpuid();")
+	print("\tint cond = ({0});".format(msrarray.cpu_condition))
+	print("\treturn cond;\n}\n")
+	print(("const struct msrdef {0}_msrs[] = ".format(msrarray.name) + "{"))
+	i = 0
+	while i < msrarray.msr_quantity:
+		print(("\t{ " + "{0}, {1}, MSR2(0, 0), \"{2}\", \"{3}\"".format(msrarray.getMsr(i).address, msrarray.getMsr(i).type, msrarray.getMsr(i).name, msrarray.getMsr(i).description) + ", {"))
+		j = 0
+		while j < msrarray.getMsr(i).bitfield_quantity:
+			print("\t\t{ " + "{0}, {1}, \"{2}\", \"{3}\", {4}".format(msrarray.getMsr(i).getBitfield(j).start, msrarray.getMsr(i).getBitfield(j).size, msrarray.getMsr(i).getBitfield(j).name, msrarray.getMsr(i).getBitfield(j).description, msrarray.getMsr(i).getBitfield(j).type) + " }")
+			k = 0
+			while k < msrarray.getMsr(i).getBitfield(j).value_quantity:
+				print("\t\t\t{ " + "MSR1({0}), \"{1}\"".format(msrarray.getMsr(i).getBitfield(j).getValue(k)["value"], msrarray.getMsr(i).getBitfield(j).getValue(k)["description"]) + " },")
+				k += 1
+			j += 1
+			print("\t\t\t{ BITVAL_EOT }")
+		print("\t\t{ BITS_EOT }")
+		print("\t}},")
+		i += 1
+	print("\t{ MSR_EOT }")
+	print("};")
+
+# Simple output implementation
+
+def output_file():
+	filename = "output/" + "_" + msrarray.name + ".c"
+	fh = None
+	try:
+		fh = open(filename, "w", encoding="utf8")
+		fh.write("#include \"msrtool.h\"\n\n")
+		fh.write("int {0}_probe(const struct targetdef *target) ".format(msrarray.name) + "{\n")
+		fh.write("\tstruct cpuid_t *id = cpuid();\n")
+		fh.write("\tint cond = ({0});\n".format(msrarray.cpu_condition))
+		fh.write("\treturn cond;\n}\n\n")
+		fh.write(("const struct msrdef {0}_msrs[] = ".format(msrarray.name) + "{\n"))
+		i = 0
+		while i < msrarray.msr_quantity:
+			fh.write(("\t{ " + "{0}, {1}, MSR2(0, 0), \"{2}\", \"{3}\"".format(msrarray.getMsr(i).address, msrarray.getMsr(i).type, msrarray.getMsr(i).name, msrarray.getMsr(i).description) + ", {\n"))
+			j = 0
+			while j < msrarray.getMsr(i).bitfield_quantity:
+				fh.write("\t\t{ " + "{0}, {1}, \"{2}\", \"{3}\", {4}".format(msrarray.getMsr(i).getBitfield(j).start, msrarray.getMsr(i).getBitfield(j).size, msrarray.getMsr(i).getBitfield(j).name, msrarray.getMsr(i).getBitfield(j).description, msrarray.getMsr(i).getBitfield(j).type) + " }\n")
+				k = 0
+				while k < msrarray.getMsr(i).getBitfield(j).value_quantity:
+					fh.write("\t\t\t{ " + "MSR1({0}), \"{1}\"".format(msrarray.getMsr(i).getBitfield(j).getValue(k)["value"], msrarray.getMsr(i).getBitfield(j).getValue(k)["description"]) + " },\n")
+					k += 1
+				j += 1
+				fh.write("\t\t\t{ BITVAL_EOT }\n")
+			fh.write("\t\t{ BITS_EOT }\n")
+			fh.write("\t}},\n")
+			i += 1
+		fh.write("\t{ MSR_EOT }\n")
+		fh.write("};\n")
+		return True
+	except (EnviromentError) as err:
+		print("{0}: export error: {1}".format(os.path.basename(sys.argv[0]), err))
+		return False
+	finally:
+		if fh is not None:
+			fh.close()
+
+
+# Produce patch file
+def produce_patch():
+	msrtool_header_file = "../msrtool/msrtool.h"
+	msrtool_c_file = "../msrtool/msrtool.c"
+	patch_name = "output/" + msrarray.name + ".patch"
+
+	# paste this before "#endif /* MSRTOOL_H */"
+	header_add_line = "+/* {0}.c */\n+extern int {1}_probe(const struct targetdef *t);\n+extern const struct msrdef {2}_msrs[];\n".format(msrarray.name, msrarray.name, msrarray.name)
+	header_line_number = 0
+	
+	# paste this before "\t{ TARGET_EOT }" and after "static struct targetdef alltargets[] = {"
+	c_add_line = "+\t{" + "\"{0}\", \"{1}\", {2}_probe, {3}_msrs".format(msrarray.name, msrarray.description, msrarray.name, msrarray.name) + " },"
+	c_line_number = 0
+
+	# Search line numbers
+
+	fh = None
+	try:
+		
+		# Read header file
+
+		fh = open(msrtool_header_file, "r", encoding="utf8")
+		pattern = '#endif /* MSRTOOL_H */'
+		src = fh.read()
+		m = re.match(pattern, src)
+		if m is not None:
+			start = m.start()
+			header_line_number = src.count('\n', 0, start) - 1
+			print("Found chunk in {0} at line #{1}".format(msrtool_header_file, header_line_number))
+		else:
+			print("Not found anything useful in {0}".format(msrtool_header_file))
+
+	except (EnviromentError) as err:
+		print("{0}: header file reading error: {1}".format(os.path.basename(sys.argv[0]), err))
+		return False
+	finally:
+		if fh is not None:
+			fh.close()
+
+	fh = None
+	try:
+
+		# Read C file
+
+		fh = open(msrtool_c_file, "r", encoding="utf8")
+		pattern = '\t{ TARGET_EOT }'
+		src = fh.read()
+		m = re.match(pattern, src)
+		if m is not None:
+			start = m.start()
+			c_line_number = src.count('\n', 0, start)
+			print("Found chunk in {0} at line #{1}".format(msrtool_c_file, c_line_number))
+		else:
+			print("Not found anything useful in {0}".format(msrtool_c_file))
+
+	except (EnviromentError) as err:
+		print("{0}: c file reading error: {1}".format(os.path.basename(sys.argv[0]), err))
+		return False
+	finally:
+		if fh is not None:
+			fh.close()
+
+	fh = None
+	try:
+		
+		# Patch header file
+
+		fh = open(patch_name, "w", encoding="utf8")
+		fh.write("Index: {0}\n".format(msrtool_header_file))
+		fh.write("===================================================================\n")
+		fh.write("--- {0} (revision 0)\n".format(msrtool_header_file))
+		fh.write("+++ {0} (revision 0)\n".format(msrtool_header_file))
+		fh.write("@@ -23,10 +23,10 @@\n")
+
+		# fh.write("-CFLAGS  = @CFLAGS@\n") # We dont need this, really
+		fh.write("{0}\n".format(header_add_line))
+		
+		# Patch *.c file
+
+		fh.write("Index: {0}\n".format(msrtool_c_file))
+		fh.write("===================================================================\n")
+		fh.write("--- {0} (revision 0)\n".format(msrtool_c_file))
+		fh.write("+++ {0} (revision 0)\n".format(msrtool_c_file))
+		fh.write("@@ -23,10 +23,10 @@\n")
+		
+		# fh.write("-CFLAGS  = @CFLAGS@\n") # We dont need this, really
+		fh.write("{0}\n".format(c_add_line))
+
+		print("Patch \"{0}\" written successfully".format(patch_name))
+
+	except (EnviromentError) as err:
+		print("{0}: patch creating error: {1}".format(os.path.basename(sys.argv[0]), err))
+		return False
+	finally:
+		if fh is not None:
+			fh.close()
+	
+
+# Program body
+# We trying to find all files *.msr.xml
+# read them, produce files, produce patches
+def start(debug):
+	search_cmd = 'find data/msr/ -name "*.msr.xml" -print'
+	
+	for file in os.popen(search_cmd).readlines():     # run find command
+		num  = 1
+		name = file[:-1]
+
+		print("Generating msr from {0}...".format(name))
+		
+		parse_definitions(name)
+		if debug:
+			output_print()
+		output_file()
+		produce_patch()
+
Index: util/pygen/modules/abstract.py
===================================================================
--- util/pygen/modules/abstract.py	(revision 0)
+++ util/pygen/modules/abstract.py	(revision 0)
@@ -0,0 +1,160 @@ 
+#!/usr/bin/env python3
+
+""" This file is part of PyGen
+
+	Copyright (C) 2011 Anton Kochkov <anton.kochkov@gmail.com>
+	
+	This program is free software; you can redistribute it and/or modify
+	it under the terms of the GNU General Public License version 2 as
+	published by the Free Software Foundation.
+
+	This program is distributed in the hope that it will be useful,
+	but WITHOUT ANY WARRANTY; without even the implied warranty of
+	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+	GNU General Public License for more details.
+
+	You should have received a copy of the GNU General Public License
+	along with this program; if not, write to the Free Software
+	Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
+"""
+
+class bits:
+
+class register:
+
+	# Base methods
+	
+	def __init__(self, size = 8, address = 0, name = "", description = "", value = 0, default_value = 0):
+		self.uid = uid
+		self.size = size
+		self.address = address
+		self.name = name
+		self.description = description
+		self.value = value
+		self.default_value = default_value
+
+	def __eq__(self, other):
+		return (self.address == other.address) & (self.size == other.size)
+
+	def __str__(self):
+		return "0x{0} {1} {2} {3}".format(self.address, self.name, self.value, self.description)
+
+	# Properties:
+	
+	""" Unique ID - Read Only """
+
+	@property
+	def uid(self):
+		return self.uid
+
+	""" Register Size """
+
+	@property
+	def size(self):
+		return self.__size
+	
+	@size.setter
+	def size(self, size):
+		self.__size = size
+
+	""" Register Address """
+
+	@property
+	def address(self):
+		return self.__address
+
+	@address.setter
+	def address(self, address):
+		self.__address = address
+
+	""" Register Name """
+
+	@property
+	def name(self):
+		return self.__name
+
+	@name.setter
+	def name(self, name):
+		self.__name =  name
+
+	""" Register Description """
+
+	@property
+	def description(self):
+		return self.__description
+	
+	@description.setter
+	def description(self, description):
+		self.__description = description
+
+	""" Register Value """
+
+	@property
+	def value(self)
+		return self.__value
+
+	@value.setter
+	def value(self, value):
+		self.__value = value
+
+	""" Register Default Value """
+
+	@property
+	def default_value(self):
+		return self.__default_value
+
+	@default_value.setter
+	def default_value(self, default_value):
+		self.__default_value = value
+
+	
+class register_array:
+
+	# Base methods
+
+	def __init__(self, name = "", description = "", size = 0):
+		self.uid = uid
+		self.name = name
+		self.description = description
+		self.size = size
+
+	# Properties
+
+	""" Unique ID - Read Only """
+	
+	@property
+	def uid(self):
+		return self.uid
+
+	""" Register Array Name """
+
+	@property
+	def name(self):
+		return self.__name
+	
+	@name.setter
+	def name(self, name):
+		self.__name = name
+
+	""" Register Array Description """
+
+	@property
+	def description(self):
+		return self.__description
+
+	@description.setter
+	def description(self, description):
+		self.__description =  description
+
+	""" Register Array Size """
+
+	@property
+	def size(self):
+		return self.__size
+
+	@size.setter
+	def size(self, size):
+		self.__size = size
+
+
+
Index: util/pygen/data/msr/k8.msr.xml
===================================================================
--- util/pygen/data/msr/k8.msr.xml	(revision 0)
+++ util/pygen/data/msr/k8.msr.xml	(revision 0)
@@ -0,0 +1,285 @@ 
+<?xml version="1.0" encoding="UTF-8"?><msrarray name="k8" description="bla-bla">
+<cpu family="0x6" model="0x17" stepping="5" />
+<msr address="0xc0000080" type="rw" name="EFER Register" description="Extended Feature Enable Register">
+<bitfield start="63" size="32" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="31" size="18" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="14" size="1" name="FFXSR:" description="Fast FXSAVE/FRSTOR Enable" type="dec">
+<value number="0" description="FXSAVE/FRSTOR disabled" />
+<value number="1" description="FXSAVE/FRSTOR enabled" />
+</bitfield>
+<bitfield start="13" size="1" name="LMSLE:" description="Long Mode Segment Limit Enable" type="dec">
+<value number="0" description="Long mode segment limit check disabled" />
+<value number="1" description="Long mode segment limit check enabled" />
+</bitfield>
+<bitfield start="12" size="1" name="SVME:" description="SVM Enable" type="dec">
+<value number="0" description="SVM features disabled" />
+<value number="1" description="SVM features enabled" />
+</bitfield>
+<bitfield start="11" size="1" name="NXE:" description="No-Execute Page Enable" type="dec">
+<value number="0" description="NXE features disabled" />
+<value number="1" description="NXE features enabled" />
+</bitfield>
+<bitfield start="10" size="1" name="LMA:" description="Long Mode Active" type="dec">
+<value number="0" description="Long Mode feature not active" />
+<value number="1" description="Long Mode feature active" />
+</bitfield>
+<bitfield start="9" size="1" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="8" size="1" name="LME:" description="Long Mode Enable" type="dec">
+<value number="0" description="Long Mode feature disabled" />
+<value number="1" description="Long Mode feature enabled" />
+</bitfield>
+<bitfield start="7" size="7" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="0" size="1" name="SYSCALL:" description="System Call Extension Enable" type="dec">
+<value number="0" description="System Call feature disabled" />
+<value number="1" description="System Call feature enabled" />
+</bitfield>
+</msr>
+<msr address="0xc0010010" type="rw" name="SYSCFG Register" description="This register controls the system configuration">
+<bitfield start="63" size="32" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="31" size="9" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="22" size="1" name="Tom2ForceMemTypeWB:" description="Top of Memory 2 Memory Type Write Back" type="dec">
+<value number="0" description="Tom2ForceMemTypeWB disabled" />
+<value number="1" description="Tom2ForceMemTypeWB enabled" />
+</bitfield>
+<bitfield start="21" size="1" name="MtrrTom2En:" description="Top of Memory Address Register 2 Enable" type="dec">
+<value number="0" description="MtrrTom2En disabled" />
+<value number="1" description="MtrrTom2En enabled" />
+</bitfield>
+<bitfield start="20" size="1" name="MtrrVarDramEn:" description="Top of Memory Address Register and I/O Range Register Enable" type="dec">
+<value number="0" description="MtrrVarDramEn disabled" />
+<value number="1" description="MtrrVarDramEn enabled" />
+</bitfield>
+<bitfield start="19" size="1" name="MtrrFixDramModEn:" description="RdDram and WrDram Bits Modification Enable" type="dec">
+<value number="0" description="MtrrFixDramModEn disabled" />
+<value number="1" description="MtrrFixDramModEn enabled" />
+</bitfield>
+<bitfield start="18" size="1" name="MtrrFixDramEn:" description="Fixed RdDram and WrDram Attributes Enable" type="dec">
+<value number="0" description="MtrrFixDramEn disabled" />
+<value number="1" description="MtrrFixDramEn enabled" />
+</bitfield>
+<bitfield start="17" size="1" name="SysUcLockEn:" description="System Interface Lock Command Enable" type="dec">
+<value number="0" description="SysUcLockEn disabled" />
+<value number="1" description="SysUcLockEn enabled" />
+</bitfield>
+<bitfield start="16" size="1" name="ChxToDirtyDis:" description="Change to Dirty Command Disable" type="dec">
+<value number="0" description="ChxToDirtyDis disabled" />
+<value number="1" description="ChxToDirtyDis enabled" />
+</bitfield>
+<bitfield start="15" size="5" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="10" size="1" name="SetDirtyEnO:" description="SharedToDirty Command for O->M State Transition Enable" type="dec">
+<value number="0" description="SetDirtyEnO disabled" />
+<value number="1" description="SetDirtyEnO enabled" />
+</bitfield>
+<bitfield start="9" size="1" name="SetDirtyEnS:" description="SharedToDirty Command for S->M State Transition Enable" type="dec">
+<value number="0" description="SetDirtyEnS disabled" />
+<value number="1" description="SetDirtyEnS enabled" />
+</bitfield>
+<bitfield start="8" size="1" name="SetDirtyEnE:" description="CleanToDirty Command for E->M State Transition Enable" type="dec">
+<value number="0" description="SetDirtyEnE disabled" />
+<value number="1" description="SetDirtyEnE enabled" />
+</bitfield>
+<bitfield start="7" size="3" name="SysVicLimit:" description="Outstanding Victim Bus Command Limit" type="hex">
+</bitfield>
+<bitfield start="4" size="5" name="SysAckLimit:" description="Outstanding Bus Command Limit" type="hex">
+</bitfield>
+</msr>
+<msr address="0xc0010015" type="rw" name="HWCR Register" description="This register controls the hardware configuration">
+<bitfield start="63" size="32" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="31" size="2" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="29" size="6" name="START_FID:" description="Status of the startup FID" type="hex">
+</bitfield>
+<bitfield start="23" size="5" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="18" size="1" name="MCi_STATUS_WREN:" description="MCi Status Write Enable" type="dec">
+<value number="0" description="MCi_STATUS_WREN disabled" />
+<value number="1" description="MCi_STATUS_WREN enabled" />
+</bitfield>
+<bitfield start="17" size="1" name="WRAP32DIS:" description="32-bit Address Wrap Disable" type="dec">
+<value number="0" description="WRAP32DIS clear" />
+<value number="1" description="WRAP32DIS set" />
+</bitfield>
+<bitfield start="16" size="1" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="15" size="1" name="SSEDIS:" description="SSE Instructions Disable" type="dec">
+<value number="0" description="SSEDIS clear" />
+<value number="1" description="SSEDIS set" />
+</bitfield>
+<bitfield start="14" size="1" name="RSMSPCYCDIS:" description="Special Bus Cycle On RSM Disable" type="dec">
+<value number="0" description="RSMSPCYCDIS clear" />
+<value number="1" description="RSMSPCYCDIS set" />
+</bitfield>
+<bitfield start="13" size="1" name="SMISPCYCDIS:" description="Special Bus Cycle On SMI Disable" type="dec">
+<value number="0" description="SMISPCYCDIS clear" />
+<value number="1" description="SMISPCYCDIS set" />
+</bitfield>
+<bitfield start="12" size="1" name="HLTXSPCYCEN:" description="Enable Special Bus Cycle On Exit From HLT" type="dec">
+<value number="0" description="HLTXSPCYCEN disabled" />
+<value number="1" description="HLTXSPCYCEN enabled" />
+</bitfield>
+<bitfield start="11" size="4" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="8" size="1" name="IGNNE_EM:" description="IGNNE Port Emulation Enable" type="dec">
+<value number="0" description="IGNNE_EM disabled" />
+<value number="1" description="IGNNE_EM enabled" />
+</bitfield>
+<bitfield start="7" size="1" name="DISLOCK:" description="Disable x86 LOCK prefix functionality" type="dec">
+<value number="0" description="DISLOCK clear" />
+<value number="1" description="DISLOCK set" />
+</bitfield>
+<bitfield start="6" size="1" name="FFDIS:" description="TLB Flush Filter Disable" type="dec">
+<value number="0" description="FFDIS clear" />
+<value number="1" description="FFDIS set" />
+</bitfield>
+<bitfield start="5" size="1" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="4" size="1" name="INVD_WBINVD:" description="INVD to WBINVD Conversion" type="dec">
+<value number="0" description="INVD_WBINVD disabled" />
+<value number="1" description="INVD_WBINVD enabled" />
+</bitfield>
+<bitfield start="3" size="1" name="TLBCACHEDIS:" description="TLB Cacheable Memory Disable" type="dec">
+<value number="0" description="TLBCACHEDIS clear" />
+<value number="1" description="TLBCACHEDIS set" />
+</bitfield>
+<bitfield start="2" size="1" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="1" size="1" name="SLOWFENCE:" description="Slow SFENCE Enable" type="dec">
+<value number="0" description="SLOWFENCE disabled" />
+<value number="1" description="SLOWFENCE enabled" />
+</bitfield>
+<bitfield start="0" size="1" name="SMMLOCK:" description="SMM Configuration Lock" type="dec">
+<value number="0" description="SMMLOCK disabled" />
+<value number="1" description="SMMLOCK enabled" />
+</bitfield>
+</msr>
+<msr address="0xc001001f" type="rw" name="NB_CFG Register" description="">
+<bitfield start="63" size="9" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="54" size="1" name="InitApicIdCpuIdLo:" description="CpuId and NodeId[2:0] bit field positions are swapped in the APICID" type="dec">
+<value number="0" description="CpuId and NodeId not swapped" />
+<value number="1" description="CpuId and NodeId swapped" />
+</bitfield>
+<bitfield start="53" size="8" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="45" size="1" name="DisUsSysMgtRqToNLdt:" description="Disable Upstream System Management Rebroadcast" type="dec">
+<value number="0" description="Upstream Rebroadcast disabled" />
+<value number="1" description="Upstream Rebroadcast enabled" />
+</bitfield>
+<bitfield start="44" size="1" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="43" size="1" name="DisThmlPfMonSmiInt:" description="Disable Performance Monitor SMI" type="dec">
+<value number="0" description="Performance Monitor SMI enabled" />
+<value number="1" description="Performance Monitor SMI disabled" />
+</bitfield>
+<bitfield start="42" size="6" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="36" size="1" name="DisDatMsk:" description="Disables DRAM data masking function" type="dec">
+<value number="0" description="DRAM data masking enabled" />
+<value number="1" description="DRAM data masking disabled" />
+</bitfield>
+<bitfield start="35" size="4" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="31" size="1" name="DisCohLdtCfg:" description="Disable Coherent HyperTransport Configuration Accesses" type="dec">
+<value number="0" description="Coherent HyperTransport Configuration enabled" />
+<value number="1" description="Coherent HyperTransport Configuration disabled" />
+</bitfield>
+<bitfield start="30" size="21" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="9" size="1" name="DisRefUseFreeBuf:" description="Disable Display Refresh from Using Free List Buffers" type="dec">
+<value number="0" description="Display refresh requests enabled" />
+<value number="1" description="Display refresh requests disabled" />
+</bitfield>
+</msr>
+<msr address="0xc001001a" type="rw" name="TOP_MEM Register" description="This register indicates the first byte of I/O above DRAM">
+<bitfield start="63" size="24" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="39" size="8" name="TOM 39-32" description="" type="hex">
+</bitfield>
+<bitfield start="31" size="9" name="TOM 31-23" description="" type="hex">
+</bitfield>
+<bitfield start="22" size="23" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+</msr>
+<msr address="0xc001001d" type="rw" name="TOP_MEM2 Register" description="This register indicates the Top of Memory above 4GB">
+<bitfield start="63" size="24" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="39" size="8" name="TOM2 39-32" description="" type="hex">
+</bitfield>
+<bitfield start="31" size="9" name="TOM2 31-23" description="" type="hex">
+</bitfield>
+<bitfield start="22" size="23" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+</msr>
+<msr address="0xc0010016" type="rw" name="IORRBase0" description="This register holds the base of the variable I/O range">
+<bitfield start="63" size="24" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="39" size="8" name="BASE 27-20" description="" type="hex">
+</bitfield>
+<bitfield start="31" size="20" name="BASE 20-0" description="" type="hex">
+</bitfield>
+<bitfield start="11" size="6" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="5" size="1" name="RdDram:" description="Read from DRAM" type="dec">
+<value number="0" description="RdDram disabled" />
+<value number="1" description="RdDram enabled" />
+</bitfield>
+<bitfield start="4" size="1" name="WrDram:" description="Write to DRAM" type="dec">
+<value number="0" description="WrDram disabled" />
+<value number="1" description="WrDram enabled" />
+</bitfield>
+</msr>
+<msr address="0xc0010017" type="rw" name="IORRMask0" description="This register holds the mask of the variable I/O range">
+<bitfield start="63" size="24" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="39" size="8" name="MASK 27-20" description="" type="hex">
+</bitfield>
+<bitfield start="31" size="20" name="MASK 20-0" description="" type="hex">
+</bitfield>
+<bitfield start="11" size="1" name="V:" description="Enables variable I/O range registers" type="dec">
+<value number="0" description="V I/O range disabled" />
+<value number="1" description="V I/O range enabled" />
+</bitfield>
+<bitfield start="10" size="11" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+</msr>
+<msr address="0xc0010018" type="rw" name="IORRBase1" description="This register holds the base of the variable I/O range">
+<bitfield start="63" size="24" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="39" size="8" name="BASE 27-20" description="" type="hex">
+</bitfield>
+<bitfield start="31" size="20" name="BASE 20-0" description="" type="hex">
+</bitfield>
+<bitfield start="11" size="6" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="5" size="1" name="RdDram:" description="Read from DRAM" type="dec">
+<value number="0" description="RdDram disabled" />
+<value number="1" description="RdDram enabled" />
+</bitfield>
+<bitfield start="4" size="1" name="WrDram:" description="Write to DRAM" type="dec">
+<value number="0" description="WrDram disabled" />
+<value number="1" description="WrDram enabled" />
+</bitfield>
+</msr>
+<msr address="0xc0010019" type="rw" name="IORRMask1" description="This register holds the mask of the variable I/O range">
+<bitfield start="63" size="24" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="39" size="8" name="MASK 27-20" description="" type="hex">
+</bitfield>
+<bitfield start="31" size="20" name="MASK 20-0" description="" type="hex">
+</bitfield>
+<bitfield start="11" size="1" name="V:" description="Enables variable I/O range registers" type="dec">
+<value number="0" description="V I/O range disabled" />
+<value number="1" description="V I/O range enabled" />
+</bitfield>
+<bitfield start="10" size="11" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+</msr>
+</msrarray>
Index: util/pygen/data/msr/geodegx2.msr.xml
===================================================================
--- util/pygen/data/msr/geodegx2.msr.xml	(revision 0)
+++ util/pygen/data/msr/geodegx2.msr.xml	(revision 0)
@@ -0,0 +1,1491 @@ 
+<?xml version="1.0" encoding="UTF-8"?><msrarray name="geodegx2" description="is it very different from geodelx?">
+<cpu family="0x6" model="0x17" stepping="5" />
+<msr address="0x10000020" type="rw" name="GLIU0_P2D_BM0" description="GLIU0 P2D Base Mask Descriptor 0">
+<bitfield start="63" size="3" name="PDID1" description="Descriptor Destination ID" type="bin">
+<value number="0" description="Port 0 = GLIU0:GLIU GLIU1:GLIU" />
+<value number="1" description="Port 1 = GLIU0:GLMC GLIU1:Interface to GLIU0" />
+<value number="2" description="Port 2 = GLIU0:Interface to GLIU1 GLIU1:Not Used" />
+<value number="3" description="Port 3 = GLIU0:CPU Core GLIU1:GLCP" />
+<value number="4" description="Port 4 = GLIU0:DC GLIU1:GLPCI" />
+<value number="5" description="Port 5 = GLIU0:GP GLIU1:GIO" />
+<value number="6" description="Port 6 = GLIU0:VP GLIU1:Not Used" />
+<value number="7" description="Port 7 = GLIU0:Not Used GLIU1:Not Used" />
+</bitfield>
+<bitfield start="36" size="1" name="PCMP_BIZ" description="Compare Bizarro Flag" type="bin">
+<value number="0" description="Only act if Bizarro Flag = 0 (Memory or I/O)" />
+<value number="1" description="Only act if Bizarro Flag = 1 (PCI, Shutdown or Halt)" />
+</bitfield>
+<bitfield start="59" size="20" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="39" size="20" name="PBASE" description="Physical Memory Address Base" type="hex">
+</bitfield>
+<bitfield start="19" size="20" name="PMASK" description="Physical Memory Address Mask" type="hex">
+</bitfield>
+</msr>
+<msr address="0x10000021" type="rw" name="GLIU0_P2D_BM1" description="GLIU0 P2D Base Mask Descriptor 1">
+<bitfield start="63" size="3" name="PDID1" description="Descriptor Destination ID" type="bin">
+<value number="0" description="Port 0 = GLIU0:GLIU GLIU1:GLIU" />
+<value number="1" description="Port 1 = GLIU0:GLMC GLIU1:Interface to GLIU0" />
+<value number="2" description="Port 2 = GLIU0:Interface to GLIU1 GLIU1:Not Used" />
+<value number="3" description="Port 3 = GLIU0:CPU Core GLIU1:GLCP" />
+<value number="4" description="Port 4 = GLIU0:DC GLIU1:GLPCI" />
+<value number="5" description="Port 5 = GLIU0:GP GLIU1:GIO" />
+<value number="6" description="Port 6 = GLIU0:VP GLIU1:Not Used" />
+<value number="7" description="Port 7 = GLIU0:Not Used GLIU1:Not Used" />
+</bitfield>
+<bitfield start="36" size="1" name="PCMP_BIZ" description="Compare Bizarro Flag" type="bin">
+<value number="0" description="Only act if Bizarro Flag = 0 (Memory or I/O)" />
+<value number="1" description="Only act if Bizarro Flag = 1 (PCI, Shutdown or Halt)" />
+</bitfield>
+<bitfield start="59" size="20" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="39" size="20" name="PBASE" description="Physical Memory Address Base" type="hex">
+</bitfield>
+<bitfield start="19" size="20" name="PMASK" description="Physical Memory Address Mask" type="hex">
+</bitfield>
+</msr>
+<msr address="0x10000022" type="rw" name="GLIU0_P2D_BM2" description="GLIU0 P2D Base Mask Descriptor 2">
+<bitfield start="63" size="3" name="PDID1" description="Descriptor Destination ID" type="bin">
+<value number="0" description="Port 0 = GLIU0:GLIU GLIU1:GLIU" />
+<value number="1" description="Port 1 = GLIU0:GLMC GLIU1:Interface to GLIU0" />
+<value number="2" description="Port 2 = GLIU0:Interface to GLIU1 GLIU1:Not Used" />
+<value number="3" description="Port 3 = GLIU0:CPU Core GLIU1:GLCP" />
+<value number="4" description="Port 4 = GLIU0:DC GLIU1:GLPCI" />
+<value number="5" description="Port 5 = GLIU0:GP GLIU1:GIO" />
+<value number="6" description="Port 6 = GLIU0:VP GLIU1:Not Used" />
+<value number="7" description="Port 7 = GLIU0:Not Used GLIU1:Not Used" />
+</bitfield>
+<bitfield start="36" size="1" name="PCMP_BIZ" description="Compare Bizarro Flag" type="bin">
+<value number="0" description="Only act if Bizarro Flag = 0 (Memory or I/O)" />
+<value number="1" description="Only act if Bizarro Flag = 1 (PCI, Shutdown or Halt)" />
+</bitfield>
+<bitfield start="59" size="20" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="39" size="20" name="PBASE" description="Physical Memory Address Base" type="hex">
+</bitfield>
+<bitfield start="19" size="20" name="PMASK" description="Physical Memory Address Mask" type="hex">
+</bitfield>
+</msr>
+<msr address="0x10000023" type="rw" name="GLIU0_P2D_BM3" description="GLIU0 P2D Base Mask Descriptor 3">
+<bitfield start="63" size="3" name="PDID1" description="Descriptor Destination ID" type="bin">
+<value number="0" description="Port 0 = GLIU0:GLIU GLIU1:GLIU" />
+<value number="1" description="Port 1 = GLIU0:GLMC GLIU1:Interface to GLIU0" />
+<value number="2" description="Port 2 = GLIU0:Interface to GLIU1 GLIU1:Not Used" />
+<value number="3" description="Port 3 = GLIU0:CPU Core GLIU1:GLCP" />
+<value number="4" description="Port 4 = GLIU0:DC GLIU1:GLPCI" />
+<value number="5" description="Port 5 = GLIU0:GP GLIU1:GIO" />
+<value number="6" description="Port 6 = GLIU0:VP GLIU1:Not Used" />
+<value number="7" description="Port 7 = GLIU0:Not Used GLIU1:Not Used" />
+</bitfield>
+<bitfield start="36" size="1" name="PCMP_BIZ" description="Compare Bizarro Flag" type="bin">
+<value number="0" description="Only act if Bizarro Flag = 0 (Memory or I/O)" />
+<value number="1" description="Only act if Bizarro Flag = 1 (PCI, Shutdown or Halt)" />
+</bitfield>
+<bitfield start="59" size="20" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="39" size="20" name="PBASE" description="Physical Memory Address Base" type="hex">
+</bitfield>
+<bitfield start="19" size="20" name="PMASK" description="Physical Memory Address Mask" type="hex">
+</bitfield>
+</msr>
+<msr address="0x10000024" type="rw" name="GLIU0_P2D_BM4" description="GLIU0 P2D Base Mask Descriptor 4">
+<bitfield start="63" size="3" name="PDID1" description="Descriptor Destination ID" type="bin">
+<value number="0" description="Port 0 = GLIU0:GLIU GLIU1:GLIU" />
+<value number="1" description="Port 1 = GLIU0:GLMC GLIU1:Interface to GLIU0" />
+<value number="2" description="Port 2 = GLIU0:Interface to GLIU1 GLIU1:Not Used" />
+<value number="3" description="Port 3 = GLIU0:CPU Core GLIU1:GLCP" />
+<value number="4" description="Port 4 = GLIU0:DC GLIU1:GLPCI" />
+<value number="5" description="Port 5 = GLIU0:GP GLIU1:GIO" />
+<value number="6" description="Port 6 = GLIU0:VP GLIU1:Not Used" />
+<value number="7" description="Port 7 = GLIU0:Not Used GLIU1:Not Used" />
+</bitfield>
+<bitfield start="36" size="1" name="PCMP_BIZ" description="Compare Bizarro Flag" type="bin">
+<value number="0" description="Only act if Bizarro Flag = 0 (Memory or I/O)" />
+<value number="1" description="Only act if Bizarro Flag = 1 (PCI, Shutdown or Halt)" />
+</bitfield>
+<bitfield start="59" size="20" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="39" size="20" name="PBASE" description="Physical Memory Address Base" type="hex">
+</bitfield>
+<bitfield start="19" size="20" name="PMASK" description="Physical Memory Address Mask" type="hex">
+</bitfield>
+</msr>
+<msr address="0x10000025" type="rw" name="GLIU0_P2D_BM5" description="GLIU0 P2D Base Mask Descriptor 5">
+<bitfield start="63" size="3" name="PDID1" description="Descriptor Destination ID" type="bin">
+<value number="0" description="Port 0 = GLIU0:GLIU GLIU1:GLIU" />
+<value number="1" description="Port 1 = GLIU0:GLMC GLIU1:Interface to GLIU0" />
+<value number="2" description="Port 2 = GLIU0:Interface to GLIU1 GLIU1:Not Used" />
+<value number="3" description="Port 3 = GLIU0:CPU Core GLIU1:GLCP" />
+<value number="4" description="Port 4 = GLIU0:DC GLIU1:GLPCI" />
+<value number="5" description="Port 5 = GLIU0:GP GLIU1:GIO" />
+<value number="6" description="Port 6 = GLIU0:VP GLIU1:Not Used" />
+<value number="7" description="Port 7 = GLIU0:Not Used GLIU1:Not Used" />
+</bitfield>
+<bitfield start="36" size="1" name="PCMP_BIZ" description="Compare Bizarro Flag" type="bin">
+<value number="0" description="Only act if Bizarro Flag = 0 (Memory or I/O)" />
+<value number="1" description="Only act if Bizarro Flag = 1 (PCI, Shutdown or Halt)" />
+</bitfield>
+<bitfield start="59" size="20" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="39" size="20" name="PBASE" description="Physical Memory Address Base" type="hex">
+</bitfield>
+<bitfield start="19" size="20" name="PMASK" description="Physical Memory Address Mask" type="hex">
+</bitfield>
+</msr>
+<msr address="0x10000026" type="rw" name="GLIU0_P2D_BMO0" description="GLIU0 P2D Base Mask Offset Descriptor 0">
+<bitfield start="63" size="3" name="PDID1" description="Descriptor Destination ID" type="bin">
+<value number="0" description="Port 0 = GLIU0:GLIU GLIU1:GLIU" />
+<value number="1" description="Port 1 = GLIU0:GLMC GLIU1:Interface to GLIU0" />
+<value number="2" description="Port 2 = GLIU0:Interface to GLIU1 GLIU1:Not Used" />
+<value number="3" description="Port 3 = GLIU0:CPU Core GLIU1:GLCP" />
+<value number="4" description="Port 4 = GLIU0:DC GLIU1:GLPCI" />
+<value number="5" description="Port 5 = GLIU0:GP GLIU1:GIO" />
+<value number="6" description="Port 6 = GLIU0:VP GLIU1:Not Used" />
+<value number="7" description="Port 7 = GLIU0:Not Used GLIU1:Not Used" />
+</bitfield>
+<bitfield start="36" size="1" name="PCMP_BIZ" description="Compare Bizarro Flag" type="bin">
+<value number="0" description="Only act if Bizarro Flag = 0 (Memory or I/O)" />
+<value number="1" description="Only act if Bizarro Flag = 1 (PCI, Shutdown or Halt)" />
+</bitfield>
+<bitfield start="59" size="20" name="POFFSET" description="Physical Memory Address 2s Comp Offset" type="hex">
+</bitfield>
+<bitfield start="39" size="20" name="PBASE" description="Physical Memory Address Base" type="hex">
+</bitfield>
+<bitfield start="19" size="20" name="PMASK" description="Physical Memory Address Mask" type="hex">
+</bitfield>
+</msr>
+<msr address="0x10000027" type="rw" name="GLIU0_P2D_BMO1" description="GLIU0 P2D Base Mask Offset Descriptor 1">
+<bitfield start="63" size="3" name="PDID1" description="Descriptor Destination ID" type="bin">
+<value number="0" description="Port 0 = GLIU0:GLIU GLIU1:GLIU" />
+<value number="1" description="Port 1 = GLIU0:GLMC GLIU1:Interface to GLIU0" />
+<value number="2" description="Port 2 = GLIU0:Interface to GLIU1 GLIU1:Not Used" />
+<value number="3" description="Port 3 = GLIU0:CPU Core GLIU1:GLCP" />
+<value number="4" description="Port 4 = GLIU0:DC GLIU1:GLPCI" />
+<value number="5" description="Port 5 = GLIU0:GP GLIU1:GIO" />
+<value number="6" description="Port 6 = GLIU0:VP GLIU1:Not Used" />
+<value number="7" description="Port 7 = GLIU0:Not Used GLIU1:Not Used" />
+</bitfield>
+<bitfield start="36" size="1" name="PCMP_BIZ" description="Compare Bizarro Flag" type="bin">
+<value number="0" description="Only act if Bizarro Flag = 0 (Memory or I/O)" />
+<value number="1" description="Only act if Bizarro Flag = 1 (PCI, Shutdown or Halt)" />
+</bitfield>
+<bitfield start="59" size="20" name="POFFSET" description="Physical Memory Address 2s Comp Offset" type="hex">
+</bitfield>
+<bitfield start="39" size="20" name="PBASE" description="Physical Memory Address Base" type="hex">
+</bitfield>
+<bitfield start="19" size="20" name="PMASK" description="Physical Memory Address Mask" type="hex">
+</bitfield>
+</msr>
+<msr address="0x10000028" type="rw" name="GLIU0_P2D_R0" description="GLIU0 P2D Range Descriptor 0">
+<bitfield start="63" size="3" name="PDID1" description="Descriptor Destination ID" type="bin">
+<value number="0" description="Port 0 = GLIU0:GLIU GLIU1:GLIU" />
+<value number="1" description="Port 1 = GLIU0:GLMC GLIU1:Interface to GLIU0" />
+<value number="2" description="Port 2 = GLIU0:Interface to GLIU1 GLIU1:Not Used" />
+<value number="3" description="Port 3 = GLIU0:CPU Core GLIU1:GLCP" />
+<value number="4" description="Port 4 = GLIU0:DC GLIU1:GLPCI" />
+<value number="5" description="Port 5 = GLIU0:GP GLIU1:GIO" />
+<value number="6" description="Port 6 = GLIU0:VP GLIU1:Not Used" />
+<value number="7" description="Port 7 = GLIU0:Not Used GLIU1:Not Used" />
+</bitfield>
+<bitfield start="36" size="1" name="PCMP_BIZ" description="Compare Bizarro Flag" type="bin">
+<value number="0" description="Only act if Bizarro Flag = 0 (Memory or I/O)" />
+<value number="1" description="Only act if Bizarro Flag = 1 (PCI, Shutdown or Halt)" />
+</bitfield>
+<bitfield start="59" size="20" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="39" size="20" name="PMAX" description="Physical Memory Address Max." type="hex">
+</bitfield>
+<bitfield start="19" size="20" name="PMIN" description="Physical Memory Address Min." type="hex">
+</bitfield>
+</msr>
+<msr address="0x10000029" type="rw" name="GLIU0_P2D_RO0" description="GLIU0 P2D Range Offset Descriptor 0">
+<bitfield start="63" size="3" name="PDID1" description="Descriptor Destination ID" type="bin">
+<value number="0" description="Port 0 = GLIU0:GLIU GLIU1:GLIU" />
+<value number="1" description="Port 1 = GLIU0:GLMC GLIU1:Interface to GLIU0" />
+<value number="2" description="Port 2 = GLIU0:Interface to GLIU1 GLIU1:Not Used" />
+<value number="3" description="Port 3 = GLIU0:CPU Core GLIU1:GLCP" />
+<value number="4" description="Port 4 = GLIU0:DC GLIU1:GLPCI" />
+<value number="5" description="Port 5 = GLIU0:GP GLIU1:GIO" />
+<value number="6" description="Port 6 = GLIU0:VP GLIU1:Not Used" />
+<value number="7" description="Port 7 = GLIU0:Not Used GLIU1:Not Used" />
+</bitfield>
+<bitfield start="36" size="1" name="PCMP_BIZ" description="Compare Bizarro Flag" type="bin">
+<value number="0" description="Only act if Bizarro Flag = 0 (Memory or I/O)" />
+<value number="1" description="Only act if Bizarro Flag = 1 (PCI, Shutdown or Halt)" />
+</bitfield>
+<bitfield start="59" size="20" name="POFFSET" description="Physical Memory Address 2s Comp Offset" type="hex">
+</bitfield>
+<bitfield start="39" size="20" name="PMAX" description="Physical Memory Address Max." type="hex">
+</bitfield>
+<bitfield start="19" size="20" name="PMIN" description="Physical Memory Address Min." type="hex">
+</bitfield>
+</msr>
+<msr address="0x1000002a" type="rw" name="GLIU0_P2D_RO1" description="GLIU0 P2D Range Offset Descriptor 1">
+<bitfield start="63" size="3" name="PDID1" description="Descriptor Destination ID" type="bin">
+<value number="0" description="Port 0 = GLIU0:GLIU GLIU1:GLIU" />
+<value number="1" description="Port 1 = GLIU0:GLMC GLIU1:Interface to GLIU0" />
+<value number="2" description="Port 2 = GLIU0:Interface to GLIU1 GLIU1:Not Used" />
+<value number="3" description="Port 3 = GLIU0:CPU Core GLIU1:GLCP" />
+<value number="4" description="Port 4 = GLIU0:DC GLIU1:GLPCI" />
+<value number="5" description="Port 5 = GLIU0:GP GLIU1:GIO" />
+<value number="6" description="Port 6 = GLIU0:VP GLIU1:Not Used" />
+<value number="7" description="Port 7 = GLIU0:Not Used GLIU1:Not Used" />
+</bitfield>
+<bitfield start="36" size="1" name="PCMP_BIZ" description="Compare Bizarro Flag" type="bin">
+<value number="0" description="Only act if Bizarro Flag = 0 (Memory or I/O)" />
+<value number="1" description="Only act if Bizarro Flag = 1 (PCI, Shutdown or Halt)" />
+</bitfield>
+<bitfield start="59" size="20" name="POFFSET" description="Physical Memory Address 2s Comp Offset" type="hex">
+</bitfield>
+<bitfield start="39" size="20" name="PMAX" description="Physical Memory Address Max." type="hex">
+</bitfield>
+<bitfield start="19" size="20" name="PMIN" description="Physical Memory Address Min." type="hex">
+</bitfield>
+</msr>
+<msr address="0x1000002b" type="rw" name="GLIU0_P2D_RO2" description="GLIU0 P2D Range Offset Descriptor 2">
+<bitfield start="63" size="3" name="PDID1" description="Descriptor Destination ID" type="bin">
+<value number="0" description="Port 0 = GLIU0:GLIU GLIU1:GLIU" />
+<value number="1" description="Port 1 = GLIU0:GLMC GLIU1:Interface to GLIU0" />
+<value number="2" description="Port 2 = GLIU0:Interface to GLIU1 GLIU1:Not Used" />
+<value number="3" description="Port 3 = GLIU0:CPU Core GLIU1:GLCP" />
+<value number="4" description="Port 4 = GLIU0:DC GLIU1:GLPCI" />
+<value number="5" description="Port 5 = GLIU0:GP GLIU1:GIO" />
+<value number="6" description="Port 6 = GLIU0:VP GLIU1:Not Used" />
+<value number="7" description="Port 7 = GLIU0:Not Used GLIU1:Not Used" />
+</bitfield>
+<bitfield start="36" size="1" name="PCMP_BIZ" description="Compare Bizarro Flag" type="bin">
+<value number="0" description="Only act if Bizarro Flag = 0 (Memory or I/O)" />
+<value number="1" description="Only act if Bizarro Flag = 1 (PCI, Shutdown or Halt)" />
+</bitfield>
+<bitfield start="59" size="20" name="POFFSET" description="Physical Memory Address 2s Comp Offset" type="hex">
+</bitfield>
+<bitfield start="39" size="20" name="PMAX" description="Physical Memory Address Max." type="hex">
+</bitfield>
+<bitfield start="19" size="20" name="PMIN" description="Physical Memory Address Min." type="hex">
+</bitfield>
+</msr>
+<msr address="0x1000002c" type="rw" name="GLIU0_P2D_SC0" description="GLIU0 P2D Swiss Cheese Descriptor 0">
+<bitfield start="63" size="3" name="PDID1" description="Descriptor Destination ID" type="bin">
+<value number="0" description="Port 0 = GLIU0:GLIU GLIU1:GLIU" />
+<value number="1" description="Port 1 = GLIU0:GLMC GLIU1:Interface to GLIU0" />
+<value number="2" description="Port 2 = GLIU0:Interface to GLIU1 GLIU1:Not Used" />
+<value number="3" description="Port 3 = GLIU0:CPU Core GLIU1:GLCP" />
+<value number="4" description="Port 4 = GLIU0:DC GLIU1:GLPCI" />
+<value number="5" description="Port 5 = GLIU0:GP GLIU1:GIO" />
+<value number="6" description="Port 6 = GLIU0:VP GLIU1:Not Used" />
+<value number="7" description="Port 7 = GLIU0:Not Used GLIU1:Not Used" />
+</bitfield>
+<bitfield start="36" size="1" name="PCMP_BIZ" description="Compare Bizarro Flag" type="bin">
+<value number="0" description="Only act if Bizarro Flag = 0 (Memory or I/O)" />
+<value number="1" description="Only act if Bizarro Flag = 1 (PCI, Shutdown or Halt)" />
+</bitfield>
+<bitfield start="59" size="12" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="47" size="16" name="WEN" description="Enable hits to the base for the ith 16K page for writes" type="hex">
+</bitfield>
+<bitfield start="31" size="16" name="REN" description="Enable hits to the base for the ith 16K page for " type="hex">
+</bitfield>
+<bitfield start="15" size="2" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="13" size="14" name="PSCBASE" description="Physical Memory Address Base for hit" type="hex">
+</bitfield>
+</msr>
+<msr address="0x100000e0" type="rw" name="GLIU0_IOD_BM0" description="GLIU0 IOD Base Mask Descriptor 0">
+<bitfield start="63" size="3" name="IDID" description="IO Descriptor Destination ID" type="bin">
+<value number="0" description="Port 0 = GLIU0:GLIU GLIU1:GLIU" />
+<value number="1" description="Port 1 = GLIU0:GLMC GLIU1:Interface to GLIU0" />
+<value number="2" description="Port 2 = GLIU0:Interface to GLIU1 GLIU1:Not Used" />
+<value number="3" description="Port 3 = GLIU0:CPU Core GLIU1:GLCP" />
+<value number="4" description="Port 4 = GLIU0:DC GLIU1:GLPCI" />
+<value number="5" description="Port 5 = GLIU0:GP GLIU1:GIO" />
+<value number="6" description="Port 6 = GLIU0:VP GLIU1:Not Used" />
+<value number="7" description="Port 7 = GLIU0:Not Used GLIU1:Not Used" />
+</bitfield>
+<bitfield start="36" size="1" name="PCMP_BIZ" description="Compare Bizarro Flag" type="bin">
+<value number="0" description="Only act if Bizarro Flag = 0 (Memory or I/O)" />
+<value number="1" description="Only act if Bizarro Flag = 1 (PCI, Shutdown or Halt)" />
+</bitfield>
+<bitfield start="59" size="20" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="39" size="20" name="IBASE" description="Physical IO Address Base" type="hex">
+</bitfield>
+<bitfield start="19" size="20" name="IMASK" description="Physical IO Address Mask" type="hex">
+</bitfield>
+</msr>
+<msr address="0x100000e1" type="rw" name="GLIU0_IOD_BM1" description="GLIU0 IOD Base Mask Descriptor 1">
+<bitfield start="63" size="3" name="IDID" description="IO Descriptor Destination ID" type="bin">
+<value number="0" description="Port 0 = GLIU0:GLIU GLIU1:GLIU" />
+<value number="1" description="Port 1 = GLIU0:GLMC GLIU1:Interface to GLIU0" />
+<value number="2" description="Port 2 = GLIU0:Interface to GLIU1 GLIU1:Not Used" />
+<value number="3" description="Port 3 = GLIU0:CPU Core GLIU1:GLCP" />
+<value number="4" description="Port 4 = GLIU0:DC GLIU1:GLPCI" />
+<value number="5" description="Port 5 = GLIU0:GP GLIU1:GIO" />
+<value number="6" description="Port 6 = GLIU0:VP GLIU1:Not Used" />
+<value number="7" description="Port 7 = GLIU0:Not Used GLIU1:Not Used" />
+</bitfield>
+<bitfield start="36" size="1" name="PCMP_BIZ" description="Compare Bizarro Flag" type="bin">
+<value number="0" description="Only act if Bizarro Flag = 0 (Memory or I/O)" />
+<value number="1" description="Only act if Bizarro Flag = 1 (PCI, Shutdown or Halt)" />
+</bitfield>
+<bitfield start="59" size="20" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="39" size="20" name="IBASE" description="Physical IO Address Base" type="hex">
+</bitfield>
+<bitfield start="19" size="20" name="IMASK" description="Physical IO Address Mask" type="hex">
+</bitfield>
+</msr>
+<msr address="0x100000e2" type="rw" name="GLIU0_IOD_BM2" description="GLIU0 IOD Base Mask Descriptor 2">
+<bitfield start="63" size="3" name="IDID" description="IO Descriptor Destination ID" type="bin">
+<value number="0" description="Port 0 = GLIU0:GLIU GLIU1:GLIU" />
+<value number="1" description="Port 1 = GLIU0:GLMC GLIU1:Interface to GLIU0" />
+<value number="2" description="Port 2 = GLIU0:Interface to GLIU1 GLIU1:Not Used" />
+<value number="3" description="Port 3 = GLIU0:CPU Core GLIU1:GLCP" />
+<value number="4" description="Port 4 = GLIU0:DC GLIU1:GLPCI" />
+<value number="5" description="Port 5 = GLIU0:GP GLIU1:GIO" />
+<value number="6" description="Port 6 = GLIU0:VP GLIU1:Not Used" />
+<value number="7" description="Port 7 = GLIU0:Not Used GLIU1:Not Used" />
+</bitfield>
+<bitfield start="36" size="1" name="PCMP_BIZ" description="Compare Bizarro Flag" type="bin">
+<value number="0" description="Only act if Bizarro Flag = 0 (Memory or I/O)" />
+<value number="1" description="Only act if Bizarro Flag = 1 (PCI, Shutdown or Halt)" />
+</bitfield>
+<bitfield start="59" size="20" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="39" size="20" name="IBASE" description="Physical IO Address Base" type="hex">
+</bitfield>
+<bitfield start="19" size="20" name="IMASK" description="Physical IO Address Mask" type="hex">
+</bitfield>
+</msr>
+<msr address="0x100000e3" type="rw" name="GLIU0_IOD_SC0" description="GLIU0 IOD Swiss Cheese Descriptor 0">
+<bitfield start="63" size="3" name="IDID1" description="Descriptor Destination ID 1" type="bin">
+</bitfield>
+<bitfield start="36" size="1" name="PCMP_BIZ" description="Compare Bizarro Flag" type="bin">
+<value number="0" description="Only act if Bizarro Flag = 0 (Memory or I/O)" />
+<value number="1" description="Only act if Bizarro Flag = 1 (PCI, Shutdown or Halt)" />
+</bitfield>
+<bitfield start="59" size="28" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="31" size="8" name="EN" description="Enable for hits to IDID1 or else SUBP" type="hex">
+</bitfield>
+<bitfield start="23" size="2" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="21" size="1" name="WEN" description="Descriptor hits  IDID1 on write request Types else SUBP" type="bin">
+</bitfield>
+<bitfield start="20" size="1" name="WEN" description="Descriptor hit  IDID1 on write request Types else SUBP" type="bin">
+</bitfield>
+<bitfield start="19" size="17" name="IBASE" description="IO Memory Base" type="hex">
+</bitfield>
+<bitfield start="2" size="3" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+</msr>
+<msr address="0x100000e4" type="rw" name="GLIU0_IOD_SC1" description="GLIU0 IOD Swiss Cheese Descriptor 1">
+<bitfield start="63" size="3" name="IDID1" description="Descriptor Destination ID 1" type="bin">
+</bitfield>
+<bitfield start="36" size="1" name="PCMP_BIZ" description="Compare Bizarro Flag" type="bin">
+<value number="0" description="Only act if Bizarro Flag = 0 (Memory or I/O)" />
+<value number="1" description="Only act if Bizarro Flag = 1 (PCI, Shutdown or Halt)" />
+</bitfield>
+<bitfield start="59" size="28" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="31" size="8" name="EN" description="Enable for hits to IDID1 or else SUBP" type="hex">
+</bitfield>
+<bitfield start="23" size="2" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="21" size="1" name="WEN" description="Descriptor hits  IDID1 on write request Types else SUBP" type="bin">
+</bitfield>
+<bitfield start="20" size="1" name="WEN" description="Descriptor hit  IDID1 on write request Types else SUBP" type="bin">
+</bitfield>
+<bitfield start="19" size="17" name="IBASE" description="IO Memory Base" type="hex">
+</bitfield>
+<bitfield start="2" size="3" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+</msr>
+<msr address="0x100000e5" type="rw" name="GLIU0_IOD_SC2" description="GLIU0 IOD Swiss Cheese Descriptor 2">
+<bitfield start="63" size="3" name="IDID1" description="Descriptor Destination ID 1" type="bin">
+</bitfield>
+<bitfield start="36" size="1" name="PCMP_BIZ" description="Compare Bizarro Flag" type="bin">
+<value number="0" description="Only act if Bizarro Flag = 0 (Memory or I/O)" />
+<value number="1" description="Only act if Bizarro Flag = 1 (PCI, Shutdown or Halt)" />
+</bitfield>
+<bitfield start="59" size="28" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="31" size="8" name="EN" description="Enable for hits to IDID1 or else SUBP" type="hex">
+</bitfield>
+<bitfield start="23" size="2" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="21" size="1" name="WEN" description="Descriptor hits  IDID1 on write request Types else SUBP" type="bin">
+</bitfield>
+<bitfield start="20" size="1" name="WEN" description="Descriptor hit  IDID1 on write request Types else SUBP" type="bin">
+</bitfield>
+<bitfield start="19" size="17" name="IBASE" description="IO Memory Base" type="hex">
+</bitfield>
+<bitfield start="2" size="3" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+</msr>
+<msr address="0x100000e6" type="rw" name="GLIU0_IOD_SC3" description="GLIU0 IOD Swiss Cheese Descriptor 3">
+<bitfield start="63" size="3" name="IDID1" description="Descriptor Destination ID 1" type="bin">
+</bitfield>
+<bitfield start="36" size="1" name="PCMP_BIZ" description="Compare Bizarro Flag" type="bin">
+<value number="0" description="Only act if Bizarro Flag = 0 (Memory or I/O)" />
+<value number="1" description="Only act if Bizarro Flag = 1 (PCI, Shutdown or Halt)" />
+</bitfield>
+<bitfield start="59" size="28" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="31" size="8" name="EN" description="Enable for hits to IDID1 or else SUBP" type="hex">
+</bitfield>
+<bitfield start="23" size="2" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="21" size="1" name="WEN" description="Descriptor hits  IDID1 on write request Types else SUBP" type="bin">
+</bitfield>
+<bitfield start="20" size="1" name="WEN" description="Descriptor hit  IDID1 on write request Types else SUBP" type="bin">
+</bitfield>
+<bitfield start="19" size="17" name="IBASE" description="IO Memory Base" type="hex">
+</bitfield>
+<bitfield start="2" size="3" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+</msr>
+<msr address="0x100000e7" type="rw" name="GLIU0_IOD_SC4" description="GLIU0 IOD Swiss Cheese Descriptor 4">
+<bitfield start="63" size="3" name="IDID1" description="Descriptor Destination ID 1" type="bin">
+</bitfield>
+<bitfield start="36" size="1" name="PCMP_BIZ" description="Compare Bizarro Flag" type="bin">
+<value number="0" description="Only act if Bizarro Flag = 0 (Memory or I/O)" />
+<value number="1" description="Only act if Bizarro Flag = 1 (PCI, Shutdown or Halt)" />
+</bitfield>
+<bitfield start="59" size="28" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="31" size="8" name="EN" description="Enable for hits to IDID1 or else SUBP" type="hex">
+</bitfield>
+<bitfield start="23" size="2" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="21" size="1" name="WEN" description="Descriptor hits  IDID1 on write request Types else SUBP" type="bin">
+</bitfield>
+<bitfield start="20" size="1" name="WEN" description="Descriptor hit  IDID1 on write request Types else SUBP" type="bin">
+</bitfield>
+<bitfield start="19" size="17" name="IBASE" description="IO Memory Base" type="hex">
+</bitfield>
+<bitfield start="2" size="3" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+</msr>
+<msr address="0x100000e8" type="rw" name="GLIU0_IOD_SC5" description="GLIU0 IOD Swiss Cheese Descriptor 5">
+<bitfield start="63" size="3" name="IDID1" description="Descriptor Destination ID 1" type="bin">
+</bitfield>
+<bitfield start="36" size="1" name="PCMP_BIZ" description="Compare Bizarro Flag" type="bin">
+<value number="0" description="Only act if Bizarro Flag = 0 (Memory or I/O)" />
+<value number="1" description="Only act if Bizarro Flag = 1 (PCI, Shutdown or Halt)" />
+</bitfield>
+<bitfield start="59" size="28" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="31" size="8" name="EN" description="Enable for hits to IDID1 or else SUBP" type="hex">
+</bitfield>
+<bitfield start="23" size="2" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="21" size="1" name="WEN" description="Descriptor hits  IDID1 on write request Types else SUBP" type="bin">
+</bitfield>
+<bitfield start="20" size="1" name="WEN" description="Descriptor hit  IDID1 on write request Types else SUBP" type="bin">
+</bitfield>
+<bitfield start="19" size="17" name="IBASE" description="IO Memory Base" type="hex">
+</bitfield>
+<bitfield start="2" size="3" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+</msr>
+<msr address="0x20000018" type="rw" name="MC_CF07_DATA" description="Refresh and SDRAM Program">
+<bitfield start="63" size="4" name="D1_SZ" description="DIMM1 Size" type="bin">
+<value number="0" description="Reserved" />
+<value number="1" description="8 MB" />
+<value number="2" description="16 MB" />
+<value number="3" description="32 MB" />
+<value number="4" description="64 MB" />
+<value number="5" description="128 MB" />
+<value number="6" description="256 MB" />
+<value number="7" description="512 MB" />
+<value number="8" description="Reserved" />
+<value number="9" description="Reserved" />
+<value number="10" description="Reserved" />
+<value number="11" description="Reserved" />
+<value number="12" description="Reserved" />
+<value number="13" description="Reserved" />
+<value number="14" description="Reserved" />
+<value number="15" description="Reserved" />
+</bitfield>
+<bitfield start="59" size="3" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="56" size="1" name="D1_MB" description="DIMM1 Module Banks" type="bin">
+<value number="0" description="1 Module bank" />
+<value number="1" description="2 Module banks" />
+</bitfield>
+<bitfield start="55" size="3" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="52" size="1" name="D1_CB" description="DIMM1 Component Banks" type="bin">
+<value number="0" description="2 Component banks" />
+<value number="1" description="4 Component banks" />
+</bitfield>
+<bitfield start="51" size="1" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="50" size="3" name="D1_PSZ" description="DIMM1 Page Size" type="bin">
+<value number="0" description="1 KB" />
+<value number="1" description="2 KB" />
+<value number="2" description="4 KB" />
+<value number="3" description="8 KB" />
+<value number="4" description="16 KB" />
+<value number="5" description="Reserved" />
+<value number="6" description="Reserved" />
+<value number="7" description="DIMM1 Not Installed" />
+</bitfield>
+<bitfield start="47" size="4" name="D0_SZ" description="DIMM0 Size" type="bin">
+<value number="0" description="Reserved" />
+<value number="1" description="8 MB" />
+<value number="2" description="16 MB" />
+<value number="3" description="32 MB" />
+<value number="4" description="64 MB" />
+<value number="5" description="128 MB" />
+<value number="6" description="256 MB" />
+<value number="7" description="512 MB" />
+<value number="8" description="Reserved" />
+<value number="9" description="Reserved" />
+<value number="10" description="Reserved" />
+<value number="11" description="Reserved" />
+<value number="12" description="Reserved" />
+<value number="13" description="Reserved" />
+<value number="14" description="Reserved" />
+<value number="15" description="Reserved" />
+</bitfield>
+<bitfield start="43" size="3" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="40" size="1" name="D0_MB" description="DIMM0 Module Banks" type="bin">
+<value number="0" description="1 Module bank" />
+<value number="1" description="2 Module banks" />
+</bitfield>
+<bitfield start="39" size="3" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="36" size="1" name="D0_CB" description="DIMM0 Component Banks" type="bin">
+<value number="0" description="2 Component banks" />
+<value number="1" description="4 Component banks" />
+</bitfield>
+<bitfield start="35" size="1" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="34" size="3" name="D0_PSZ" description="DIMM0 Page Size" type="bin">
+<value number="0" description="1 KB" />
+<value number="1" description="2 KB" />
+<value number="2" description="4 KB" />
+<value number="3" description="8 KB" />
+<value number="4" description="16 KB" />
+<value number="5" description="Reserved" />
+<value number="6" description="Reserved" />
+<value number="7" description="DIMM0 Not Installed" />
+</bitfield>
+<bitfield start="31" size="2" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="29" size="2" name="EMR_BA" description="Mode Register Set Bank Address" type="bin">
+<value number="0" description="Program the DIMM Mode Register" />
+<value number="1" description="Program the DIMM Extended Mode Register" />
+<value number="2" description="Reserved" />
+<value number="3" description="Reserved" />
+</bitfield>
+<bitfield start="27" size="1" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="26" size="1" name="EMR_QFC" description="Extended Mode Register FET Control" type="bin">
+<value number="0" description="Enable" />
+<value number="1" description="Disable" />
+</bitfield>
+<bitfield start="25" size="1" name="EMR_DRV" description="Extended Mode Register Drive Strength Control" type="bin">
+<value number="0" description="Normal" />
+<value number="1" description="Reduced" />
+</bitfield>
+<bitfield start="24" size="1" name="EMR_DLL" description="Extended Mode Register DLL" type="bin">
+<value number="0" description="Enable" />
+<value number="1" description="Disable" />
+</bitfield>
+<bitfield start="23" size="16" name="REF_INT" description="Refresh Interval" type="dec">
+</bitfield>
+<bitfield start="7" size="2" name="REF_STAG" description="Refresh Staggering" type="dec">
+<value number="0" description="4 SDRAM Clks" />
+<value number="1" description="1 SDRAM Clks" />
+<value number="2" description="2 SDRAM Clks" />
+<value number="3" description="3 SDRAM Clks" />
+</bitfield>
+<bitfield start="5" size="2" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="3" size="1" name="REF_TST" description="Test Refresh" type="bin">
+</bitfield>
+<bitfield start="2" size="1" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="1" size="1" name="SOFT_RST" description="Software Reset" type="bin">
+</bitfield>
+<bitfield start="0" size="1" name="PROG_DRAM" description="Program Mode Register in SDRAM" type="bin">
+</bitfield>
+</msr>
+<msr address="0x20000019" type="rw" name="MC_CF8F_DATA" description="Timing and Mode Program">
+<bitfield start="63" size="8" name="STALE_REQ" description="GLIU Max Stale Request Count" type="dec">
+</bitfield>
+<bitfield start="55" size="3" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="52" size="2" name="XOR_BIT_SEL" description="XOR Bit Select" type="bin">
+<value number="0" description="ADDR[18]" />
+<value number="1" description="ADDR[19]" />
+<value number="2" description="ADDR[20]" />
+<value number="3" description="ADDR[21]" />
+</bitfield>
+<bitfield start="50" size="1" name="XOR_MB0" description="XOR MB0 Enable" type="bin">
+<value number="0" description="Disabled" />
+<value number="1" description="Enabled" />
+</bitfield>
+<bitfield start="49" size="1" name="XOR_BA1" description="XOR BA1 Enable" type="bin">
+<value number="0" description="Disabled" />
+<value number="1" description="Enabled" />
+</bitfield>
+<bitfield start="48" size="1" name="XOR_BA0" description="XOR BA0 Enable" type="bin">
+<value number="0" description="Disabled" />
+<value number="1" description="Enabled" />
+</bitfield>
+<bitfield start="47" size="8" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="39" size="1" name="AP_B2B" description="Autoprecharge Back-to-Back Command" type="bin">
+<value number="0" description="Enable" />
+<value number="1" description="Disable" />
+</bitfield>
+<bitfield start="38" size="1" name="AP_EN" description="Autoprecharge" type="bin">
+<value number="0" description="Enable" />
+<value number="1" description="Disable" />
+</bitfield>
+<bitfield start="37" size="4" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="33" size="1" name="HOI_LOI" description="High / Low Order Interleave Select" type="bin">
+<value number="0" description="Low Order Interleave" />
+<value number="1" description="High Order Interleave" />
+</bitfield>
+<bitfield start="32" size="1" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="31" size="1" name="THZ_DLY" description="tHZ Delay" type="bin">
+</bitfield>
+<bitfield start="30" size="3" name="CAS_LAT" description="Read CAS Latency" type="bin">
+<value number="0" description="Reserved" />
+<value number="1" description="Reserved" />
+<value number="2" description="2 Clks" />
+<value number="3" description="Reserved" />
+<value number="4" description="Reserved" />
+<value number="5" description="1.5 Clks" />
+<value number="6" description="2.5 Clks" />
+<value number="7" description="Reserved" />
+</bitfield>
+<bitfield start="27" size="4" name="REF2ACT" description="ACT to ACT/REF Period. tRC" type="bin">
+<value number="0" description="Reserved" />
+<value number="1" description="1 Clks" />
+<value number="2" description="2 Clks" />
+<value number="3" description="3 Clks" />
+<value number="4" description="4 Clks" />
+<value number="5" description="5 Clks" />
+<value number="6" description="7 Clks" />
+<value number="7" description="8 Clks" />
+<value number="8" description="9 Clks" />
+<value number="9" description="10 Clks" />
+<value number="10" description="11 Clks" />
+<value number="11" description="12 Clks" />
+<value number="12" description="13 Clks" />
+<value number="13" description="14 Clks" />
+<value number="14" description="15 Clks" />
+<value number="15" description="16 Clks" />
+</bitfield>
+<bitfield start="23" size="4" name="ACT2PRE" description="ACT to PRE Period. tRAS" type="bin">
+<value number="0" description="Reserved" />
+<value number="1" description="1 Clks" />
+<value number="2" description="2 Clks" />
+<value number="3" description="3 Clks" />
+<value number="4" description="4 Clks" />
+<value number="5" description="5 Clks" />
+<value number="6" description="7 Clks" />
+<value number="7" description="8 Clks" />
+<value number="8" description="9 Clks" />
+<value number="9" description="10 Clks" />
+<value number="10" description="11 Clks" />
+<value number="11" description="12 Clks" />
+<value number="12" description="13 Clks" />
+<value number="13" description="14 Clks" />
+<value number="14" description="15 Clks" />
+<value number="15" description="16 Clks" />
+</bitfield>
+<bitfield start="19" size="1" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="18" size="3" name="PRE2ACT" description="PRE to ACT Period. tRP" type="bin">
+<value number="0" description="Reserved" />
+<value number="1" description="1 Clks" />
+<value number="2" description="2 Clks" />
+<value number="3" description="3 Clks" />
+<value number="4" description="4 Clks" />
+<value number="5" description="5 Clks" />
+<value number="6" description="6 Clks" />
+<value number="7" description="7 Clks" />
+</bitfield>
+<bitfield start="15" size="1" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="14" size="3" name="ACT2CMD" description="Delay Time from ACT to Read/Write. tRCD" type="bin">
+<value number="0" description="Reserved" />
+<value number="1" description="1 Clks" />
+<value number="2" description="2 Clks" />
+<value number="3" description="3 Clks" />
+<value number="4" description="4 Clks" />
+<value number="5" description="5 Clks" />
+<value number="6" description="6 Clks" />
+<value number="7" description="Reserved" />
+</bitfield>
+<bitfield start="11" size="4" name="ACT2ACT" description="ACT(0) to ACT(1) Period. tRRD" type="bin">
+<value number="0" description="Reserved" />
+<value number="1" description="1 Clks" />
+<value number="2" description="2 Clks" />
+<value number="3" description="3 Clks" />
+<value number="4" description="4 Clks" />
+<value number="5" description="5 Clks" />
+<value number="6" description="6 Clks" />
+<value number="7" description="7 Clks" />
+<value number="8" description="Reserved" />
+<value number="9" description="Reserved" />
+<value number="10" description="Reserved" />
+<value number="11" description="Reserved" />
+<value number="12" description="Reserved" />
+<value number="13" description="Reserved" />
+<value number="14" description="Reserved" />
+<value number="15" description="Reserved" />
+</bitfield>
+<bitfield start="7" size="2" name="DPLWR" description="Data-in to PRE Period. tDPLW" type="dec">
+<value number="0" description="Invalid value" />
+<value number="1" description="1 Clks" />
+<value number="2" description="2 Clks" />
+<value number="3" description="3 Clks" />
+</bitfield>
+<bitfield start="5" size="2" name="DPLRD" description="Data-in to PRE Period. tDPLR" type="dec">
+<value number="0" description="Invalid value" />
+<value number="1" description="1 Clks" />
+<value number="2" description="2 Clks" />
+<value number="3" description="3 Clks" />
+</bitfield>
+<bitfield start="3" size="1" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="2" size="3" name="DAL" description="Data-in to ACT (REF) Period. tDAL" type="bin">
+<value number="0" description="Reserved" />
+<value number="1" description="1 clks" />
+<value number="2" description="2 Clks" />
+<value number="3" description="3 Clks" />
+<value number="4" description="4 Clks" />
+<value number="5" description="5 Clks" />
+<value number="6" description="6 Clks" />
+<value number="7" description="7 Clks" />
+</bitfield>
+</msr>
+<msr address="0x2000001a" type="rw" name="MC_CF1017_DATA" description="Feature Enables">
+<bitfield start="63" size="55" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="8" size="1" name="PM1_UP_DLY" description="PMode1 Up Delay" type="dec">
+<value number="0" description="No delay" />
+<value number="1" description="Enable delay" />
+</bitfield>
+<bitfield start="7" size="5" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="2" size="3" name="WR2DAT" description="Write Command to Data Latency" type="dec">
+<value number="0" description="Reserved" />
+<value number="1" description="Value when unbuffered DDR SDRAMs are used" />
+<value number="2" description="Value when registered DDR SDRAMs are used" />
+<value number="3" description="Reserved" />
+</bitfield>
+</msr>
+<msr address="0x2000001b" type="ro" name="MC_CFPERF_CNT1" description="Performance Counters">
+<bitfield start="63" size="32" name="CNT0" description="Counter 0" type="dec">
+</bitfield>
+<bitfield start="31" size="32" name="CNT1" description="Counter 1" type="dec">
+</bitfield>
+</msr>
+<msr address="0x2000001c" type="rw" name="MC_PERFCNT2" description="Counter and CAS Control">
+<bitfield start="63" size="28" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="35" size="1" name="STOP_CNT1" description="Stop Counter 1" type="dec">
+<value number="0" description="Counter 1 counts" />
+<value number="1" description="Stop Counter" />
+</bitfield>
+<bitfield start="34" size="1" name="RST_CNT1" description="Reset Counter 1" type="dec">
+<value number="0" description="Do nothing" />
+<value number="1" description="Reset counter 1" />
+</bitfield>
+<bitfield start="33" size="1" name="STOP_CNT0" description="Stop Counter 0" type="dec">
+<value number="0" description="Counter 0 counts" />
+<value number="1" description="Stop counter 0" />
+</bitfield>
+<bitfield start="32" size="1" name="RST_CNT0" description="Reset Counter 0" type="dec">
+<value number="0" description="Do nothing" />
+<value number="1" description="Reset counter 0" />
+</bitfield>
+<bitfield start="31" size="8" name="CNT1_MASK" description="Counter 1 Mask" type="bin">
+</bitfield>
+<bitfield start="23" size="8" name="CNT1_DATA" description="Counter 1 Data" type="bin">
+</bitfield>
+<bitfield start="15" size="8" name="CNT0_MASK" description="Counter 0 Mask" type="bin">
+</bitfield>
+<bitfield start="7" size="8" name="CNT0_DATA" description="Counter 0 Data" type="bin">
+</bitfield>
+</msr>
+<msr address="0x2000001d" type="rw" name="MC_CFCLK_DBUG" description="Clocking and Debug">
+<bitfield start="63" size="29" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="34" size="1" name="B2B_EN" description="Back-to-Back Command Enable" type="bin">
+<value number="0" description="Allow back-to-back commands" />
+<value number="1" description="Disable back-to-back commands" />
+</bitfield>
+<bitfield start="33" size="1" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="32" size="1" name="MTEST_EN" description="MTEST Enable" type="bin">
+<value number="0" description="Disable" />
+<value number="1" description="Enable" />
+</bitfield>
+<bitfield start="31" size="22" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="9" size="1" name="MASK_CKE[1:0]" description="CKE Mask" type="bin">
+<value number="0" description="CKE1 output enable unmasked" />
+<value number="1" description="CKE1 output enable masked" />
+</bitfield>
+<bitfield start="8" size="1" name="MASK_CKE0" description="CKE0 Mask" type="bin">
+<value number="0" description="CKE0 output enable unmasked" />
+<value number="1" description="CKE0 output enable masked" />
+</bitfield>
+<bitfield start="7" size="1" name="CNTL_MSK1" description="Control Mask 1" type="bin">
+<value number="0" description="DIMM1 CAS1# RAS1# WE1# CS[3:2]# output enable unmasked" />
+<value number="1" description="DIMM1 CAS1# RAS1# WE1# CS[3:2]# output enable masked" />
+</bitfield>
+<bitfield start="6" size="1" name="CNTL_MSK0" description="Control Mask 0" type="bin">
+<value number="0" description="DIMM0 CAS0# RAS0# WE0# CS[1:0]# output enable unmasked" />
+<value number="1" description="DIMM0 CAS0# RAS0# WE0# CS[1:0]# output enable masked" />
+</bitfield>
+<bitfield start="5" size="1" name="ADRS_MSK" description="Address Mask" type="bin">
+<value number="0" description="MA and BA output enable unmasked" />
+<value number="1" description="MA and BA output enable masked" />
+</bitfield>
+<bitfield start="4" size="5" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+</msr>
+<msr address="0x40000020" type="rw" name="GLIU1_P2D_BM0" description="GLIU1 P2D Base Mask Descriptor 0">
+<bitfield start="63" size="3" name="PDID1" description="Descriptor Destination ID" type="bin">
+<value number="0" description="Port 0 = GLIU0:GLIU GLIU1:GLIU" />
+<value number="1" description="Port 1 = GLIU0:GLMC GLIU1:Interface to GLIU0" />
+<value number="2" description="Port 2 = GLIU0:Interface to GLIU1 GLIU1:Not Used" />
+<value number="3" description="Port 3 = GLIU0:CPU Core GLIU1:GLCP" />
+<value number="4" description="Port 4 = GLIU0:DC GLIU1:GLPCI" />
+<value number="5" description="Port 5 = GLIU0:GP GLIU1:GIO" />
+<value number="6" description="Port 6 = GLIU0:VP GLIU1:Not Used" />
+<value number="7" description="Port 7 = GLIU0:Not Used GLIU1:Not Used" />
+</bitfield>
+<bitfield start="36" size="1" name="PCMP_BIZ" description="Compare Bizarro Flag" type="bin">
+<value number="0" description="Only act if Bizarro Flag = 0 (Memory or I/O)" />
+<value number="1" description="Only act if Bizarro Flag = 1 (PCI, Shutdown or Halt)" />
+</bitfield>
+<bitfield start="59" size="20" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="39" size="20" name="PBASE" description="Physical Memory Address Base" type="hex">
+</bitfield>
+<bitfield start="19" size="20" name="PMASK" description="Physical Memory Address Mask" type="hex">
+</bitfield>
+</msr>
+<msr address="0x40000021" type="rw" name="GLIU1_P2D_BM1" description="GLIU1 P2D Base Mask Descriptor 1">
+<bitfield start="63" size="3" name="PDID1" description="Descriptor Destination ID" type="bin">
+<value number="0" description="Port 0 = GLIU0:GLIU GLIU1:GLIU" />
+<value number="1" description="Port 1 = GLIU0:GLMC GLIU1:Interface to GLIU0" />
+<value number="2" description="Port 2 = GLIU0:Interface to GLIU1 GLIU1:Not Used" />
+<value number="3" description="Port 3 = GLIU0:CPU Core GLIU1:GLCP" />
+<value number="4" description="Port 4 = GLIU0:DC GLIU1:GLPCI" />
+<value number="5" description="Port 5 = GLIU0:GP GLIU1:GIO" />
+<value number="6" description="Port 6 = GLIU0:VP GLIU1:Not Used" />
+<value number="7" description="Port 7 = GLIU0:Not Used GLIU1:Not Used" />
+</bitfield>
+<bitfield start="36" size="1" name="PCMP_BIZ" description="Compare Bizarro Flag" type="bin">
+<value number="0" description="Only act if Bizarro Flag = 0 (Memory or I/O)" />
+<value number="1" description="Only act if Bizarro Flag = 1 (PCI, Shutdown or Halt)" />
+</bitfield>
+<bitfield start="59" size="20" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="39" size="20" name="PBASE" description="Physical Memory Address Base" type="hex">
+</bitfield>
+<bitfield start="19" size="20" name="PMASK" description="Physical Memory Address Mask" type="hex">
+</bitfield>
+</msr>
+<msr address="0x40000022" type="rw" name="GLIU1_P2D_BM2" description="GLIU1 P2D Base Mask Descriptor 2">
+<bitfield start="63" size="3" name="PDID1" description="Descriptor Destination ID" type="bin">
+<value number="0" description="Port 0 = GLIU0:GLIU GLIU1:GLIU" />
+<value number="1" description="Port 1 = GLIU0:GLMC GLIU1:Interface to GLIU0" />
+<value number="2" description="Port 2 = GLIU0:Interface to GLIU1 GLIU1:Not Used" />
+<value number="3" description="Port 3 = GLIU0:CPU Core GLIU1:GLCP" />
+<value number="4" description="Port 4 = GLIU0:DC GLIU1:GLPCI" />
+<value number="5" description="Port 5 = GLIU0:GP GLIU1:GIO" />
+<value number="6" description="Port 6 = GLIU0:VP GLIU1:Not Used" />
+<value number="7" description="Port 7 = GLIU0:Not Used GLIU1:Not Used" />
+</bitfield>
+<bitfield start="36" size="1" name="PCMP_BIZ" description="Compare Bizarro Flag" type="bin">
+<value number="0" description="Only act if Bizarro Flag = 0 (Memory or I/O)" />
+<value number="1" description="Only act if Bizarro Flag = 1 (PCI, Shutdown or Halt)" />
+</bitfield>
+<bitfield start="59" size="20" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="39" size="20" name="PBASE" description="Physical Memory Address Base" type="hex">
+</bitfield>
+<bitfield start="19" size="20" name="PMASK" description="Physical Memory Address Mask" type="hex">
+</bitfield>
+</msr>
+<msr address="0x40000023" type="rw" name="GLIU1_P2D_BM3" description="GLIU1 P2D Base Mask Descriptor 3">
+<bitfield start="63" size="3" name="PDID1" description="Descriptor Destination ID" type="bin">
+<value number="0" description="Port 0 = GLIU0:GLIU GLIU1:GLIU" />
+<value number="1" description="Port 1 = GLIU0:GLMC GLIU1:Interface to GLIU0" />
+<value number="2" description="Port 2 = GLIU0:Interface to GLIU1 GLIU1:Not Used" />
+<value number="3" description="Port 3 = GLIU0:CPU Core GLIU1:GLCP" />
+<value number="4" description="Port 4 = GLIU0:DC GLIU1:GLPCI" />
+<value number="5" description="Port 5 = GLIU0:GP GLIU1:GIO" />
+<value number="6" description="Port 6 = GLIU0:VP GLIU1:Not Used" />
+<value number="7" description="Port 7 = GLIU0:Not Used GLIU1:Not Used" />
+</bitfield>
+<bitfield start="36" size="1" name="PCMP_BIZ" description="Compare Bizarro Flag" type="bin">
+<value number="0" description="Only act if Bizarro Flag = 0 (Memory or I/O)" />
+<value number="1" description="Only act if Bizarro Flag = 1 (PCI, Shutdown or Halt)" />
+</bitfield>
+<bitfield start="59" size="20" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="39" size="20" name="PBASE" description="Physical Memory Address Base" type="hex">
+</bitfield>
+<bitfield start="19" size="20" name="PMASK" description="Physical Memory Address Mask" type="hex">
+</bitfield>
+</msr>
+<msr address="0x40000024" type="rw" name="GLIU1_P2D_BM4" description="GLIU1 P2D Base Mask Descriptor 4">
+<bitfield start="63" size="3" name="PDID1" description="Descriptor Destination ID" type="bin">
+<value number="0" description="Port 0 = GLIU0:GLIU GLIU1:GLIU" />
+<value number="1" description="Port 1 = GLIU0:GLMC GLIU1:Interface to GLIU0" />
+<value number="2" description="Port 2 = GLIU0:Interface to GLIU1 GLIU1:Not Used" />
+<value number="3" description="Port 3 = GLIU0:CPU Core GLIU1:GLCP" />
+<value number="4" description="Port 4 = GLIU0:DC GLIU1:GLPCI" />
+<value number="5" description="Port 5 = GLIU0:GP GLIU1:GIO" />
+<value number="6" description="Port 6 = GLIU0:VP GLIU1:Not Used" />
+<value number="7" description="Port 7 = GLIU0:Not Used GLIU1:Not Used" />
+</bitfield>
+<bitfield start="36" size="1" name="PCMP_BIZ" description="Compare Bizarro Flag" type="bin">
+<value number="0" description="Only act if Bizarro Flag = 0 (Memory or I/O)" />
+<value number="1" description="Only act if Bizarro Flag = 1 (PCI, Shutdown or Halt)" />
+</bitfield>
+<bitfield start="59" size="20" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="39" size="20" name="PBASE" description="Physical Memory Address Base" type="hex">
+</bitfield>
+<bitfield start="19" size="20" name="PMASK" description="Physical Memory Address Mask" type="hex">
+</bitfield>
+</msr>
+<msr address="0x40000025" type="rw" name="GLIU1_P2D_BM5" description="GLIU1 P2D Base Mask Descriptor 5">
+<bitfield start="63" size="3" name="PDID1" description="Descriptor Destination ID" type="bin">
+<value number="0" description="Port 0 = GLIU0:GLIU GLIU1:GLIU" />
+<value number="1" description="Port 1 = GLIU0:GLMC GLIU1:Interface to GLIU0" />
+<value number="2" description="Port 2 = GLIU0:Interface to GLIU1 GLIU1:Not Used" />
+<value number="3" description="Port 3 = GLIU0:CPU Core GLIU1:GLCP" />
+<value number="4" description="Port 4 = GLIU0:DC GLIU1:GLPCI" />
+<value number="5" description="Port 5 = GLIU0:GP GLIU1:GIO" />
+<value number="6" description="Port 6 = GLIU0:VP GLIU1:Not Used" />
+<value number="7" description="Port 7 = GLIU0:Not Used GLIU1:Not Used" />
+</bitfield>
+<bitfield start="36" size="1" name="PCMP_BIZ" description="Compare Bizarro Flag" type="bin">
+<value number="0" description="Only act if Bizarro Flag = 0 (Memory or I/O)" />
+<value number="1" description="Only act if Bizarro Flag = 1 (PCI, Shutdown or Halt)" />
+</bitfield>
+<bitfield start="59" size="20" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="39" size="20" name="PBASE" description="Physical Memory Address Base" type="hex">
+</bitfield>
+<bitfield start="19" size="20" name="PMASK" description="Physical Memory Address Mask" type="hex">
+</bitfield>
+</msr>
+<msr address="0x40000026" type="rw" name="GLIU1_P2D_BM6" description="GLIU1 P2D Base Mask Descriptor 6">
+<bitfield start="63" size="3" name="PDID1" description="Descriptor Destination ID" type="bin">
+<value number="0" description="Port 0 = GLIU0:GLIU GLIU1:GLIU" />
+<value number="1" description="Port 1 = GLIU0:GLMC GLIU1:Interface to GLIU0" />
+<value number="2" description="Port 2 = GLIU0:Interface to GLIU1 GLIU1:Not Used" />
+<value number="3" description="Port 3 = GLIU0:CPU Core GLIU1:GLCP" />
+<value number="4" description="Port 4 = GLIU0:DC GLIU1:GLPCI" />
+<value number="5" description="Port 5 = GLIU0:GP GLIU1:GIO" />
+<value number="6" description="Port 6 = GLIU0:VP GLIU1:Not Used" />
+<value number="7" description="Port 7 = GLIU0:Not Used GLIU1:Not Used" />
+</bitfield>
+<bitfield start="36" size="1" name="PCMP_BIZ" description="Compare Bizarro Flag" type="bin">
+<value number="0" description="Only act if Bizarro Flag = 0 (Memory or I/O)" />
+<value number="1" description="Only act if Bizarro Flag = 1 (PCI, Shutdown or Halt)" />
+</bitfield>
+<bitfield start="59" size="20" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="39" size="20" name="PBASE" description="Physical Memory Address Base" type="hex">
+</bitfield>
+<bitfield start="19" size="20" name="PMASK" description="Physical Memory Address Mask" type="hex">
+</bitfield>
+</msr>
+<msr address="0x40000027" type="rw" name="GLIU1_P2D_BM7" description="GLIU1 P2D Base Mask Descriptor 7">
+<bitfield start="63" size="3" name="PDID1" description="Descriptor Destination ID" type="bin">
+<value number="0" description="Port 0 = GLIU0:GLIU GLIU1:GLIU" />
+<value number="1" description="Port 1 = GLIU0:GLMC GLIU1:Interface to GLIU0" />
+<value number="2" description="Port 2 = GLIU0:Interface to GLIU1 GLIU1:Not Used" />
+<value number="3" description="Port 3 = GLIU0:CPU Core GLIU1:GLCP" />
+<value number="4" description="Port 4 = GLIU0:DC GLIU1:GLPCI" />
+<value number="5" description="Port 5 = GLIU0:GP GLIU1:GIO" />
+<value number="6" description="Port 6 = GLIU0:VP GLIU1:Not Used" />
+<value number="7" description="Port 7 = GLIU0:Not Used GLIU1:Not Used" />
+</bitfield>
+<bitfield start="36" size="1" name="PCMP_BIZ" description="Compare Bizarro Flag" type="bin">
+<value number="0" description="Only act if Bizarro Flag = 0 (Memory or I/O)" />
+<value number="1" description="Only act if Bizarro Flag = 1 (PCI, Shutdown or Halt)" />
+</bitfield>
+<bitfield start="59" size="20" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="39" size="20" name="PBASE" description="Physical Memory Address Base" type="hex">
+</bitfield>
+<bitfield start="19" size="20" name="PMASK" description="Physical Memory Address Mask" type="hex">
+</bitfield>
+</msr>
+<msr address="0x40000028" type="rw" name="GLIU1_P2D_BM8" description="GLIU1 P2D Base Mask Descriptor 8">
+<bitfield start="63" size="3" name="PDID1" description="Descriptor Destination ID" type="bin">
+<value number="0" description="Port 0 = GLIU0:GLIU GLIU1:GLIU" />
+<value number="1" description="Port 1 = GLIU0:GLMC GLIU1:Interface to GLIU0" />
+<value number="2" description="Port 2 = GLIU0:Interface to GLIU1 GLIU1:Not Used" />
+<value number="3" description="Port 3 = GLIU0:CPU Core GLIU1:GLCP" />
+<value number="4" description="Port 4 = GLIU0:DC GLIU1:GLPCI" />
+<value number="5" description="Port 5 = GLIU0:GP GLIU1:GIO" />
+<value number="6" description="Port 6 = GLIU0:VP GLIU1:Not Used" />
+<value number="7" description="Port 7 = GLIU0:Not Used GLIU1:Not Used" />
+</bitfield>
+<bitfield start="36" size="1" name="PCMP_BIZ" description="Compare Bizarro Flag" type="bin">
+<value number="0" description="Only act if Bizarro Flag = 0 (Memory or I/O)" />
+<value number="1" description="Only act if Bizarro Flag = 1 (PCI, Shutdown or Halt)" />
+</bitfield>
+<bitfield start="59" size="20" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="39" size="20" name="PBASE" description="Physical Memory Address Base" type="hex">
+</bitfield>
+<bitfield start="19" size="20" name="PMASK" description="Physical Memory Address Mask" type="hex">
+</bitfield>
+</msr>
+<msr address="0x40000029" type="rw" name="GLIU1_P2D_R0" description="GLIU0 P2D Range Descriptor 0">
+<bitfield start="63" size="3" name="PDID1" description="Descriptor Destination ID" type="bin">
+<value number="0" description="Port 0 = GLIU0:GLIU GLIU1:GLIU" />
+<value number="1" description="Port 1 = GLIU0:GLMC GLIU1:Interface to GLIU0" />
+<value number="2" description="Port 2 = GLIU0:Interface to GLIU1 GLIU1:Not Used" />
+<value number="3" description="Port 3 = GLIU0:CPU Core GLIU1:GLCP" />
+<value number="4" description="Port 4 = GLIU0:DC GLIU1:GLPCI" />
+<value number="5" description="Port 5 = GLIU0:GP GLIU1:GIO" />
+<value number="6" description="Port 6 = GLIU0:VP GLIU1:Not Used" />
+<value number="7" description="Port 7 = GLIU0:Not Used GLIU1:Not Used" />
+</bitfield>
+<bitfield start="36" size="1" name="PCMP_BIZ" description="Compare Bizarro Flag" type="bin">
+<value number="0" description="Only act if Bizarro Flag = 0 (Memory or I/O)" />
+<value number="1" description="Only act if Bizarro Flag = 1 (PCI, Shutdown or Halt)" />
+</bitfield>
+<bitfield start="59" size="20" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="39" size="20" name="PMAX" description="Physical Memory Address Max." type="hex">
+</bitfield>
+<bitfield start="19" size="20" name="PMIN" description="Physical Memory Address Min." type="hex">
+</bitfield>
+</msr>
+<msr address="0x4000002a" type="rw" name="GLIU1_P2D_R1" description="GLIU0 P2D Range Descriptor 1">
+<bitfield start="63" size="3" name="PDID1" description="Descriptor Destination ID" type="bin">
+<value number="0" description="Port 0 = GLIU0:GLIU GLIU1:GLIU" />
+<value number="1" description="Port 1 = GLIU0:GLMC GLIU1:Interface to GLIU0" />
+<value number="2" description="Port 2 = GLIU0:Interface to GLIU1 GLIU1:Not Used" />
+<value number="3" description="Port 3 = GLIU0:CPU Core GLIU1:GLCP" />
+<value number="4" description="Port 4 = GLIU0:DC GLIU1:GLPCI" />
+<value number="5" description="Port 5 = GLIU0:GP GLIU1:GIO" />
+<value number="6" description="Port 6 = GLIU0:VP GLIU1:Not Used" />
+<value number="7" description="Port 7 = GLIU0:Not Used GLIU1:Not Used" />
+</bitfield>
+<bitfield start="36" size="1" name="PCMP_BIZ" description="Compare Bizarro Flag" type="bin">
+<value number="0" description="Only act if Bizarro Flag = 0 (Memory or I/O)" />
+<value number="1" description="Only act if Bizarro Flag = 1 (PCI, Shutdown or Halt)" />
+</bitfield>
+<bitfield start="59" size="20" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="39" size="20" name="PMAX" description="Physical Memory Address Max." type="hex">
+</bitfield>
+<bitfield start="19" size="20" name="PMIN" description="Physical Memory Address Min." type="hex">
+</bitfield>
+</msr>
+<msr address="0x4000002b" type="rw" name="GLIU0_P2D_R2" description="GLIU0 P2D Range Descriptor 2">
+<bitfield start="63" size="3" name="PDID1" description="Descriptor Destination ID" type="bin">
+<value number="0" description="Port 0 = GLIU0:GLIU GLIU1:GLIU" />
+<value number="1" description="Port 1 = GLIU0:GLMC GLIU1:Interface to GLIU0" />
+<value number="2" description="Port 2 = GLIU0:Interface to GLIU1 GLIU1:Not Used" />
+<value number="3" description="Port 3 = GLIU0:CPU Core GLIU1:GLCP" />
+<value number="4" description="Port 4 = GLIU0:DC GLIU1:GLPCI" />
+<value number="5" description="Port 5 = GLIU0:GP GLIU1:GIO" />
+<value number="6" description="Port 6 = GLIU0:VP GLIU1:Not Used" />
+<value number="7" description="Port 7 = GLIU0:Not Used GLIU1:Not Used" />
+</bitfield>
+<bitfield start="36" size="1" name="PCMP_BIZ" description="Compare Bizarro Flag" type="bin">
+<value number="0" description="Only act if Bizarro Flag = 0 (Memory or I/O)" />
+<value number="1" description="Only act if Bizarro Flag = 1 (PCI, Shutdown or Halt)" />
+</bitfield>
+<bitfield start="59" size="20" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="39" size="20" name="PMAX" description="Physical Memory Address Max." type="hex">
+</bitfield>
+<bitfield start="19" size="20" name="PMIN" description="Physical Memory Address Min." type="hex">
+</bitfield>
+</msr>
+<msr address="0x4000002c" type="rw" name="GLIU0_P2D_R3" description="GLIU0 P2D Range Descriptor 3">
+<bitfield start="63" size="3" name="PDID1" description="Descriptor Destination ID" type="bin">
+<value number="0" description="Port 0 = GLIU0:GLIU GLIU1:GLIU" />
+<value number="1" description="Port 1 = GLIU0:GLMC GLIU1:Interface to GLIU0" />
+<value number="2" description="Port 2 = GLIU0:Interface to GLIU1 GLIU1:Not Used" />
+<value number="3" description="Port 3 = GLIU0:CPU Core GLIU1:GLCP" />
+<value number="4" description="Port 4 = GLIU0:DC GLIU1:GLPCI" />
+<value number="5" description="Port 5 = GLIU0:GP GLIU1:GIO" />
+<value number="6" description="Port 6 = GLIU0:VP GLIU1:Not Used" />
+<value number="7" description="Port 7 = GLIU0:Not Used GLIU1:Not Used" />
+</bitfield>
+<bitfield start="36" size="1" name="PCMP_BIZ" description="Compare Bizarro Flag" type="bin">
+<value number="0" description="Only act if Bizarro Flag = 0 (Memory or I/O)" />
+<value number="1" description="Only act if Bizarro Flag = 1 (PCI, Shutdown or Halt)" />
+</bitfield>
+<bitfield start="59" size="20" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="39" size="20" name="PMAX" description="Physical Memory Address Max." type="hex">
+</bitfield>
+<bitfield start="19" size="20" name="PMIN" description="Physical Memory Address Min." type="hex">
+</bitfield>
+</msr>
+<msr address="0x4000002d" type="rw" name="GLIU1_P2D_SC0" description="GLIU1 P2D Swiss Cheese Descriptor 0">
+<bitfield start="63" size="3" name="PDID1" description="Descriptor Destination ID" type="bin">
+<value number="0" description="Port 0 = GLIU0:GLIU GLIU1:GLIU" />
+<value number="1" description="Port 1 = GLIU0:GLMC GLIU1:Interface to GLIU0" />
+<value number="2" description="Port 2 = GLIU0:Interface to GLIU1 GLIU1:Not Used" />
+<value number="3" description="Port 3 = GLIU0:CPU Core GLIU1:GLCP" />
+<value number="4" description="Port 4 = GLIU0:DC GLIU1:GLPCI" />
+<value number="5" description="Port 5 = GLIU0:GP GLIU1:GIO" />
+<value number="6" description="Port 6 = GLIU0:VP GLIU1:Not Used" />
+<value number="7" description="Port 7 = GLIU0:Not Used GLIU1:Not Used" />
+</bitfield>
+<bitfield start="36" size="1" name="PCMP_BIZ" description="Compare Bizarro Flag" type="bin">
+<value number="0" description="Only act if Bizarro Flag = 0 (Memory or I/O)" />
+<value number="1" description="Only act if Bizarro Flag = 1 (PCI, Shutdown or Halt)" />
+</bitfield>
+<bitfield start="59" size="12" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="47" size="16" name="WEN" description="Enable hits to the base for the ith 16K page for writes" type="hex">
+</bitfield>
+<bitfield start="31" size="16" name="REN" description="Enable hits to the base for the ith 16K page for " type="hex">
+</bitfield>
+<bitfield start="15" size="2" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="13" size="14" name="PSCBASE" description="Physical Memory Address Base for hit" type="hex">
+</bitfield>
+</msr>
+<msr address="0x400000e0" type="rw" name="GLIU1_IOD_BM0" description="GLIU1 IOD Base Mask Descriptor 0">
+<bitfield start="63" size="3" name="IDID" description="IO Descriptor Destination ID" type="bin">
+<value number="0" description="Port 0 = GLIU0:GLIU GLIU1:GLIU" />
+<value number="1" description="Port 1 = GLIU0:GLMC GLIU1:Interface to GLIU0" />
+<value number="2" description="Port 2 = GLIU0:Interface to GLIU1 GLIU1:Not Used" />
+<value number="3" description="Port 3 = GLIU0:CPU Core GLIU1:GLCP" />
+<value number="4" description="Port 4 = GLIU0:DC GLIU1:GLPCI" />
+<value number="5" description="Port 5 = GLIU0:GP GLIU1:GIO" />
+<value number="6" description="Port 6 = GLIU0:VP GLIU1:Not Used" />
+<value number="7" description="Port 7 = GLIU0:Not Used GLIU1:Not Used" />
+</bitfield>
+<bitfield start="36" size="1" name="PCMP_BIZ" description="Compare Bizarro Flag" type="bin">
+<value number="0" description="Only act if Bizarro Flag = 0 (Memory or I/O)" />
+<value number="1" description="Only act if Bizarro Flag = 1 (PCI, Shutdown or Halt)" />
+</bitfield>
+<bitfield start="59" size="20" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="39" size="20" name="IBASE" description="Physical IO Address Base" type="hex">
+</bitfield>
+<bitfield start="19" size="20" name="IMASK" description="Physical IO Address Mask" type="hex">
+</bitfield>
+</msr>
+<msr address="0x400000e1" type="rw" name="GLIU1_IOD_BM1" description="GLIU1 IOD Base Mask Descriptor 1">
+<bitfield start="63" size="3" name="IDID" description="IO Descriptor Destination ID" type="bin">
+<value number="0" description="Port 0 = GLIU0:GLIU GLIU1:GLIU" />
+<value number="1" description="Port 1 = GLIU0:GLMC GLIU1:Interface to GLIU0" />
+<value number="2" description="Port 2 = GLIU0:Interface to GLIU1 GLIU1:Not Used" />
+<value number="3" description="Port 3 = GLIU0:CPU Core GLIU1:GLCP" />
+<value number="4" description="Port 4 = GLIU0:DC GLIU1:GLPCI" />
+<value number="5" description="Port 5 = GLIU0:GP GLIU1:GIO" />
+<value number="6" description="Port 6 = GLIU0:VP GLIU1:Not Used" />
+<value number="7" description="Port 7 = GLIU0:Not Used GLIU1:Not Used" />
+</bitfield>
+<bitfield start="36" size="1" name="PCMP_BIZ" description="Compare Bizarro Flag" type="bin">
+<value number="0" description="Only act if Bizarro Flag = 0 (Memory or I/O)" />
+<value number="1" description="Only act if Bizarro Flag = 1 (PCI, Shutdown or Halt)" />
+</bitfield>
+<bitfield start="59" size="20" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="39" size="20" name="IBASE" description="Physical IO Address Base" type="hex">
+</bitfield>
+<bitfield start="19" size="20" name="IMASK" description="Physical IO Address Mask" type="hex">
+</bitfield>
+</msr>
+<msr address="0x400000e2" type="rw" name="GLIU1_IOD_BM2" description="GLIU1 IOD Base Mask Descriptor 2">
+<bitfield start="63" size="3" name="IDID" description="IO Descriptor Destination ID" type="bin">
+<value number="0" description="Port 0 = GLIU0:GLIU GLIU1:GLIU" />
+<value number="1" description="Port 1 = GLIU0:GLMC GLIU1:Interface to GLIU0" />
+<value number="2" description="Port 2 = GLIU0:Interface to GLIU1 GLIU1:Not Used" />
+<value number="3" description="Port 3 = GLIU0:CPU Core GLIU1:GLCP" />
+<value number="4" description="Port 4 = GLIU0:DC GLIU1:GLPCI" />
+<value number="5" description="Port 5 = GLIU0:GP GLIU1:GIO" />
+<value number="6" description="Port 6 = GLIU0:VP GLIU1:Not Used" />
+<value number="7" description="Port 7 = GLIU0:Not Used GLIU1:Not Used" />
+</bitfield>
+<bitfield start="36" size="1" name="PCMP_BIZ" description="Compare Bizarro Flag" type="bin">
+<value number="0" description="Only act if Bizarro Flag = 0 (Memory or I/O)" />
+<value number="1" description="Only act if Bizarro Flag = 1 (PCI, Shutdown or Halt)" />
+</bitfield>
+<bitfield start="59" size="20" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="39" size="20" name="IBASE" description="Physical IO Address Base" type="hex">
+</bitfield>
+<bitfield start="19" size="20" name="IMASK" description="Physical IO Address Mask" type="hex">
+</bitfield>
+</msr>
+<msr address="0x400000e3" type="rw" name="GLIU1_IOD_SC0" description="GLIU1 IOD Swiss Cheese Descriptor 0">
+<bitfield start="63" size="3" name="IDID1" description="Descriptor Destination ID 1" type="bin">
+</bitfield>
+<bitfield start="36" size="1" name="PCMP_BIZ" description="Compare Bizarro Flag" type="bin">
+<value number="0" description="Only act if Bizarro Flag = 0 (Memory or I/O)" />
+<value number="1" description="Only act if Bizarro Flag = 1 (PCI, Shutdown or Halt)" />
+</bitfield>
+<bitfield start="59" size="28" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="31" size="8" name="EN" description="Enable for hits to IDID1 or else SUBP" type="hex">
+</bitfield>
+<bitfield start="23" size="2" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="21" size="1" name="WEN" description="Descriptor hits  IDID1 on write request Types else SUBP" type="bin">
+</bitfield>
+<bitfield start="20" size="1" name="WEN" description="Descriptor hit  IDID1 on write request Types else SUBP" type="bin">
+</bitfield>
+<bitfield start="19" size="17" name="IBASE" description="IO Memory Base" type="hex">
+</bitfield>
+<bitfield start="2" size="3" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+</msr>
+<msr address="0x400000e4" type="rw" name="GLIU1_IOD_SC1" description="GLIU1 IOD Swiss Cheese Descriptor 1">
+<bitfield start="63" size="3" name="IDID1" description="Descriptor Destination ID 1" type="bin">
+</bitfield>
+<bitfield start="36" size="1" name="PCMP_BIZ" description="Compare Bizarro Flag" type="bin">
+<value number="0" description="Only act if Bizarro Flag = 0 (Memory or I/O)" />
+<value number="1" description="Only act if Bizarro Flag = 1 (PCI, Shutdown or Halt)" />
+</bitfield>
+<bitfield start="59" size="28" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="31" size="8" name="EN" description="Enable for hits to IDID1 or else SUBP" type="hex">
+</bitfield>
+<bitfield start="23" size="2" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="21" size="1" name="WEN" description="Descriptor hits  IDID1 on write request Types else SUBP" type="bin">
+</bitfield>
+<bitfield start="20" size="1" name="WEN" description="Descriptor hit  IDID1 on write request Types else SUBP" type="bin">
+</bitfield>
+<bitfield start="19" size="17" name="IBASE" description="IO Memory Base" type="hex">
+</bitfield>
+<bitfield start="2" size="3" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+</msr>
+<msr address="0x400000e5" type="rw" name="GLIU1_IOD_SC2" description="GLIU1 IOD Swiss Cheese Descriptor 2">
+<bitfield start="63" size="3" name="IDID1" description="Descriptor Destination ID 1" type="bin">
+</bitfield>
+<bitfield start="36" size="1" name="PCMP_BIZ" description="Compare Bizarro Flag" type="bin">
+<value number="0" description="Only act if Bizarro Flag = 0 (Memory or I/O)" />
+<value number="1" description="Only act if Bizarro Flag = 1 (PCI, Shutdown or Halt)" />
+</bitfield>
+<bitfield start="59" size="28" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="31" size="8" name="EN" description="Enable for hits to IDID1 or else SUBP" type="hex">
+</bitfield>
+<bitfield start="23" size="2" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="21" size="1" name="WEN" description="Descriptor hits  IDID1 on write request Types else SUBP" type="bin">
+</bitfield>
+<bitfield start="20" size="1" name="WEN" description="Descriptor hit  IDID1 on write request Types else SUBP" type="bin">
+</bitfield>
+<bitfield start="19" size="17" name="IBASE" description="IO Memory Base" type="hex">
+</bitfield>
+<bitfield start="2" size="3" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+</msr>
+<msr address="0x400000e6" type="rw" name="GLIU1_IOD_SC3" description="GLIU1 IOD Swiss Cheese Descriptor 3">
+<bitfield start="63" size="3" name="IDID1" description="Descriptor Destination ID 1" type="bin">
+</bitfield>
+<bitfield start="36" size="1" name="PCMP_BIZ" description="Compare Bizarro Flag" type="bin">
+<value number="0" description="Only act if Bizarro Flag = 0 (Memory or I/O)" />
+<value number="1" description="Only act if Bizarro Flag = 1 (PCI, Shutdown or Halt)" />
+</bitfield>
+<bitfield start="59" size="28" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="31" size="8" name="EN" description="Enable for hits to IDID1 or else SUBP" type="hex">
+</bitfield>
+<bitfield start="23" size="2" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="21" size="1" name="WEN" description="Descriptor hits  IDID1 on write request Types else SUBP" type="bin">
+</bitfield>
+<bitfield start="20" size="1" name="WEN" description="Descriptor hit  IDID1 on write request Types else SUBP" type="bin">
+</bitfield>
+<bitfield start="19" size="17" name="IBASE" description="IO Memory Base" type="hex">
+</bitfield>
+<bitfield start="2" size="3" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+</msr>
+<msr address="0x400000e7" type="rw" name="GLIU1_IOD_SC4" description="GLIU1 IOD Swiss Cheese Descriptor 4">
+<bitfield start="63" size="3" name="IDID1" description="Descriptor Destination ID 1" type="bin">
+</bitfield>
+<bitfield start="36" size="1" name="PCMP_BIZ" description="Compare Bizarro Flag" type="bin">
+<value number="0" description="Only act if Bizarro Flag = 0 (Memory or I/O)" />
+<value number="1" description="Only act if Bizarro Flag = 1 (PCI, Shutdown or Halt)" />
+</bitfield>
+<bitfield start="59" size="28" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="31" size="8" name="EN" description="Enable for hits to IDID1 or else SUBP" type="hex">
+</bitfield>
+<bitfield start="23" size="2" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="21" size="1" name="WEN" description="Descriptor hits  IDID1 on write request Types else SUBP" type="bin">
+</bitfield>
+<bitfield start="20" size="1" name="WEN" description="Descriptor hit  IDID1 on write request Types else SUBP" type="bin">
+</bitfield>
+<bitfield start="19" size="17" name="IBASE" description="IO Memory Base" type="hex">
+</bitfield>
+<bitfield start="2" size="3" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+</msr>
+<msr address="0x400000e8" type="rw" name="GLIU1_IOD_SC5" description="GLIU1 IOD Swiss Cheese Descriptor 5">
+<bitfield start="63" size="3" name="IDID1" description="Descriptor Destination ID 1" type="bin">
+</bitfield>
+<bitfield start="36" size="1" name="PCMP_BIZ" description="Compare Bizarro Flag" type="bin">
+<value number="0" description="Only act if Bizarro Flag = 0 (Memory or I/O)" />
+<value number="1" description="Only act if Bizarro Flag = 1 (PCI, Shutdown or Halt)" />
+</bitfield>
+<bitfield start="59" size="28" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="31" size="8" name="EN" description="Enable for hits to IDID1 or else SUBP" type="hex">
+</bitfield>
+<bitfield start="23" size="2" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="21" size="1" name="WEN" description="Descriptor hits  IDID1 on write request Types else SUBP" type="bin">
+</bitfield>
+<bitfield start="20" size="1" name="WEN" description="Descriptor hit  IDID1 on write request Types else SUBP" type="bin">
+</bitfield>
+<bitfield start="19" size="17" name="IBASE" description="IO Memory Base" type="hex">
+</bitfield>
+<bitfield start="2" size="3" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+</msr>
+<msr address="0x4c00000f" type="rw" name="GLCP_DELAY_CONTROLS" description="GLCP I/O Delay Controls">
+<bitfield start="63" size="1" name="EN" description="Delay Settings Enable" type="dec">
+<value number="0" description="Use default values" />
+<value number="1" description="Use value in bits [62:0]" />
+</bitfield>
+<bitfield start="62" size="2" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="60" size="5" name="GIO" description="Delay Geode Companion Device" type="dec">
+</bitfield>
+<bitfield start="55" size="5" name="PCI_IN" description="Delay PCI Inputs" type="dec">
+</bitfield>
+<bitfield start="50" size="5" name="PCI_OUT" description="Delay PCI Outputs" type="dec">
+</bitfield>
+<bitfield start="45" size="5" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="40" size="5" name="DOTCLK" description="Delay Dot Clock" type="dec">
+</bitfield>
+<bitfield start="35" size="5" name="DRGB" description="Delay Digital RGBs" type="dec">
+</bitfield>
+<bitfield start="30" size="5" name="SDCLK_IN" description="Delay SDRAM Clock Input" type="dec">
+</bitfield>
+<bitfield start="25" size="5" name="SDCLK_OUT" description="Delay SDRAM Clock Output" type="dec">
+</bitfield>
+<bitfield start="20" size="5" name="MEM_CTL" description="Delay Memory Controls" type="dec">
+</bitfield>
+<bitfield start="15" size="9" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="6" size="1" name="MEM_ODDOUT" description="Delay Odd Memory Data Output Bits" type="dec">
+<value number="0" description="No Delay" />
+<value number="1" description="Delay" />
+</bitfield>
+<bitfield start="5" size="2" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="3" size="2" name="DQS_CLK_IN" description="Delay DQS Before Clocking Input" type="dec">
+</bitfield>
+<bitfield start="1" size="2" name="DQS_CLK_OUT" description="Delay DQS Before Clocking Output" type="dec">
+</bitfield>
+</msr>
+<msr address="0x4c000014" type="rw" name="GLCP_SYS_RSTPLL" description="GLCP System Reset and PLL Control">
+<bitfield start="63" size="19" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="44" size="4" name="MDIV" description="GLIU1 Divisor" type="bin">
+<value number="0" description="Divide by 2" />
+<value number="1" description="Divide by 3" />
+<value number="2" description="Divide by 4" />
+<value number="3" description="Divide by 5" />
+<value number="4" description="Divide by 6" />
+<value number="5" description="Divide by 7" />
+<value number="6" description="Divide by 8" />
+<value number="7" description="Divide by 9" />
+<value number="8" description="Divide by 10" />
+<value number="9" description="Divide by 11" />
+<value number="10" description="Divide by 12" />
+<value number="11" description="Divide by 13" />
+<value number="12" description="Divide by 14" />
+<value number="13" description="Divide by 15" />
+<value number="14" description="Divide by 16" />
+<value number="15" description="Divide by 17" />
+</bitfield>
+<bitfield start="40" size="3" name="VDIV" description="CPU Core Divisor" type="bin">
+<value number="0" description="Divide by 2" />
+<value number="1" description="Divide by 3" />
+<value number="2" description="Divide by 4" />
+<value number="3" description="Divide by 5" />
+<value number="4" description="Divide by 6" />
+<value number="5" description="Divide by 7" />
+<value number="6" description="Divide by 8" />
+<value number="7" description="Divide by 9" />
+</bitfield>
+<bitfield start="37" size="6" name="FBDIV" description="Feedback Devisor" type="dec">
+</bitfield>
+<bitfield start="31" size="6" name="SWFLAGS" description="Software Flags" type="bin">
+</bitfield>
+<bitfield start="25" size="1" name="LOCK" description="PLL Lock" type="dec">
+<value number="1" description="PLL locked" />
+<value number="0" description="PLL is not locked" />
+</bitfield>
+<bitfield start="24" size="1" name="LOCKWAIT" description="Lock Wait" type="dec">
+<value number="0" description="Disable" />
+<value number="1" description="Enable" />
+</bitfield>
+<bitfield start="23" size="8" name="HOLD_COUNT" description="Hold Count, divided by 16" type="dec">
+</bitfield>
+<bitfield start="15" size="1" name="BYPASS" description="PLL Bypass" type="dec">
+<value number="0" description="Use PLL as Clocksource" />
+<value number="1" description="Use DOTREF as Clocksource" />
+</bitfield>
+<bitfield start="14" size="1" name="PD" description="Power Down" type="dec">
+<value number="0" description="PLL active" />
+<value number="1" description="PLL in power down mode" />
+</bitfield>
+<bitfield start="13" size="1" name="RESETPLL" description="PLL Reset" type="dec">
+</bitfield>
+<bitfield start="12" size="2" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="10" size="1" name="DDRMODE" description="DDR Mode" type="dec">
+<value number="0" description="DDR communication enabled" />
+<value number="1" description="Reserved" />
+</bitfield>
+<bitfield start="9" size="1" name="VA_SEMI_SYNC_MODE" description="Synchronous CPU Core and GLIU1" type="dec">
+<value number="1" description="CPU does not use GLIU1 FIFO" />
+<value number="0" description="The GLIU1 FIFO is used by the CPU" />
+</bitfield>
+<bitfield start="8" size="1" name="PCI_SEMI_SYNC_MODE" description="Synchronous CPU Core and GLIU1" type="dec">
+<value number="1" description="PCI does not use mb_func_clk and pci_func_clk falling edges" />
+<value number="0" description="Falling edges on mb_func_clk and pci_func_clk are used by PCI" />
+</bitfield>
+<bitfield start="7" size="1" name="DSTALL" description="Debug Stall" type="dec">
+</bitfield>
+<bitfield start="6" size="3" name="BOOTSTRAP_STAT" description="Bootstrap Status" type="bin">
+</bitfield>
+<bitfield start="3" size="1" name="DOTPOSTDIV3" description="DOTPLL Post-Divide by 3" type="dec">
+</bitfield>
+<bitfield start="2" size="1" name="DOTPREMULT2" description="DOTPLL Pre-Multiply by 2" type="dec">
+</bitfield>
+<bitfield start="1" size="1" name="DOTPREDIV2" description="DOTPLL Pre-Divide by 2" type="dec">
+</bitfield>
+<bitfield start="0" size="1" name="CHIP_RESET" description="Chip Reset" type="dec">
+</bitfield>
+</msr>
+</msrarray>
Index: util/pygen/data/msr/geodelx.msr.xml
===================================================================
--- util/pygen/data/msr/geodelx.msr.xml	(revision 0)
+++ util/pygen/data/msr/geodelx.msr.xml	(revision 0)
@@ -0,0 +1,453 @@ 
+<?xml version="1.0" encoding="UTF-8"?><msrarray name="geodelx" description="what is this?">
+<cpu family="0x6" model="0x17" stepping="5" />
+<msr address="0x20000018" type="rw" name="MC_CF07_DATA" description="Refresh and SDRAM Program">
+<bitfield start="63" size="4" name="D1_SZ" description="DIMM1 Size" type="bin">
+<value number="0" description="Reserved" />
+<value number="1" description="8 MB" />
+<value number="2" description="16 MB" />
+<value number="3" description="32 MB" />
+<value number="4" description="64 MB" />
+<value number="5" description="128 MB" />
+<value number="6" description="256 MB" />
+<value number="7" description="512 MB" />
+<value number="8" description="1 GB" />
+<value number="9" description="Reserved" />
+<value number="10" description="Reserved" />
+<value number="11" description="Reserved" />
+<value number="12" description="Reserved" />
+<value number="13" description="Reserved" />
+<value number="14" description="Reserved" />
+<value number="15" description="Reserved" />
+</bitfield>
+<bitfield start="59" size="3" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="56" size="1" name="D1_MB" description="DIMM1 Module Banks" type="bin">
+<value number="0" description="1 Module bank" />
+<value number="1" description="2 Module banks" />
+</bitfield>
+<bitfield start="55" size="3" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="52" size="1" name="D1_CB" description="DIMM1 Component Banks" type="bin">
+<value number="0" description="2 Component banks" />
+<value number="1" description="4 Component banks" />
+</bitfield>
+<bitfield start="51" size="1" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="50" size="3" name="D1_PSZ" description="DIMM1 Page Size" type="bin">
+<value number="0" description="1 KB" />
+<value number="1" description="2 KB" />
+<value number="2" description="4 KB" />
+<value number="3" description="8 KB" />
+<value number="4" description="16 KB" />
+<value number="5" description="32 KB" />
+<value number="6" description="Reserved" />
+<value number="7" description="DIMM1 Not Installed" />
+</bitfield>
+<bitfield start="47" size="4" name="D0_SZ" description="DIMM0 Size" type="bin">
+<value number="0" description="Reserved" />
+<value number="1" description="8 MB" />
+<value number="2" description="16 MB" />
+<value number="3" description="32 MB" />
+<value number="4" description="64 MB" />
+<value number="5" description="128 MB" />
+<value number="6" description="256 MB" />
+<value number="7" description="512 MB" />
+<value number="8" description="1 GB" />
+<value number="9" description="Reserved" />
+<value number="10" description="Reserved" />
+<value number="11" description="Reserved" />
+<value number="12" description="Reserved" />
+<value number="13" description="Reserved" />
+<value number="14" description="Reserved" />
+<value number="15" description="Reserved" />
+</bitfield>
+<bitfield start="43" size="3" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="40" size="1" name="D0_MB" description="DIMM0 Module Banks" type="bin">
+<value number="0" description="1 Module bank" />
+<value number="1" description="2 Module banks" />
+</bitfield>
+<bitfield start="39" size="3" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="36" size="1" name="D0_CB" description="DIMM0 Component Banks" type="bin">
+<value number="0" description="2 Component banks" />
+<value number="1" description="4 Component banks" />
+</bitfield>
+<bitfield start="35" size="1" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="34" size="3" name="D0_PSZ" description="DIMM0 Page Size" type="bin">
+<value number="0" description="1 KB" />
+<value number="1" description="2 KB" />
+<value number="2" description="4 KB" />
+<value number="3" description="8 KB" />
+<value number="4" description="16 KB" />
+<value number="5" description="32 KB" />
+<value number="6" description="Reserved" />
+<value number="7" description="DIMM0 Not Installed" />
+</bitfield>
+<bitfield start="31" size="2" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="29" size="2" name="MSR_BA" description="Mode Register Set Bank Address" type="bin">
+<value number="0" description="Program the DIMM Mode Register" />
+<value number="1" description="Program the DIMM Extended Mode Register" />
+<value number="2" description="Reserved" />
+<value number="3" description="Reserved" />
+</bitfield>
+<bitfield start="27" size="1" name="RST_DLL" description="Mode Register Reset DLL" type="bin">
+<value number="0" description="Do not reset DLL" />
+<value number="1" description="Reset DLL" />
+</bitfield>
+<bitfield start="26" size="1" name="EMR_QFC" description="Extended Mode Register FET Control" type="bin">
+<value number="0" description="Enable" />
+<value number="1" description="Disable" />
+</bitfield>
+<bitfield start="25" size="1" name="EMR_DRV" description="Extended Mode Register Drive Strength Control" type="bin">
+<value number="0" description="Normal" />
+<value number="1" description="Reduced" />
+</bitfield>
+<bitfield start="24" size="1" name="EMR_DLL" description="Extended Mode Register DLL" type="bin">
+<value number="0" description="Enable" />
+<value number="1" description="Disable" />
+</bitfield>
+<bitfield start="23" size="16" name="REF_INT" description="Refresh Interval" type="dec">
+</bitfield>
+<bitfield start="7" size="4" name="REF_STAG" description="Refresh Staggering" type="dec">
+</bitfield>
+<bitfield start="3" size="1" name="REF_TST" description="Test Refresh" type="bin">
+</bitfield>
+<bitfield start="2" size="1" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="1" size="1" name="SOFT_RST" description="Software Reset" type="bin">
+</bitfield>
+<bitfield start="0" size="1" name="PROG_DRAM" description="Program Mode Register in SDRAM" type="bin">
+</bitfield>
+</msr>
+<msr address="0x20000019" type="rw" name="MC_CF8F_DATA" description="Timing and Mode Program">
+<bitfield start="63" size="8" name="STALE_REQ" description="GLIU Max Stale Request Count" type="dec">
+</bitfield>
+<bitfield start="55" size="3" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="52" size="2" name="XOR_BIT_SEL" description="XOR Bit Select" type="bin">
+<value number="0" description="ADDR[18]" />
+<value number="1" description="ADDR[19]" />
+<value number="2" description="ADDR[20]" />
+<value number="3" description="ADDR[21]" />
+</bitfield>
+<bitfield start="50" size="1" name="XOR_MB0" description="XOR MB0 Enable" type="bin">
+<value number="0" description="Disabled" />
+<value number="1" description="Enabled" />
+</bitfield>
+<bitfield start="49" size="1" name="XOR_BA1" description="XOR BA1 Enable" type="bin">
+<value number="0" description="Disabled" />
+<value number="1" description="Enabled" />
+</bitfield>
+<bitfield start="48" size="1" name="XOR_BA0" description="XOR BA0 Enable" type="bin">
+<value number="0" description="Disabled" />
+<value number="1" description="Enabled" />
+</bitfield>
+<bitfield start="47" size="6" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="41" size="1" name="TRUNC_DIS" description="Burst Truncate Disable" type="bin">
+<value number="0" description="Bursts Enabled" />
+<value number="1" description="Bursts Disabled" />
+</bitfield>
+<bitfield start="40" size="1" name="REORDER_DIS" description="Reorder Disable" type="bin">
+<value number="0" description="Reordering Enabled" />
+<value number="1" description="Reordering Disabled" />
+</bitfield>
+<bitfield start="39" size="6" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="33" size="1" name="HOI_LOI" description="High / Low Order Interleave Select" type="bin">
+<value number="0" description="Low Order Interleave" />
+<value number="1" description="High Order Interleave" />
+</bitfield>
+<bitfield start="32" size="1" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="31" size="1" name="THZ_DLY" description="tHZ Delay" type="bin">
+</bitfield>
+<bitfield start="30" size="3" name="CAS_LAT" description="Read CAS Latency" type="bin">
+<value number="0" description="Reserved" />
+<value number="1" description="Reserved" />
+<value number="2" description="2" />
+<value number="3" description="3" />
+<value number="4" description="4" />
+<value number="5" description="1.5" />
+<value number="6" description="2.5" />
+<value number="7" description="3.5" />
+</bitfield>
+<bitfield start="27" size="4" name="ACT2ACTREF" description="ACT to ACT/REF Period. tRC" type="dec">
+</bitfield>
+<bitfield start="23" size="4" name="ACT2PRE" description="ACT to PRE Period. tRAS" type="dec">
+</bitfield>
+<bitfield start="19" size="1" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="18" size="3" name="PRE2ACT" description="PRE to ACT Period. tRP" type="dec">
+</bitfield>
+<bitfield start="15" size="1" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="14" size="3" name="ACT2CMD" description="Delay Time from ACT to Read/Write. tRCD" type="dec">
+</bitfield>
+<bitfield start="11" size="4" name="ACT2ACT" description="ACT(0) to ACT(1) Period. tRRD" type="dec">
+</bitfield>
+<bitfield start="7" size="2" name="DPLWR" description="Data-in to PRE Period. tDPLW" type="dec">
+<value number="0" description="Invalid value" />
+<value number="1" description="1" />
+<value number="2" description="2" />
+<value number="3" description="3" />
+</bitfield>
+<bitfield start="5" size="2" name="DPLRD" description="Data-in to PRE Period. tDPLR" type="dec">
+<value number="0" description="Invalid value" />
+<value number="1" description="1" />
+<value number="2" description="2" />
+<value number="3" description="3" />
+</bitfield>
+<bitfield start="3" size="4" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+</msr>
+<msr address="0x2000001a" type="rw" name="MC_CF1017_DATA" description="Feature Enables">
+<bitfield start="63" size="34" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="29" size="2" name="WR_TO_RD" description="Write to Read Delay. tWTR" type="dec">
+</bitfield>
+<bitfield start="27" size="1" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="26" size="3" name="RD_TMG_CTL" description="Read Timing Control" type="dec">
+</bitfield>
+<bitfield start="23" size="3" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="20" size="5" name="REF2ACT" description="Refresh to Activate Delay. tRFC" type="dec">
+</bitfield>
+<bitfield start="15" size="8" name="PM1_UP_DLY" description="PMode1 Up Delay" type="dec">
+</bitfield>
+<bitfield start="7" size="5" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="2" size="3" name="WR2DAT" description="Write Command to Data Latency" type="dec">
+<value number="0" description="No delay" />
+<value number="1" description="1-clock delay for unbuffered DIMMs" />
+<value number="2" description="2-clock delay" />
+<value number="3" description="Invalid value" />
+</bitfield>
+</msr>
+<msr address="0x2000001b" type="ro" name="MC_CFPERF_CNT1" description="Performance Counters">
+<bitfield start="63" size="32" name="CNT0" description="Counter 0" type="dec">
+</bitfield>
+<bitfield start="31" size="32" name="CNT1" description="Counter 1" type="dec">
+</bitfield>
+</msr>
+<msr address="0x2000001c" type="rw" name="MC_PERFCNT2" description="Counter and CAS Control">
+<bitfield start="63" size="28" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="35" size="1" name="STOP_CNT1" description="Stop Counter 1" type="dec">
+</bitfield>
+<bitfield start="34" size="1" name="RST_CNT1" description="Reset Counter 1" type="dec">
+</bitfield>
+<bitfield start="33" size="1" name="STOP_CNT0" description="Stop Counter 0" type="dec">
+</bitfield>
+<bitfield start="32" size="1" name="RST_CNT0" description="Reset Counter 0" type="dec">
+</bitfield>
+<bitfield start="31" size="32" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+</msr>
+<msr address="0x2000001d" type="rw" name="MC_CFCLK_DBUG" description="Clocking and Debug">
+<bitfield start="63" size="29" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="34" size="1" name="B2B_DIS" description="Back-to-Back Command Disable" type="bin">
+<value number="0" description="Allow back-to-back commands" />
+<value number="1" description="Disable back-to-back commands" />
+</bitfield>
+<bitfield start="33" size="1" name="MTEST_RBEX_EN" description="MTEST RBEX Enable" type="bin">
+<value number="0" description="Disable" />
+<value number="1" description="Enable" />
+</bitfield>
+<bitfield start="32" size="1" name="MTEST_EN" description="MTEST Enable" type="bin">
+<value number="0" description="Disable" />
+<value number="1" description="Enable" />
+</bitfield>
+<bitfield start="31" size="15" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="16" size="1" name="FORCE_PRE" description="Force Precharge-all" type="bin">
+<value number="0" description="Disable" />
+<value number="1" description="Enable" />
+</bitfield>
+<bitfield start="15" size="3" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="12" size="1" name="TRISTATE_DIS" description="TRI-STATE Disable" type="bin">
+<value number="0" description="Tri-stating enabled" />
+<value number="1" description="Tri-stating disabled" />
+</bitfield>
+<bitfield start="11" size="2" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="9" size="1" name="MASK_CKE1" description="CKE1 Mask" type="bin">
+<value number="0" description="CKE1 output enable unmasked" />
+<value number="1" description="CKE1 output enable masked" />
+</bitfield>
+<bitfield start="8" size="1" name="MASK_CKE0" description="CKE0 Mask" type="bin">
+<value number="0" description="CKE0 output enable unmasked" />
+<value number="1" description="CKE0 output enable masked" />
+</bitfield>
+<bitfield start="7" size="1" name="CNTL_MSK1" description="Control Mask 1" type="bin">
+<value number="0" description="DIMM1 CAS1# RAS1# WE1# CS[3:2]# output enable unmasked" />
+<value number="1" description="DIMM1 CAS1# RAS1# WE1# CS[3:2]# output enable masked" />
+</bitfield>
+<bitfield start="6" size="1" name="CNTL_MSK0" description="Control Mask 0" type="bin">
+<value number="0" description="DIMM0 CAS0# RAS0# WE0# CS[1:0]# output enable unmasked" />
+<value number="1" description="DIMM0 CAS0# RAS0# WE0# CS[1:0]# output enable masked" />
+</bitfield>
+<bitfield start="5" size="1" name="ADRS_MSK" description="Address Mask" type="bin">
+<value number="0" description="MA and BA output enable unmasked" />
+<value number="1" description="MA and BA output enable masked" />
+</bitfield>
+<bitfield start="4" size="5" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+</msr>
+<msr address="0x4c00000f" type="rw" name="GLCP_DELAY_CONTROLS" description="GLCP I/O Delay Controls">
+<bitfield start="63" size="1" name="EN" description="Enable" type="dec">
+<value number="0" description="Use default values" />
+<value number="1" description="Use value in bits [62:0]" />
+</bitfield>
+<bitfield start="62" size="1" name="B_DQ" description="Buffer Control for DQ DQS DQM TLA drive" type="dec">
+<value number="1" description="Half power" />
+<value number="0" description="Quarter power" />
+</bitfield>
+<bitfield start="61" size="1" name="B_CMD" description="Buffer Control for RAS CAS CKE CS WE drive" type="dec">
+<value number="1" description="Half power" />
+<value number="0" description="Quarter power" />
+</bitfield>
+<bitfield start="60" size="1" name="B_MA" description="Buffer Control for MA BA drive" type="dec">
+<value number="0" description="Half power" />
+<value number="1" description="Full power" />
+</bitfield>
+<bitfield start="59" size="1" name="SDCLK_SET" description="SDCLK Setup" type="dec">
+<value number="0" description="Full SDCLK setup" />
+<value number="1" description="Half SDCLK setup for control signals" />
+</bitfield>
+<bitfield start="58" size="3" name="DDR_RLE" description="DDR read latch enable position" type="dec">
+</bitfield>
+<bitfield start="55" size="1" name="SDCLK_DIS" description="SDCLK disable [1,3,5]" type="dec">
+<value number="0" description="All SDCLK output" />
+<value number="1" description="SDCLK[0,2,4] output only" />
+</bitfield>
+<bitfield start="54" size="3" name="TLA1_OA" description="TLA hint pin output adjust" type="dec">
+</bitfield>
+<bitfield start="51" size="2" name="D_TLA1" description="Output delay for TLA1" type="dec">
+</bitfield>
+<bitfield start="49" size="2" name="D_TLA0" description="Output delay for TLA0" type="dec">
+</bitfield>
+<bitfield start="47" size="2" name="D_DQ_E" description="Output delay for DQ DQM - even byte lanes" type="dec">
+</bitfield>
+<bitfield start="45" size="2" name="D_DQ_O" description="Output delay for DQ DQM - odd byte lanes" type="dec">
+</bitfield>
+<bitfield start="43" size="2" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="41" size="2" name="D_SDCLK" description="Output delay for SDCLK" type="dec">
+</bitfield>
+<bitfield start="39" size="2" name="D_CMD_O" description="Output delay for CKE CS RAS CAS WE - odd bits" type="dec">
+</bitfield>
+<bitfield start="37" size="2" name="D_CMD_E" description="Output delay for CKE CS RAS CAS WE - even bits" type="dec">
+</bitfield>
+<bitfield start="35" size="2" name="D_MA_O" description="Output delay for BA MA - odd bits" type="dec">
+</bitfield>
+<bitfield start="33" size="2" name="D_MA_E" description="Output delay for BA MA - even bits" type="dec">
+</bitfield>
+<bitfield start="31" size="2" name="D_PCI_O" description="Output delay for pci_ad IRQ13 SUSPA# INTA# - odd bits" type="dec">
+</bitfield>
+<bitfield start="29" size="2" name="D_PCI_E" description="Output delay for pci_ad IRQ13 SUSPA# INTA# - even bits" type="dec">
+</bitfield>
+<bitfield start="27" size="2" name="D_DOTCLK" description="Output delay for DOTCLK" type="dec">
+</bitfield>
+<bitfield start="25" size="2" name="D_DRGB_O" description="Output delay for DRGB[31:0] - odd bits" type="dec">
+</bitfield>
+<bitfield start="23" size="2" name="D_DRGB_E" description="Output delay for DRGB[31:0] HSYNC VSYNC DISPEN VDDEN LDE_MOD - even bits" type="dec">
+</bitfield>
+<bitfield start="21" size="2" name="D_PCI_IN" description="Input delay for pci_ad CBE# PAR STOP# FRAME# IRDY# TRDY# DEVSEL# REQ# GNT# CIS" type="dec">
+</bitfield>
+<bitfield start="19" size="2" name="D_TDBGI" description="Input delay for TDBGI" type="dec">
+</bitfield>
+<bitfield start="17" size="2" name="D_VIP" description="Input delay for VID[15:0] VIP_HSYNC VIP_VSYNC" type="dec">
+</bitfield>
+<bitfield start="15" size="2" name="D_VIPCLK" description="Input delay for VIPCLK" type="dec">
+</bitfield>
+<bitfield start="13" size="1" name="H_SDCLK" description="Half SDCLK hold select (for cmd addr)" type="dec">
+<value number="1" description="Half SDCLK setup for MA and BA" />
+<value number="0" description="Full SDCLK setup" />
+</bitfield>
+<bitfield start="12" size="2" name="PLL_FD_DEL" description="PLL Feedback Delay" type="bin">
+<value number="0" description="No feedback delay" />
+<value number="1" description="~350 ps" />
+<value number="2" description="~700 ps" />
+<value number="3" description="~1100 ps (Max feedback delay)" />
+</bitfield>
+<bitfield start="10" size="5" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="5" size="1" name="DLL_OV" description="DLL Override (to DLL)" type="dec">
+</bitfield>
+<bitfield start="4" size="5" name="DLL_OVS/RSDA" description="DLL Override Setting or Read Strobe Delay Adjust" type="dec">
+</bitfield>
+</msr>
+<msr address="0x4c000014" type="rw" name="GLCP_SYS_RSTPLL" description="GLCP System Reset and PLL Control">
+<bitfield start="63" size="20" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="43" size="5" name="GLIUMULT" description="GLIU Multiplier" type="dec">
+</bitfield>
+<bitfield start="38" size="1" name="GLIUDIV" description="GLIU Divide" type="dec">
+<value number="0" description="Do not predivide input" />
+<value number="1" description="Divide by 2" />
+</bitfield>
+<bitfield start="37" size="5" name="COREMULT" description="CPU Core Multiplier" type="dec">
+</bitfield>
+<bitfield start="32" size="1" name="COREDIV" description="CPU Core Divide" type="dec">
+<value number="0" description="Do not predivide input" />
+<value number="1" description="Divide by 2" />
+</bitfield>
+<bitfield start="31" size="6" name="SWFLAGS" description="Flags" type="bin">
+</bitfield>
+<bitfield start="25" size="1" name="GLIULOCK" description="GLIU PLL Lock" type="dec">
+<value number="1" description="PLL locked" />
+<value number="0" description="PLL is not locked" />
+</bitfield>
+<bitfield start="24" size="1" name="CORELOCK" description="CPU Core PLL Lock" type="dec">
+<value number="1" description="PLL locked" />
+<value number="0" description="PLL is not locked" />
+</bitfield>
+<bitfield start="23" size="8" name="HOLD_COUNT" description="Hold Count, divided by 16" type="dec">
+</bitfield>
+<bitfield start="15" size="1" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="14" size="1" name="GLIUPD" description="GLIU PLL Power Down mode" type="dec">
+</bitfield>
+<bitfield start="13" size="1" name="COREPD" description="CPU Core PLL Power Down mode" type="dec">
+</bitfield>
+<bitfield start="12" size="1" name="GLIUBYPASS" description="GLIU PLL Bypass" type="dec">
+<value number="1" description="DOTREF input directly drives the GLIU clock spines" />
+<value number="0" description="DOTPLL drives the GLIU clock" />
+</bitfield>
+<bitfield start="11" size="1" name="COREBYPASS" description="CPU Core PLL Bypass" type="dec">
+<value number="1" description="DOTREF input directly drives the CPU Core clock" />
+<value number="0" description="DOTPLL drives the CPU Core clock" />
+</bitfield>
+<bitfield start="10" size="1" name="LPFEN" description="Loop Filter" type="dec">
+<value number="1" description="Enabled" />
+<value number="0" description="Disabled" />
+</bitfield>
+<bitfield start="9" size="1" name="VA_SEMI_SYNC_MODE" description="CPU-GLIU Sync Mode" type="dec">
+<value number="1" description="CPU does not use GLIU FIFO" />
+<value number="0" description="The GLIU FIFO is used by the CPU" />
+</bitfield>
+<bitfield start="8" size="1" name="PCI_SEMI_SYNC_MODE" description="PCI-GLIU Sync Mode" type="dec">
+<value number="1" description="PCI does not use mb_func_clk and pci_func_clk falling edges" />
+<value number="0" description="Falling edges on mb_func_clk and pci_func_clk are used by PCI" />
+</bitfield>
+<bitfield start="7" size="1" name="BOOTSTRAP_PW1" description="PW1 bootstrap" type="dec">
+<value number="1" description="66MHz PCI clock" />
+<value number="0" description="33MHz PCI clock" />
+</bitfield>
+<bitfield start="6" size="1" name="BOOTSTRAP_IRQ13" description="IRQ13 bootstrap" type="dec">
+<value number="1" description="Stall-on-reset debug feature enabled" />
+<value number="0" description="No stall" />
+</bitfield>
+<bitfield start="5" size="5" name="BOOTSTRAPS" description="CPU/GLIU frequency select" type="bin">
+</bitfield>
+<bitfield start="0" size="1" name="CHIP_RESET" description="Chip Reset" type="dec">
+</bitfield>
+</msr>
+</msrarray>
Index: util/pygen/data/msr/cs5536.msr.xml
===================================================================
--- util/pygen/data/msr/cs5536.msr.xml	(revision 0)
+++ util/pygen/data/msr/cs5536.msr.xml	(revision 0)
@@ -0,0 +1,1166 @@ 
+<?xml version="1.0" encoding="UTF-8"?><msrarray name="cs5536" description="dont seen before">
+<cpu family="0x6" model="0x17" stepping="5" />
+<msr address="0x51400008" type="rw" name="DIVIL_LBAR_IRQ" description="Local BAR - IRQ Mapper">
+<bitfield start="63" size="15" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="48" size="1" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="47" size="4" name="IO_MASK" description="I/O Address Mask Value" type="bin">
+</bitfield>
+<bitfield start="43" size="11" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="32" size="1" name="LBAR_EN" description="LBAR Enable" type="bin">
+<value number="0" description="Disable LBAR" />
+<value number="1" description="Enable LBAR" />
+</bitfield>
+<bitfield start="31" size="15" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="16" size="1" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="15" size="11" name="BASE_ADDR" description="Base Address in I/O Space" type="hex">
+</bitfield>
+<bitfield start="4" size="5" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+</msr>
+<msr address="0x51400009" type="rw" name="DIVIL_LBAR_KEL" description="Local BAR - Keyboard Emulation Logic from USB">
+<bitfield start="63" size="20" name="MEM_MASK" description="Memory Address Mask Value" type="hex">
+</bitfield>
+<bitfield start="43" size="11" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="32" size="1" name="LBAR_EN" description="LBAR Enable" type="bin">
+<value number="0" description="Disable LBAR" />
+<value number="1" description="Enable LBAR" />
+</bitfield>
+<bitfield start="31" size="20" name="BASE_ADDR" description="Base Address in Memory Space" type="hex">
+</bitfield>
+<bitfield start="11" size="12" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+</msr>
+<msr address="0x5140000b" type="rw" name="DIVIL_LBAR_SMB" description="Local BAR - System Management Bus">
+<bitfield start="63" size="15" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="48" size="1" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="47" size="4" name="IO_MASK" description="I/O Address Mask Value" type="bin">
+</bitfield>
+<bitfield start="43" size="11" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="32" size="1" name="LBAR_EN" description="LBAR Enable" type="bin">
+<value number="0" description="Disable LBAR" />
+<value number="1" description="Enable LBAR" />
+</bitfield>
+<bitfield start="31" size="15" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="16" size="1" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="15" size="8" name="BASE_ADDR" description="Base Address in I/O Space" type="hex">
+</bitfield>
+<bitfield start="7" size="8" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+</msr>
+<msr address="0x5140000c" type="rw" name="DIVIL_LBAR_GPIO" description="Local BAR - GPIO and Input Conditioning Functions">
+<bitfield start="63" size="15" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="48" size="1" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="47" size="4" name="IO_MASK" description="I/O Address Mask Value" type="bin">
+</bitfield>
+<bitfield start="43" size="11" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="32" size="1" name="LBAR_EN" description="LBAR Enable" type="bin">
+<value number="0" description="Disable LBAR" />
+<value number="1" description="Enable LBAR" />
+</bitfield>
+<bitfield start="31" size="15" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="16" size="1" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="15" size="8" name="BASE_ADDR" description="Base Address in I/O Space" type="hex">
+</bitfield>
+<bitfield start="7" size="8" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+</msr>
+<msr address="0x5140000d" type="rw" name="DIVIL_LBAR_MFGPT" description="Local BAR - MFGPTs">
+<bitfield start="63" size="15" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="48" size="1" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="47" size="4" name="IO_MASK" description="I/O Address Mask Value" type="bin">
+</bitfield>
+<bitfield start="43" size="11" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="32" size="1" name="LBAR_EN" description="LBAR Enable" type="bin">
+<value number="0" description="Disable LBAR" />
+<value number="1" description="Enable LBAR" />
+</bitfield>
+<bitfield start="31" size="15" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="16" size="1" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="15" size="8" name="BASE_ADDR" description="Base Address in I/O Space" type="hex">
+</bitfield>
+<bitfield start="7" size="8" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+</msr>
+<msr address="0x5140000e" type="rw" name="DIVIL_LBAR_ACPI" description="Local BAR - ACPI">
+<bitfield start="63" size="15" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="48" size="1" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="47" size="4" name="IO_MASK" description="I/O Address Mask Value" type="bin">
+</bitfield>
+<bitfield start="43" size="11" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="32" size="1" name="LBAR_EN" description="LBAR Enable" type="bin">
+<value number="0" description="Disable LBAR" />
+<value number="1" description="Enable LBAR" />
+</bitfield>
+<bitfield start="31" size="15" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="16" size="1" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="15" size="8" name="BASE_ADDR" description="Base Address in I/O Space" type="hex">
+</bitfield>
+<bitfield start="7" size="8" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+</msr>
+<msr address="0x5140000f" type="rw" name="DIVIL_LBAR_PMS" description="Local BAR - Power Management Support">
+<bitfield start="63" size="15" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="48" size="1" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="47" size="4" name="IO_MASK" description="I/O Address Mask Value" type="bin">
+</bitfield>
+<bitfield start="43" size="11" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="32" size="1" name="LBAR_EN" description="LBAR Enable" type="bin">
+<value number="0" description="Disable LBAR" />
+<value number="1" description="Enable LBAR" />
+</bitfield>
+<bitfield start="31" size="15" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="16" size="1" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="15" size="9" name="BASE_ADDR" description="Base Address in I/O Space" type="hex">
+</bitfield>
+<bitfield start="6" size="7" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+</msr>
+<msr address="0x51400015" type="rw" name="DIVIL_BALL_OPTS" description="Ball Options Control">
+<bitfield start="63" size="32" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="31" size="20" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="11" size="2" name="SEC_BOOT_LOC" description="Secondary Boot Location" type="bin">
+<value number="0" description="LPC ROM" />
+<value number="2" description="NOR Flash on IDE" />
+<value number="3" description="Firmware Hub" />
+</bitfield>
+<bitfield start="9" size="2" name="BOOT_OP_LATCHED" description="Latched Value of Boot Option" type="bin">
+<value number="0" description="LPC ROM" />
+<value number="2" description="NOR Flash on IDE" />
+<value number="3" description="Firmware Hub" />
+</bitfield>
+<bitfield start="7" size="1" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="6" size="1" name="PIN_OPT_LALL" description="All LPC Pin Option Selection" type="bin">
+<value number="0" description="All LPC pins become GPIOs including LPC_DRQ# and LPC_SERIRQ" />
+<value number="1" description="All LPC pins are controlled by the LPC controller except LPC_DRQ# and LPC_SERIRQ (bits [5:4])" />
+</bitfield>
+<bitfield start="5" size="1" name="PIN_OPT_LIRQ" description="LPC_SERIRQ or GPIO21 Pin Option Selection" type="bin">
+<value number="0" description="Ball G2 is GPIO21" />
+<value number="1" description="Ball G2 functions as LPC_SERIRQ" />
+</bitfield>
+<bitfield start="4" size="1" name="PIN_OPT_LDRQ" description="LPC_DRQ# or GPIO20 Pin Option Selection" type="bin">
+<value number="0" description="Ball G1 is GPIO20" />
+<value number="1" description="Ball G1 functions as LPC_DRQ#" />
+</bitfield>
+<bitfield start="3" size="2" name="PRI_BOOT_LOC" description="Primary Boot Location" type="bin">
+<value number="0" description="LPC ROM" />
+<value number="2" description="NOR Flash on IDE" />
+<value number="3" description="Firmware Hub" />
+</bitfield>
+<bitfield start="1" size="1" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="0" size="1" name="PIN_OPT_IDE" description="IDE or Flash Controller Pin Function Selection" type="bin">
+<value number="0" description="All IDE pins associated with Flash Controller" />
+<value number="1" description="All IDE pins associated with IDE Controller" />
+</bitfield>
+</msr>
+<msr address="0x51400020" type="rw" name="PIC_YSEL_LOW" description="IRQ Mapper Unrestricted Y Select Low">
+<bitfield start="63" size="32" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="31" size="4" name="MAP_Y7" description="Map Unrestricted Y Input 7" type="bin">
+<value number="0" description="Disable" />
+<value number="1" description="Interrupt Group 1" />
+<value number="2" description="Interrupt Group 2" />
+<value number="3" description="Interrupt Group 3" />
+<value number="4" description="Interrupt Group 4" />
+<value number="5" description="Interrupt Group 5" />
+<value number="6" description="Interrupt Group 6" />
+<value number="7" description="Interrupt Group 7" />
+<value number="8" description="Interrupt Group 8" />
+<value number="9" description="Interrupt Group 9" />
+<value number="10" description="Interrupt Group 10" />
+<value number="11" description="Interrupt Group 11" />
+<value number="12" description="Interrupt Group 12" />
+<value number="13" description="Interrupt Group 13" />
+<value number="14" description="Interrupt Group 14" />
+<value number="15" description="Interrupt Group 15" />
+</bitfield>
+<bitfield start="27" size="4" name="MAP_Y6" description="Map Unrestricted Y Input 6" type="bin">
+<value number="0" description="Disable" />
+<value number="1" description="Interrupt Group 1" />
+<value number="2" description="Interrupt Group 2" />
+<value number="3" description="Interrupt Group 3" />
+<value number="4" description="Interrupt Group 4" />
+<value number="5" description="Interrupt Group 5" />
+<value number="6" description="Interrupt Group 6" />
+<value number="7" description="Interrupt Group 7" />
+<value number="8" description="Interrupt Group 8" />
+<value number="9" description="Interrupt Group 9" />
+<value number="10" description="Interrupt Group 10" />
+<value number="11" description="Interrupt Group 11" />
+<value number="12" description="Interrupt Group 12" />
+<value number="13" description="Interrupt Group 13" />
+<value number="14" description="Interrupt Group 14" />
+<value number="15" description="Interrupt Group 15" />
+</bitfield>
+<bitfield start="23" size="4" name="MAP_Y5" description="Map Unrestricted Y Input 5" type="bin">
+<value number="0" description="Disable" />
+<value number="1" description="Interrupt Group 1" />
+<value number="2" description="Interrupt Group 2" />
+<value number="3" description="Interrupt Group 3" />
+<value number="4" description="Interrupt Group 4" />
+<value number="5" description="Interrupt Group 5" />
+<value number="6" description="Interrupt Group 6" />
+<value number="7" description="Interrupt Group 7" />
+<value number="8" description="Interrupt Group 8" />
+<value number="9" description="Interrupt Group 9" />
+<value number="10" description="Interrupt Group 10" />
+<value number="11" description="Interrupt Group 11" />
+<value number="12" description="Interrupt Group 12" />
+<value number="13" description="Interrupt Group 13" />
+<value number="14" description="Interrupt Group 14" />
+<value number="15" description="Interrupt Group 15" />
+</bitfield>
+<bitfield start="19" size="4" name="MAP_Y4" description="Map Unrestricted Y Input 4" type="bin">
+<value number="0" description="Disable" />
+<value number="1" description="Interrupt Group 1" />
+<value number="2" description="Interrupt Group 2" />
+<value number="3" description="Interrupt Group 3" />
+<value number="4" description="Interrupt Group 4" />
+<value number="5" description="Interrupt Group 5" />
+<value number="6" description="Interrupt Group 6" />
+<value number="7" description="Interrupt Group 7" />
+<value number="8" description="Interrupt Group 8" />
+<value number="9" description="Interrupt Group 9" />
+<value number="10" description="Interrupt Group 10" />
+<value number="11" description="Interrupt Group 11" />
+<value number="12" description="Interrupt Group 12" />
+<value number="13" description="Interrupt Group 13" />
+<value number="14" description="Interrupt Group 14" />
+<value number="15" description="Interrupt Group 15" />
+</bitfield>
+<bitfield start="15" size="4" name="MAP_Y3" description="Map Unrestricted Y Input 3" type="bin">
+<value number="0" description="Disable" />
+<value number="1" description="Interrupt Group 1" />
+<value number="2" description="Interrupt Group 2" />
+<value number="3" description="Interrupt Group 3" />
+<value number="4" description="Interrupt Group 4" />
+<value number="5" description="Interrupt Group 5" />
+<value number="6" description="Interrupt Group 6" />
+<value number="7" description="Interrupt Group 7" />
+<value number="8" description="Interrupt Group 8" />
+<value number="9" description="Interrupt Group 9" />
+<value number="10" description="Interrupt Group 10" />
+<value number="11" description="Interrupt Group 11" />
+<value number="12" description="Interrupt Group 12" />
+<value number="13" description="Interrupt Group 13" />
+<value number="14" description="Interrupt Group 14" />
+<value number="15" description="Interrupt Group 15" />
+</bitfield>
+<bitfield start="11" size="4" name="MAP_Y2" description="Map Unrestricted Y Input 2" type="bin">
+<value number="0" description="Disable" />
+<value number="1" description="Interrupt Group 1" />
+<value number="2" description="Interrupt Group 2" />
+<value number="3" description="Interrupt Group 3" />
+<value number="4" description="Interrupt Group 4" />
+<value number="5" description="Interrupt Group 5" />
+<value number="6" description="Interrupt Group 6" />
+<value number="7" description="Interrupt Group 7" />
+<value number="8" description="Interrupt Group 8" />
+<value number="9" description="Interrupt Group 9" />
+<value number="10" description="Interrupt Group 10" />
+<value number="11" description="Interrupt Group 11" />
+<value number="12" description="Interrupt Group 12" />
+<value number="13" description="Interrupt Group 13" />
+<value number="14" description="Interrupt Group 14" />
+<value number="15" description="Interrupt Group 15" />
+</bitfield>
+<bitfield start="7" size="4" name="MAP_Y1" description="Map Unrestricted Y Input 1" type="bin">
+<value number="0" description="Disable" />
+<value number="1" description="Interrupt Group 1" />
+<value number="2" description="Interrupt Group 2" />
+<value number="3" description="Interrupt Group 3" />
+<value number="4" description="Interrupt Group 4" />
+<value number="5" description="Interrupt Group 5" />
+<value number="6" description="Interrupt Group 6" />
+<value number="7" description="Interrupt Group 7" />
+<value number="8" description="Interrupt Group 8" />
+<value number="9" description="Interrupt Group 9" />
+<value number="10" description="Interrupt Group 10" />
+<value number="11" description="Interrupt Group 11" />
+<value number="12" description="Interrupt Group 12" />
+<value number="13" description="Interrupt Group 13" />
+<value number="14" description="Interrupt Group 14" />
+<value number="15" description="Interrupt Group 15" />
+</bitfield>
+<bitfield start="3" size="4" name="MAP_Y0" description="Map Unrestricted Y Input 0" type="bin">
+<value number="0" description="Disable" />
+<value number="1" description="Interrupt Group 1" />
+<value number="2" description="Interrupt Group 2" />
+<value number="3" description="Interrupt Group 3" />
+<value number="4" description="Interrupt Group 4" />
+<value number="5" description="Interrupt Group 5" />
+<value number="6" description="Interrupt Group 6" />
+<value number="7" description="Interrupt Group 7" />
+<value number="8" description="Interrupt Group 8" />
+<value number="9" description="Interrupt Group 9" />
+<value number="10" description="Interrupt Group 10" />
+<value number="11" description="Interrupt Group 11" />
+<value number="12" description="Interrupt Group 12" />
+<value number="13" description="Interrupt Group 13" />
+<value number="14" description="Interrupt Group 14" />
+<value number="15" description="Interrupt Group 15" />
+</bitfield>
+</msr>
+<msr address="0x51400021" type="rw" name="PIC_YSEL_HIGH" description="IRQ Mapper Unrestricted Y Select High">
+<bitfield start="63" size="32" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="31" size="4" name="MAP_Y15" description="Map Unrestricted Y Input 15" type="bin">
+<value number="0" description="Disable" />
+<value number="1" description="Interrupt Group 1" />
+<value number="2" description="Interrupt Group 2" />
+<value number="3" description="Interrupt Group 3" />
+<value number="4" description="Interrupt Group 4" />
+<value number="5" description="Interrupt Group 5" />
+<value number="6" description="Interrupt Group 6" />
+<value number="7" description="Interrupt Group 7" />
+<value number="8" description="Interrupt Group 8" />
+<value number="9" description="Interrupt Group 9" />
+<value number="10" description="Interrupt Group 10" />
+<value number="11" description="Interrupt Group 11" />
+<value number="12" description="Interrupt Group 12" />
+<value number="13" description="Interrupt Group 13" />
+<value number="14" description="Interrupt Group 14" />
+<value number="15" description="Interrupt Group 15" />
+</bitfield>
+<bitfield start="27" size="4" name="MAP_Y14" description="Map Unrestricted Y Input 14" type="bin">
+<value number="0" description="Disable" />
+<value number="1" description="Interrupt Group 1" />
+<value number="2" description="Interrupt Group 2" />
+<value number="3" description="Interrupt Group 3" />
+<value number="4" description="Interrupt Group 4" />
+<value number="5" description="Interrupt Group 5" />
+<value number="6" description="Interrupt Group 6" />
+<value number="7" description="Interrupt Group 7" />
+<value number="8" description="Interrupt Group 8" />
+<value number="9" description="Interrupt Group 9" />
+<value number="10" description="Interrupt Group 10" />
+<value number="11" description="Interrupt Group 11" />
+<value number="12" description="Interrupt Group 12" />
+<value number="13" description="Interrupt Group 13" />
+<value number="14" description="Interrupt Group 14" />
+<value number="15" description="Interrupt Group 15" />
+</bitfield>
+<bitfield start="23" size="4" name="MAP_Y13" description="Map Unrestricted Y Input 13" type="bin">
+<value number="0" description="Disable" />
+<value number="1" description="Interrupt Group 1" />
+<value number="2" description="Interrupt Group 2" />
+<value number="3" description="Interrupt Group 3" />
+<value number="4" description="Interrupt Group 4" />
+<value number="5" description="Interrupt Group 5" />
+<value number="6" description="Interrupt Group 6" />
+<value number="7" description="Interrupt Group 7" />
+<value number="8" description="Interrupt Group 8" />
+<value number="9" description="Interrupt Group 9" />
+<value number="10" description="Interrupt Group 10" />
+<value number="11" description="Interrupt Group 11" />
+<value number="12" description="Interrupt Group 12" />
+<value number="13" description="Interrupt Group 13" />
+<value number="14" description="Interrupt Group 14" />
+<value number="15" description="Interrupt Group 15" />
+</bitfield>
+<bitfield start="19" size="4" name="MAP_Y12" description="Map Unrestricted Y Input 12" type="bin">
+<value number="0" description="Disable" />
+<value number="1" description="Interrupt Group 1" />
+<value number="2" description="Interrupt Group 2" />
+<value number="3" description="Interrupt Group 3" />
+<value number="4" description="Interrupt Group 4" />
+<value number="5" description="Interrupt Group 5" />
+<value number="6" description="Interrupt Group 6" />
+<value number="7" description="Interrupt Group 7" />
+<value number="8" description="Interrupt Group 8" />
+<value number="9" description="Interrupt Group 9" />
+<value number="10" description="Interrupt Group 10" />
+<value number="11" description="Interrupt Group 11" />
+<value number="12" description="Interrupt Group 12" />
+<value number="13" description="Interrupt Group 13" />
+<value number="14" description="Interrupt Group 14" />
+<value number="15" description="Interrupt Group 15" />
+</bitfield>
+<bitfield start="15" size="4" name="MAP_Y11" description="Map Unrestricted Y Input 11" type="bin">
+<value number="0" description="Disable" />
+<value number="1" description="Interrupt Group 1" />
+<value number="2" description="Interrupt Group 2" />
+<value number="3" description="Interrupt Group 3" />
+<value number="4" description="Interrupt Group 4" />
+<value number="5" description="Interrupt Group 5" />
+<value number="6" description="Interrupt Group 6" />
+<value number="7" description="Interrupt Group 7" />
+<value number="8" description="Interrupt Group 8" />
+<value number="9" description="Interrupt Group 9" />
+<value number="10" description="Interrupt Group 10" />
+<value number="11" description="Interrupt Group 11" />
+<value number="12" description="Interrupt Group 12" />
+<value number="13" description="Interrupt Group 13" />
+<value number="14" description="Interrupt Group 14" />
+<value number="15" description="Interrupt Group 15" />
+</bitfield>
+<bitfield start="11" size="4" name="MAP_Y10" description="Map Unrestricted Y Input 10" type="bin">
+<value number="0" description="Disable" />
+<value number="1" description="Interrupt Group 1" />
+<value number="2" description="Interrupt Group 2" />
+<value number="3" description="Interrupt Group 3" />
+<value number="4" description="Interrupt Group 4" />
+<value number="5" description="Interrupt Group 5" />
+<value number="6" description="Interrupt Group 6" />
+<value number="7" description="Interrupt Group 7" />
+<value number="8" description="Interrupt Group 8" />
+<value number="9" description="Interrupt Group 9" />
+<value number="10" description="Interrupt Group 10" />
+<value number="11" description="Interrupt Group 11" />
+<value number="12" description="Interrupt Group 12" />
+<value number="13" description="Interrupt Group 13" />
+<value number="14" description="Interrupt Group 14" />
+<value number="15" description="Interrupt Group 15" />
+</bitfield>
+<bitfield start="7" size="4" name="MAP_Y9" description="Map Unrestricted Y Input 9" type="bin">
+<value number="0" description="Disable" />
+<value number="1" description="Interrupt Group 1" />
+<value number="2" description="Interrupt Group 2" />
+<value number="3" description="Interrupt Group 3" />
+<value number="4" description="Interrupt Group 4" />
+<value number="5" description="Interrupt Group 5" />
+<value number="6" description="Interrupt Group 6" />
+<value number="7" description="Interrupt Group 7" />
+<value number="8" description="Interrupt Group 8" />
+<value number="9" description="Interrupt Group 9" />
+<value number="10" description="Interrupt Group 10" />
+<value number="11" description="Interrupt Group 11" />
+<value number="12" description="Interrupt Group 12" />
+<value number="13" description="Interrupt Group 13" />
+<value number="14" description="Interrupt Group 14" />
+<value number="15" description="Interrupt Group 15" />
+</bitfield>
+<bitfield start="3" size="4" name="MAP_Y8" description="Map Unrestricted Y Input 8" type="bin">
+<value number="0" description="Disable" />
+<value number="1" description="Interrupt Group 1" />
+<value number="2" description="Interrupt Group 2" />
+<value number="3" description="Interrupt Group 3" />
+<value number="4" description="Interrupt Group 4" />
+<value number="5" description="Interrupt Group 5" />
+<value number="6" description="Interrupt Group 6" />
+<value number="7" description="Interrupt Group 7" />
+<value number="8" description="Interrupt Group 8" />
+<value number="9" description="Interrupt Group 9" />
+<value number="10" description="Interrupt Group 10" />
+<value number="11" description="Interrupt Group 11" />
+<value number="12" description="Interrupt Group 12" />
+<value number="13" description="Interrupt Group 13" />
+<value number="14" description="Interrupt Group 14" />
+<value number="15" description="Interrupt Group 15" />
+</bitfield>
+</msr>
+<msr address="0x51400022" type="rw" name="PIC_ZSEL_LOW" description="IRQ Mapper Unrestricted Z Select Low">
+<bitfield start="63" size="32" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="31" size="4" name="MAP_Z7" description="Map Unrestricted Z Input 7" type="bin">
+<value number="0" description="Disable" />
+<value number="1" description="Interrupt Group 1" />
+<value number="2" description="Interrupt Group 2" />
+<value number="3" description="Interrupt Group 3" />
+<value number="4" description="Interrupt Group 4" />
+<value number="5" description="Interrupt Group 5" />
+<value number="6" description="Interrupt Group 6" />
+<value number="7" description="Interrupt Group 7" />
+<value number="8" description="Interrupt Group 8" />
+<value number="9" description="Interrupt Group 9" />
+<value number="10" description="Interrupt Group 10" />
+<value number="11" description="Interrupt Group 11" />
+<value number="12" description="Interrupt Group 12" />
+<value number="13" description="Interrupt Group 13" />
+<value number="14" description="Interrupt Group 14" />
+<value number="15" description="Interrupt Group 15" />
+</bitfield>
+<bitfield start="27" size="4" name="MAP_Z6" description="Map Unrestricted Z Input 6" type="bin">
+<value number="0" description="Disable" />
+<value number="1" description="Interrupt Group 1" />
+<value number="2" description="Interrupt Group 2" />
+<value number="3" description="Interrupt Group 3" />
+<value number="4" description="Interrupt Group 4" />
+<value number="5" description="Interrupt Group 5" />
+<value number="6" description="Interrupt Group 6" />
+<value number="7" description="Interrupt Group 7" />
+<value number="8" description="Interrupt Group 8" />
+<value number="9" description="Interrupt Group 9" />
+<value number="10" description="Interrupt Group 10" />
+<value number="11" description="Interrupt Group 11" />
+<value number="12" description="Interrupt Group 12" />
+<value number="13" description="Interrupt Group 13" />
+<value number="14" description="Interrupt Group 14" />
+<value number="15" description="Interrupt Group 15" />
+</bitfield>
+<bitfield start="23" size="4" name="MAP_Z5" description="Map Unrestricted Z Input 5" type="bin">
+<value number="0" description="Disable" />
+<value number="1" description="Interrupt Group 1" />
+<value number="2" description="Interrupt Group 2" />
+<value number="3" description="Interrupt Group 3" />
+<value number="4" description="Interrupt Group 4" />
+<value number="5" description="Interrupt Group 5" />
+<value number="6" description="Interrupt Group 6" />
+<value number="7" description="Interrupt Group 7" />
+<value number="8" description="Interrupt Group 8" />
+<value number="9" description="Interrupt Group 9" />
+<value number="10" description="Interrupt Group 10" />
+<value number="11" description="Interrupt Group 11" />
+<value number="12" description="Interrupt Group 12" />
+<value number="13" description="Interrupt Group 13" />
+<value number="14" description="Interrupt Group 14" />
+<value number="15" description="Interrupt Group 15" />
+</bitfield>
+<bitfield start="19" size="4" name="MAP_Z4" description="Map Unrestricted Z Input 4" type="bin">
+<value number="0" description="Disable" />
+<value number="1" description="Interrupt Group 1" />
+<value number="2" description="Interrupt Group 2" />
+<value number="3" description="Interrupt Group 3" />
+<value number="4" description="Interrupt Group 4" />
+<value number="5" description="Interrupt Group 5" />
+<value number="6" description="Interrupt Group 6" />
+<value number="7" description="Interrupt Group 7" />
+<value number="8" description="Interrupt Group 8" />
+<value number="9" description="Interrupt Group 9" />
+<value number="10" description="Interrupt Group 10" />
+<value number="11" description="Interrupt Group 11" />
+<value number="12" description="Interrupt Group 12" />
+<value number="13" description="Interrupt Group 13" />
+<value number="14" description="Interrupt Group 14" />
+<value number="15" description="Interrupt Group 15" />
+</bitfield>
+<bitfield start="15" size="4" name="MAP_Z3" description="Map Unrestricted Z Input 3" type="bin">
+<value number="0" description="Disable" />
+<value number="1" description="Interrupt Group 1" />
+<value number="2" description="Interrupt Group 2" />
+<value number="3" description="Interrupt Group 3" />
+<value number="4" description="Interrupt Group 4" />
+<value number="5" description="Interrupt Group 5" />
+<value number="6" description="Interrupt Group 6" />
+<value number="7" description="Interrupt Group 7" />
+<value number="8" description="Interrupt Group 8" />
+<value number="9" description="Interrupt Group 9" />
+<value number="10" description="Interrupt Group 10" />
+<value number="11" description="Interrupt Group 11" />
+<value number="12" description="Interrupt Group 12" />
+<value number="13" description="Interrupt Group 13" />
+<value number="14" description="Interrupt Group 14" />
+<value number="15" description="Interrupt Group 15" />
+</bitfield>
+<bitfield start="11" size="4" name="MAP_Z2" description="Map Unrestricted Z Input 2" type="bin">
+<value number="0" description="Disable" />
+<value number="1" description="Interrupt Group 1" />
+<value number="2" description="Interrupt Group 2" />
+<value number="3" description="Interrupt Group 3" />
+<value number="4" description="Interrupt Group 4" />
+<value number="5" description="Interrupt Group 5" />
+<value number="6" description="Interrupt Group 6" />
+<value number="7" description="Interrupt Group 7" />
+<value number="8" description="Interrupt Group 8" />
+<value number="9" description="Interrupt Group 9" />
+<value number="10" description="Interrupt Group 10" />
+<value number="11" description="Interrupt Group 11" />
+<value number="12" description="Interrupt Group 12" />
+<value number="13" description="Interrupt Group 13" />
+<value number="14" description="Interrupt Group 14" />
+<value number="15" description="Interrupt Group 15" />
+</bitfield>
+<bitfield start="7" size="4" name="MAP_Z1" description="Map Unrestricted Z Input 1" type="bin">
+<value number="0" description="Disable" />
+<value number="1" description="Interrupt Group 1" />
+<value number="2" description="Interrupt Group 2" />
+<value number="3" description="Interrupt Group 3" />
+<value number="4" description="Interrupt Group 4" />
+<value number="5" description="Interrupt Group 5" />
+<value number="6" description="Interrupt Group 6" />
+<value number="7" description="Interrupt Group 7" />
+<value number="8" description="Interrupt Group 8" />
+<value number="9" description="Interrupt Group 9" />
+<value number="10" description="Interrupt Group 10" />
+<value number="11" description="Interrupt Group 11" />
+<value number="12" description="Interrupt Group 12" />
+<value number="13" description="Interrupt Group 13" />
+<value number="14" description="Interrupt Group 14" />
+<value number="15" description="Interrupt Group 15" />
+</bitfield>
+<bitfield start="3" size="4" name="MAP_Z0" description="Map Unrestricted Z Input 0" type="bin">
+<value number="0" description="Disable" />
+<value number="1" description="Interrupt Group 1" />
+<value number="2" description="Interrupt Group 2" />
+<value number="3" description="Interrupt Group 3" />
+<value number="4" description="Interrupt Group 4" />
+<value number="5" description="Interrupt Group 5" />
+<value number="6" description="Interrupt Group 6" />
+<value number="7" description="Interrupt Group 7" />
+<value number="8" description="Interrupt Group 8" />
+<value number="9" description="Interrupt Group 9" />
+<value number="10" description="Interrupt Group 10" />
+<value number="11" description="Interrupt Group 11" />
+<value number="12" description="Interrupt Group 12" />
+<value number="13" description="Interrupt Group 13" />
+<value number="14" description="Interrupt Group 14" />
+<value number="15" description="Interrupt Group 15" />
+</bitfield>
+</msr>
+<msr address="0x51400023" type="rw" name="PIC_ZSEL_HIGH" description="IRQ Mapper Unrestricted Z Select High">
+<bitfield start="63" size="32" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="31" size="4" name="MAP_Z15" description="Map Unrestricted Z Input 15" type="bin">
+<value number="0" description="Disable" />
+<value number="1" description="Interrupt Group 1" />
+<value number="2" description="Interrupt Group 2" />
+<value number="3" description="Interrupt Group 3" />
+<value number="4" description="Interrupt Group 4" />
+<value number="5" description="Interrupt Group 5" />
+<value number="6" description="Interrupt Group 6" />
+<value number="7" description="Interrupt Group 7" />
+<value number="8" description="Interrupt Group 8" />
+<value number="9" description="Interrupt Group 9" />
+<value number="10" description="Interrupt Group 10" />
+<value number="11" description="Interrupt Group 11" />
+<value number="12" description="Interrupt Group 12" />
+<value number="13" description="Interrupt Group 13" />
+<value number="14" description="Interrupt Group 14" />
+<value number="15" description="Interrupt Group 15" />
+</bitfield>
+<bitfield start="27" size="4" name="MAP_Z14" description="Map Unrestricted Z Input 14" type="bin">
+<value number="0" description="Disable" />
+<value number="1" description="Interrupt Group 1" />
+<value number="2" description="Interrupt Group 2" />
+<value number="3" description="Interrupt Group 3" />
+<value number="4" description="Interrupt Group 4" />
+<value number="5" description="Interrupt Group 5" />
+<value number="6" description="Interrupt Group 6" />
+<value number="7" description="Interrupt Group 7" />
+<value number="8" description="Interrupt Group 8" />
+<value number="9" description="Interrupt Group 9" />
+<value number="10" description="Interrupt Group 10" />
+<value number="11" description="Interrupt Group 11" />
+<value number="12" description="Interrupt Group 12" />
+<value number="13" description="Interrupt Group 13" />
+<value number="14" description="Interrupt Group 14" />
+<value number="15" description="Interrupt Group 15" />
+</bitfield>
+<bitfield start="23" size="4" name="MAP_Z13" description="Map Unrestricted Z Input 13" type="bin">
+<value number="0" description="Disable" />
+<value number="1" description="Interrupt Group 1" />
+<value number="2" description="Interrupt Group 2" />
+<value number="3" description="Interrupt Group 3" />
+<value number="4" description="Interrupt Group 4" />
+<value number="5" description="Interrupt Group 5" />
+<value number="6" description="Interrupt Group 6" />
+<value number="7" description="Interrupt Group 7" />
+<value number="8" description="Interrupt Group 8" />
+<value number="9" description="Interrupt Group 9" />
+<value number="10" description="Interrupt Group 10" />
+<value number="11" description="Interrupt Group 11" />
+<value number="12" description="Interrupt Group 12" />
+<value number="13" description="Interrupt Group 13" />
+<value number="14" description="Interrupt Group 14" />
+<value number="15" description="Interrupt Group 15" />
+</bitfield>
+<bitfield start="19" size="4" name="MAP_Z12" description="Map Unrestricted Z Input 12" type="bin">
+<value number="0" description="Disable" />
+<value number="1" description="Interrupt Group 1" />
+<value number="2" description="Interrupt Group 2" />
+<value number="3" description="Interrupt Group 3" />
+<value number="4" description="Interrupt Group 4" />
+<value number="5" description="Interrupt Group 5" />
+<value number="6" description="Interrupt Group 6" />
+<value number="7" description="Interrupt Group 7" />
+<value number="8" description="Interrupt Group 8" />
+<value number="9" description="Interrupt Group 9" />
+<value number="10" description="Interrupt Group 10" />
+<value number="11" description="Interrupt Group 11" />
+<value number="12" description="Interrupt Group 12" />
+<value number="13" description="Interrupt Group 13" />
+<value number="14" description="Interrupt Group 14" />
+<value number="15" description="Interrupt Group 15" />
+</bitfield>
+<bitfield start="15" size="4" name="MAP_Z11" description="Map Unrestricted Z Input 11" type="bin">
+<value number="0" description="Disable" />
+<value number="1" description="Interrupt Group 1" />
+<value number="2" description="Interrupt Group 2" />
+<value number="3" description="Interrupt Group 3" />
+<value number="4" description="Interrupt Group 4" />
+<value number="5" description="Interrupt Group 5" />
+<value number="6" description="Interrupt Group 6" />
+<value number="7" description="Interrupt Group 7" />
+<value number="8" description="Interrupt Group 8" />
+<value number="9" description="Interrupt Group 9" />
+<value number="10" description="Interrupt Group 10" />
+<value number="11" description="Interrupt Group 11" />
+<value number="12" description="Interrupt Group 12" />
+<value number="13" description="Interrupt Group 13" />
+<value number="14" description="Interrupt Group 14" />
+<value number="15" description="Interrupt Group 15" />
+</bitfield>
+<bitfield start="11" size="4" name="MAP_Z10" description="Map Unrestricted Z Input 10" type="bin">
+<value number="0" description="Disable" />
+<value number="1" description="Interrupt Group 1" />
+<value number="2" description="Interrupt Group 2" />
+<value number="3" description="Interrupt Group 3" />
+<value number="4" description="Interrupt Group 4" />
+<value number="5" description="Interrupt Group 5" />
+<value number="6" description="Interrupt Group 6" />
+<value number="7" description="Interrupt Group 7" />
+<value number="8" description="Interrupt Group 8" />
+<value number="9" description="Interrupt Group 9" />
+<value number="10" description="Interrupt Group 10" />
+<value number="11" description="Interrupt Group 11" />
+<value number="12" description="Interrupt Group 12" />
+<value number="13" description="Interrupt Group 13" />
+<value number="14" description="Interrupt Group 14" />
+<value number="15" description="Interrupt Group 15" />
+</bitfield>
+<bitfield start="7" size="4" name="MAP_Z9" description="Map Unrestricted Z Input 9" type="bin">
+<value number="0" description="Disable" />
+<value number="1" description="Interrupt Group 1" />
+<value number="2" description="Interrupt Group 2" />
+<value number="3" description="Interrupt Group 3" />
+<value number="4" description="Interrupt Group 4" />
+<value number="5" description="Interrupt Group 5" />
+<value number="6" description="Interrupt Group 6" />
+<value number="7" description="Interrupt Group 7" />
+<value number="8" description="Interrupt Group 8" />
+<value number="9" description="Interrupt Group 9" />
+<value number="10" description="Interrupt Group 10" />
+<value number="11" description="Interrupt Group 11" />
+<value number="12" description="Interrupt Group 12" />
+<value number="13" description="Interrupt Group 13" />
+<value number="14" description="Interrupt Group 14" />
+<value number="15" description="Interrupt Group 15" />
+</bitfield>
+<bitfield start="3" size="4" name="MAP_Z8" description="Map Unrestricted Z Input 8" type="bin">
+<value number="0" description="Disable" />
+<value number="1" description="Interrupt Group 1" />
+<value number="2" description="Interrupt Group 2" />
+<value number="3" description="Interrupt Group 3" />
+<value number="4" description="Interrupt Group 4" />
+<value number="5" description="Interrupt Group 5" />
+<value number="6" description="Interrupt Group 6" />
+<value number="7" description="Interrupt Group 7" />
+<value number="8" description="Interrupt Group 8" />
+<value number="9" description="Interrupt Group 9" />
+<value number="10" description="Interrupt Group 10" />
+<value number="11" description="Interrupt Group 11" />
+<value number="12" description="Interrupt Group 12" />
+<value number="13" description="Interrupt Group 13" />
+<value number="14" description="Interrupt Group 14" />
+<value number="15" description="Interrupt Group 15" />
+</bitfield>
+</msr>
+<msr address="0x51400024" type="rw" name="PIC_IRQM_PRIM" description="IRQ Mapper Primary Mask">
+<bitfield start="63" size="48" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="15" size="1" name="PRIM15_MSK" description="Primary Input 15 Mask" type="dec">
+<value number="0" description="Mask the interrupt source" />
+<value number="1" description="Do not mask the interrupt source" />
+</bitfield>
+<bitfield start="14" size="1" name="PRIM14_MSK" description="Primary Input 14 Mask" type="dec">
+<value number="0" description="Mask the interrupt source" />
+<value number="1" description="Do not mask the interrupt source" />
+</bitfield>
+<bitfield start="13" size="1" name="PRIM13_MSK" description="Primary Input 13 Mask" type="dec">
+<value number="0" description="Mask the interrupt source" />
+<value number="1" description="Do not mask the interrupt source" />
+</bitfield>
+<bitfield start="12" size="1" name="PRIM12_MSK" description="Primary Input 12 Mask" type="dec">
+<value number="0" description="Mask the interrupt source" />
+<value number="1" description="Do not mask the interrupt source" />
+</bitfield>
+<bitfield start="11" size="1" name="PRIM11_MSK" description="Primary Input 11 Mask" type="dec">
+<value number="0" description="Mask the interrupt source" />
+<value number="1" description="Do not mask the interrupt source" />
+</bitfield>
+<bitfield start="10" size="1" name="PRIM10_MSK" description="Primary Input 10 Mask" type="dec">
+<value number="0" description="Mask the interrupt source" />
+<value number="1" description="Do not mask the interrupt source" />
+</bitfield>
+<bitfield start="9" size="1" name="PRIM9_MSK" description="Primary Input 9 Mask" type="dec">
+<value number="0" description="Mask the interrupt source" />
+<value number="1" description="Do not mask the interrupt source" />
+</bitfield>
+<bitfield start="8" size="1" name="PRIM8_MSK" description="Primary Input 8 Mask" type="dec">
+<value number="0" description="Mask the interrupt source" />
+<value number="1" description="Do not mask the interrupt source" />
+</bitfield>
+<bitfield start="7" size="1" name="PRIM7_MSK" description="Primary Input 7 Mask" type="dec">
+<value number="0" description="Mask the interrupt source" />
+<value number="1" description="Do not mask the interrupt source" />
+</bitfield>
+<bitfield start="6" size="1" name="PRIM6_MSK" description="Primary Input 6 Mask" type="dec">
+<value number="0" description="Mask the interrupt source" />
+<value number="1" description="Do not mask the interrupt source" />
+</bitfield>
+<bitfield start="5" size="1" name="PRIM5_MSK" description="Primary Input 5 Mask" type="dec">
+<value number="0" description="Mask the interrupt source" />
+<value number="1" description="Do not mask the interrupt source" />
+</bitfield>
+<bitfield start="4" size="1" name="PRIM4_MSK" description="Primary Input 4 Mask" type="dec">
+<value number="0" description="Mask the interrupt source" />
+<value number="1" description="Do not mask the interrupt source" />
+</bitfield>
+<bitfield start="3" size="1" name="PRIM3_MSK" description="Primary Input 3 Mask" type="dec">
+<value number="0" description="Mask the interrupt source" />
+<value number="1" description="Do not mask the interrupt source" />
+</bitfield>
+<bitfield start="2" size="1" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="1" size="1" name="PRIM1_MSK" description="Primary Input 1 Mask" type="dec">
+<value number="0" description="Mask the interrupt source" />
+<value number="1" description="Do not mask the interrupt source" />
+</bitfield>
+<bitfield start="0" size="1" name="PRIM0_MSK" description="Primary Input 0 Mask" type="dec">
+<value number="0" description="Mask the interrupt source" />
+<value number="1" description="Do not mask the interrupt source" />
+</bitfield>
+</msr>
+<msr address="0x51400025" type="rw" name="PIC_IRQM_LPC" description="IRQ Mapper LPC Mask">
+<bitfield start="63" size="48" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="15" size="1" name="LPC15_EN" description="LPC Input 15 Enable" type="dec">
+<value number="0" description="Disable interrupt source" />
+<value number="1" description="Enable interrupt source" />
+</bitfield>
+<bitfield start="14" size="1" name="LPC14_EN" description="LPC Input 14 Enable" type="dec">
+<value number="0" description="Disable interrupt source" />
+<value number="1" description="Enable interrupt source" />
+</bitfield>
+<bitfield start="13" size="1" name="LPC13_EN" description="LPC Input 13 Enable" type="dec">
+<value number="0" description="Disable interrupt source" />
+<value number="1" description="Enable interrupt source" />
+</bitfield>
+<bitfield start="12" size="1" name="LPC12_EN" description="LPC Input 12 Enable" type="dec">
+<value number="0" description="Disable interrupt source" />
+<value number="1" description="Enable interrupt source" />
+</bitfield>
+<bitfield start="11" size="1" name="LPC11_EN" description="LPC Input 11 Enable" type="dec">
+<value number="0" description="Disable interrupt source" />
+<value number="1" description="Enable interrupt source" />
+</bitfield>
+<bitfield start="10" size="1" name="LPC10_EN" description="LPC Input 10 Enable" type="dec">
+<value number="0" description="Disable interrupt source" />
+<value number="1" description="Enable interrupt source" />
+</bitfield>
+<bitfield start="9" size="1" name="LPC9_EN" description="LPC Input 9 Enable" type="dec">
+<value number="0" description="Disable interrupt source" />
+<value number="1" description="Enable interrupt source" />
+</bitfield>
+<bitfield start="8" size="1" name="LPC8_EN" description="LPC Input 8 Enable" type="dec">
+<value number="0" description="Disable interrupt source" />
+<value number="1" description="Enable interrupt source" />
+</bitfield>
+<bitfield start="7" size="1" name="LPC7_EN" description="LPC Input 7 Enable" type="dec">
+<value number="0" description="Disable interrupt source" />
+<value number="1" description="Enable interrupt source" />
+</bitfield>
+<bitfield start="6" size="1" name="LPC6_EN" description="LPC Input 6 Enable" type="dec">
+<value number="0" description="Disable interrupt source" />
+<value number="1" description="Enable interrupt source" />
+</bitfield>
+<bitfield start="5" size="1" name="LPC5_EN" description="LPC Input 5 Enable" type="dec">
+<value number="0" description="Disable interrupt source" />
+<value number="1" description="Enable interrupt source" />
+</bitfield>
+<bitfield start="4" size="1" name="LPC4_EN" description="LPC Input 4 Enable" type="dec">
+<value number="0" description="Disable interrupt source" />
+<value number="1" description="Enable interrupt source" />
+</bitfield>
+<bitfield start="3" size="1" name="LPC3_EN" description="LPC Input 3 Enable" type="dec">
+<value number="0" description="Disable interrupt source" />
+<value number="1" description="Enable interrupt source" />
+</bitfield>
+<bitfield start="2" size="1" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="1" size="1" name="LPC1_EN" description="LPC Input 1 Enable" type="dec">
+<value number="0" description="Disable interrupt source" />
+<value number="1" description="Enable interrupt source" />
+</bitfield>
+<bitfield start="0" size="1" name="LPC0_EN" description="LPC Input 0 Enable" type="dec">
+<value number="0" description="Disable interrupt source" />
+<value number="1" description="Enable interrupt source" />
+</bitfield>
+</msr>
+<msr address="0x51400026" type="ro" name="PIC_XIRR_STS_LOW" description="IRQ Mapper Extended Interrupt Request Status Low">
+<bitfield start="63" size="32" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="31" size="1" name="IG7_STS_Z" description="Unrestricted Source Z Input 7" type="bin">
+<value number="0" description="No interrupt" />
+<value number="1" description="INTERRUPT" />
+</bitfield>
+<bitfield start="30" size="1" name="IG7_STS_Y" description="Unrestricted Source Y Input 7" type="bin">
+<value number="0" description="No interrupt" />
+<value number="1" description="INTERRUPT" />
+</bitfield>
+<bitfield start="29" size="1" name="IG7_STS_LPC" description="LPC Input 7" type="bin">
+<value number="0" description="No interrupt" />
+<value number="1" description="INTERRUPT" />
+</bitfield>
+<bitfield start="28" size="1" name="IG7_STS_PRIM" description="Primary Input 7" type="bin">
+<value number="0" description="No interrupt" />
+<value number="1" description="INTERRUPT" />
+</bitfield>
+<bitfield start="27" size="1" name="IG6_STS_Z" description="Unrestricted Source Z Input 6" type="bin">
+<value number="0" description="No interrupt" />
+<value number="1" description="INTERRUPT" />
+</bitfield>
+<bitfield start="26" size="1" name="IG6_STS_Y" description="Unrestricted Source Y Input 6" type="bin">
+<value number="0" description="No interrupt" />
+<value number="1" description="INTERRUPT" />
+</bitfield>
+<bitfield start="25" size="1" name="IG6_STS_LPC" description="LPC Input 6" type="bin">
+<value number="0" description="No interrupt" />
+<value number="1" description="INTERRUPT" />
+</bitfield>
+<bitfield start="24" size="1" name="IG6_STS_PRIM" description="Primary Input 6" type="bin">
+<value number="0" description="No interrupt" />
+<value number="1" description="INTERRUPT" />
+</bitfield>
+<bitfield start="23" size="1" name="IG5_STS_Z" description="Unrestricted Source Z Input 5" type="bin">
+<value number="0" description="No interrupt" />
+<value number="1" description="INTERRUPT" />
+</bitfield>
+<bitfield start="22" size="1" name="IG5_STS_Y" description="Unrestricted Source Y Input 5" type="bin">
+<value number="0" description="No interrupt" />
+<value number="1" description="INTERRUPT" />
+</bitfield>
+<bitfield start="21" size="1" name="IG5_STS_LPC" description="LPC Input 5" type="bin">
+<value number="0" description="No interrupt" />
+<value number="1" description="INTERRUPT" />
+</bitfield>
+<bitfield start="20" size="1" name="IG5_STS_PRIM" description="Primary Input 5" type="bin">
+<value number="0" description="No interrupt" />
+<value number="1" description="INTERRUPT" />
+</bitfield>
+<bitfield start="19" size="1" name="IG4_STS_Z" description="Unrestricted Source Z Input 4" type="bin">
+<value number="0" description="No interrupt" />
+<value number="1" description="INTERRUPT" />
+</bitfield>
+<bitfield start="18" size="1" name="IG4_STS_Y" description="Unrestricted Source Y Input 4" type="bin">
+<value number="0" description="No interrupt" />
+<value number="1" description="INTERRUPT" />
+</bitfield>
+<bitfield start="17" size="1" name="IG4_STS_LPC" description="LPC Input 4" type="bin">
+<value number="0" description="No interrupt" />
+<value number="1" description="INTERRUPT" />
+</bitfield>
+<bitfield start="16" size="1" name="IG4_STS_PRIM" description="Primary Input 4" type="bin">
+<value number="0" description="No interrupt" />
+<value number="1" description="INTERRUPT" />
+</bitfield>
+<bitfield start="15" size="1" name="IG3_STS_Z" description="Unrestricted Source Z Input 3" type="bin">
+<value number="0" description="No interrupt" />
+<value number="1" description="INTERRUPT" />
+</bitfield>
+<bitfield start="14" size="1" name="IG3_STS_Y" description="Unrestricted Source Y Input 3" type="bin">
+<value number="0" description="No interrupt" />
+<value number="1" description="INTERRUPT" />
+</bitfield>
+<bitfield start="13" size="1" name="IG3_STS_LPC" description="LPC Input 3" type="bin">
+<value number="0" description="No interrupt" />
+<value number="1" description="INTERRUPT" />
+</bitfield>
+<bitfield start="12" size="1" name="IG3_STS_PRIM" description="Primary Input 3" type="bin">
+<value number="0" description="No interrupt" />
+<value number="1" description="INTERRUPT" />
+</bitfield>
+<bitfield start="11" size="1" name="IG2_STS_Z" description="Unrestricted Source Z Input 2" type="bin">
+<value number="0" description="No interrupt" />
+<value number="1" description="INTERRUPT" />
+</bitfield>
+<bitfield start="10" size="1" name="IG2_STS_Y" description="Unrestricted Source Y Input 2" type="bin">
+<value number="0" description="No interrupt" />
+<value number="1" description="INTERRUPT" />
+</bitfield>
+<bitfield start="9" size="2" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="7" size="1" name="IG1_STS_Z" description="Unrestricted Source Z Input 1" type="bin">
+<value number="0" description="No interrupt" />
+<value number="1" description="INTERRUPT" />
+</bitfield>
+<bitfield start="6" size="1" name="IG1_STS_Y" description="Unrestricted Source Y Input 1" type="bin">
+<value number="0" description="No interrupt" />
+<value number="1" description="INTERRUPT" />
+</bitfield>
+<bitfield start="5" size="1" name="IG1_STS_LPC" description="LPC Input 1" type="bin">
+<value number="0" description="No interrupt" />
+<value number="1" description="INTERRUPT" />
+</bitfield>
+<bitfield start="4" size="1" name="IG1_STS_PRIM" description="Primary Input 1" type="bin">
+<value number="0" description="No interrupt" />
+<value number="1" description="INTERRUPT" />
+</bitfield>
+<bitfield start="3" size="2" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="1" size="1" name="IG0_STS_LPC" description="LPC Input 0" type="bin">
+<value number="0" description="No interrupt" />
+<value number="1" description="INTERRUPT" />
+</bitfield>
+<bitfield start="0" size="1" name="IG0_STS_PRIM" description="Primary Input 0" type="bin">
+<value number="0" description="No interrupt" />
+<value number="1" description="INTERRUPT" />
+</bitfield>
+</msr>
+<msr address="0x51400027" type="ro" name="PIC_XIRR_STS_HIGH" description="IRQ Mapper Extended Interrupt Request Status High">
+<bitfield start="63" size="32" name="RSVD" description="Reserved" type="hex">
+</bitfield>
+<bitfield start="31" size="1" name="IG15_STS_Z" description="Unrestricted Source Z Input 15" type="bin">
+<value number="0" description="No interrupt" />
+<value number="1" description="INTERRUPT" />
+</bitfield>
+<bitfield start="30" size="1" name="IG15_STS_Y" description="Unrestricted Source Y Input 15" type="bin">
+<value number="0" description="No interrupt" />
+<value number="1" description="INTERRUPT" />
+</bitfield>
+<bitfield start="29" size="1" name="IG15_STS_LPC" description="LPC Input 15" type="bin">
+<value number="0" description="No interrupt" />
+<value number="1" description="INTERRUPT" />
+</bitfield>
+<bitfield start="28" size="1" name="IG15_STS_PRIM" description="Primary Input 15" type="bin">
+<value number="0" description="No interrupt" />
+<value number="1" description="INTERRUPT" />
+</bitfield>
+<bitfield start="27" size="1" name="IG14_STS_Z" description="Unrestricted Source Z Input 14" type="bin">
+<value number="0" description="No interrupt" />
+<value number="1" description="INTERRUPT" />
+</bitfield>
+<bitfield start="26" size="1" name="IG14_STS_Y" description="Unrestricted Source Y Input 14" type="bin">
+<value number="0" description="No interrupt" />
+<value number="1" description="INTERRUPT" />
+</bitfield>
+<bitfield start="25" size="1" name="IG14_STS_LPC" description="LPC Input 14" type="bin">
+<value number="0" description="No interrupt" />
+<value number="1" description="INTERRUPT" />
+</bitfield>
+<bitfield start="24" size="1" name="IG14_STS_PRIM" description="Primary Input 14" type="bin">
+<value number="0" description="No interrupt" />
+<value number="1" description="INTERRUPT" />
+</bitfield>
+<bitfield start="23" size="1" name="IG13_STS_Z" description="Unrestricted Source Z Input 13" type="bin">
+<value number="0" description="No interrupt" />
+<value number="1" description="INTERRUPT" />
+</bitfield>
+<bitfield start="22" size="1" name="IG13_STS_Y" description="Unrestricted Source Y Input 13" type="bin">
+<value number="0" description="No interrupt" />
+<value number="1" description="INTERRUPT" />
+</bitfield>
+<bitfield start="21" size="1" name="IG13_STS_LPC" description="LPC Input 13" type="bin">
+<value number="0" description="No interrupt" />
+<value number="1" description="INTERRUPT" />
+</bitfield>
+<bitfield start="20" size="1" name="IG13_STS_PRIM" description="Primary Input 13" type="bin">
+<value number="0" description="No interrupt" />
+<value number="1" description="INTERRUPT" />
+</bitfield>
+<bitfield start="19" size="1" name="IG12_STS_Z" description="Unrestricted Source Z Input 12" type="bin">
+<value number="0" description="No interrupt" />
+<value number="1" description="INTERRUPT" />
+</bitfield>
+<bitfield start="18" size="1" name="IG12_STS_Y" description="Unrestricted Source Y Input 12" type="bin">
+<value number="0" description="No interrupt" />
+<value number="1" description="INTERRUPT" />
+</bitfield>
+<bitfield start="17" size="1" name="IG12_STS_LPC" description="LPC Input 12" type="bin">
+<value number="0" description="No interrupt" />
+<value number="1" description="INTERRUPT" />
+</bitfield>
+<bitfield start="16" size="1" name="IG12_STS_PRIM" description="Primary Input 12" type="bin">
+<value number="0" description="No interrupt" />
+<value number="1" description="INTERRUPT" />
+</bitfield>
+<bitfield start="15" size="1" name="IG11_STS_Z" description="Unrestricted Source Z Input 11" type="bin">
+<value number="0" description="No interrupt" />
+<value number="1" description="INTERRUPT" />
+</bitfield>
+<bitfield start="14" size="1" name="IG11_STS_Y" description="Unrestricted Source Y Input 11" type="bin">
+<value number="0" description="No interrupt" />
+<value number="1" description="INTERRUPT" />
+</bitfield>
+<bitfield start="13" size="1" name="IG11_STS_LPC" description="LPC Input 11" type="bin">
+<value number="0" description="No interrupt" />
+<value number="1" description="INTERRUPT" />
+</bitfield>
+<bitfield start="12" size="1" name="IG11_STS_PRIM" description="Primary Input 11" type="bin">
+<value number="0" description="No interrupt" />
+<value number="1" description="INTERRUPT" />
+</bitfield>
+<bitfield start="11" size="1" name="IG10_STS_Z" description="Unrestricted Source Z Input 10" type="bin">
+<value number="0" description="No interrupt" />
+<value number="1" description="INTERRUPT" />
+</bitfield>
+<bitfield start="10" size="1" name="IG10_STS_Y" description="Unrestricted Source Y Input 10" type="bin">
+<value number="0" description="No interrupt" />
+<value number="1" description="INTERRUPT" />
+</bitfield>
+<bitfield start="9" size="1" name="IG10_STS_LPC" description="LPC Input 10" type="bin">
+<value number="0" description="No interrupt" />
+<value number="1" description="INTERRUPT" />
+</bitfield>
+<bitfield start="8" size="1" name="IG10_STS_PRIM" description="Primary Input 10" type="bin">
+<value number="0" description="No interrupt" />
+<value number="1" description="INTERRUPT" />
+</bitfield>
+<bitfield start="7" size="1" name="IG9_STS_Z" description="Unrestricted Source Z Input 9" type="bin">
+<value number="0" description="No interrupt" />
+<value number="1" description="INTERRUPT" />
+</bitfield>
+<bitfield start="6" size="1" name="IG9_STS_Y" description="Unrestricted Source Y Input 9" type="bin">
+<value number="0" description="No interrupt" />
+<value number="1" description="INTERRUPT" />
+</bitfield>
+<bitfield start="5" size="1" name="IG9_STS_LPC" description="LPC Input 9" type="bin">
+<value number="0" description="No interrupt" />
+<value number="1" description="INTERRUPT" />
+</bitfield>
+<bitfield start="4" size="1" name="IG9_STS_PRIM" description="Primary Input 9" type="bin">
+<value number="0" description="No interrupt" />
+<value number="1" description="INTERRUPT" />
+</bitfield>
+<bitfield start="3" size="1" name="IG8_STS_Z" description="Unrestricted Source Z Input 8" type="bin">
+<value number="0" description="No interrupt" />
+<value number="1" description="INTERRUPT" />
+</bitfield>
+<bitfield start="2" size="1" name="IG8_STS_Y" description="Unrestricted Source Y Input 8" type="bin">
+<value number="0" description="No interrupt" />
+<value number="1" description="INTERRUPT" />
+</bitfield>
+<bitfield start="1" size="1" name="IG8_STS_LPC" description="LPC Input 8" type="bin">
+<value number="0" description="No interrupt" />
+<value number="1" description="INTERRUPT" />
+</bitfield>
+<bitfield start="0" size="1" name="IG8_STS_PRIM" description="Primary Input 8" type="bin">
+<value number="0" description="No interrupt" />
+<value number="1" description="INTERRUPT" />
+</bitfield>
+</msr>
+</msrarray>
Index: util/pygen/data/sio/nuovoton.sio.xml
===================================================================
--- util/pygen/data/sio/nuovoton.sio.xml	(revision 0)
+++ util/pygen/data/sio/nuovoton.sio.xml	(revision 0)
@@ -0,0 +1,137 @@ 
+<?xml version="1.0" encoding="UTF-8"?>
+<sioarray name="nuovoton" description="nuovoton superios">
+<sio model="WPCE775x / NPCE781x" id="0xfc" >
+<noldn>
+<reg address="0x20" default_value="0xfc" />
+<reg address="0x21" default_value="0x11" />
+<reg address="0x22" default_value="0xfffffffc" />
+<reg address="0x23" default_value="0xfffffffc" />
+<reg address="0x24" default_value="0xfffffffc" />
+<reg address="0x25" default_value="0x0" />
+<reg address="0x26" default_value="0x0" />
+<reg address="0x27" default_value="0xfffffffb" />
+<reg address="0x28" default_value="0x0" />
+<reg address="0x29" default_value="0x4" />
+<reg address="0x2a" default_value="0xfffffffc" />
+<reg address="0x2b" default_value="0xfffffffc" />
+<reg address="0x2c" default_value="0xfffffffc" />
+<reg address="0x2d" default_value="0x0" />
+<reg address="0x2e" default_value="0xfffffffc" />
+<reg address="0x2f" default_value="0xfffffffc" />
+</noldn>
+<ldn number="0x3" name="CIR Port (CIRP)" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0xf8" />
+<reg address="0x70" default_value="0x4" />
+<reg address="0x71" default_value="0x3" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+<reg address="0xf0" default_value="0x2" />
+</ldn>
+<ldn number="0x4" name="Mobile System Wake-Up Control Config (MSWC)" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0x71" default_value="0x3" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+</ldn>
+<ldn number="0x5" name="Mouse config (KBC)" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x70" default_value="0xc" />
+<reg address="0x71" default_value="0x3" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+</ldn>
+<ldn number="0x6" name="Keyboard config (KBC)" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x60" />
+<reg address="0x62" default_value="0x0" />
+<reg address="0x63" default_value="0x64" />
+<reg address="0x70" default_value="0x1" />
+<reg address="0x71" default_value="0x3" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+</ldn>
+<ldn number="0xf" name="Shared memory (SHM)" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0x71" default_value="0x0" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+<reg address="0xf0" default_value="0xfffffffb" />
+<reg address="0xf1" default_value="0x7" />
+<reg address="0xf2" default_value="0xfffffffc" />
+<reg address="0xf3" default_value="0xfffffffc" />
+<reg address="0xf4" default_value="0x0" />
+<reg address="0xf5" default_value="0x0" />
+<reg address="0xf6" default_value="0x0" />
+<reg address="0xf7" default_value="0x0" />
+<reg address="0xf8" default_value="0x0" />
+<reg address="0xf9" default_value="0x0" />
+<reg address="0xfa" default_value="0x0" />
+<reg address="0xfb" default_value="0x0" />
+</ldn>
+<ldn number="0x11" name="Power management I/F Channel 1 (PM1)" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x62" />
+<reg address="0x62" default_value="0x0" />
+<reg address="0x63" default_value="0x66" />
+<reg address="0x70" default_value="0x1" />
+<reg address="0x71" default_value="0x3" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+</ldn>
+<ldn number="0x12" name="Power management I/F Channel 2 (PM2)" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x68" />
+<reg address="0x62" default_value="0x0" />
+<reg address="0x63" default_value="0x6c" />
+<reg address="0x70" default_value="0x1" />
+<reg address="0x71" default_value="0x3" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+</ldn>
+<ldn number="0x15" name="Enhanced Wake On CIR (EWOC)" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x62" default_value="0x0" />
+<reg address="0x63" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0x71" default_value="0x3" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+</ldn>
+<ldn number="0x17" name="Power Management I/F Channel 3 (PM3)" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x6a" />
+<reg address="0x62" default_value="0x0" />
+<reg address="0x63" default_value="0x6e" />
+<reg address="0x70" default_value="0x1" />
+<reg address="0x71" default_value="0x3" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+</ldn>
+<ldn number="0x1a" name="Serial Port with Fast Infrared Port (FIR)" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x2" />
+<reg address="0x61" default_value="0xf8" />
+<reg address="0x70" default_value="0x3" />
+<reg address="0x71" default_value="0x3" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+<reg address="0xf0" default_value="0x2" />
+</ldn>
+</sio>
+<sio model="WPCM450" id="0x1a" >
+</sio>
+</sioarray>
Index: util/pygen/data/sio/via.sio.xml
===================================================================
--- util/pygen/data/sio/via.sio.xml	(revision 0)
+++ util/pygen/data/sio/via.sio.xml	(revision 0)
@@ -0,0 +1,5 @@ 
+<?xml version="1.0" encoding="UTF-8"?>
+<sioarray name="via" description="via superios">
+<sio model="VT82C686A/VT82C686B" id="0x3c" >
+</sio>
+</sioarray>
Index: util/pygen/data/sio/winbond.sio.xml
===================================================================
--- util/pygen/data/sio/winbond.sio.xml	(revision 0)
+++ util/pygen/data/sio/winbond.sio.xml	(revision 0)
@@ -0,0 +1,1394 @@ 
+<?xml version="1.0" encoding="UTF-8"?>
+<sioarray name="winbond" description="winbond superios">
+<sio model="W83977CTF" id="0x527" >
+</sio>
+<sio model="W83977EF/EG" id="0x52f" >
+<noldn>
+<reg address="0x2" default_value="0xfffffffc" />
+<reg address="0x20" default_value="0x52" />
+<reg address="0x21" default_value="0xfffffffb" />
+<reg address="0x22" default_value="0xff" />
+<reg address="0x23" default_value="0xfe" />
+<reg address="0x24" default_value="0xfffffffb" />
+<reg address="0x25" default_value="0x0" />
+<reg address="0x26" default_value="0xfffffffb" />
+<reg address="0x28" default_value="0x0" />
+<reg address="0x2a" default_value="0x0" />
+<reg address="0x2b" default_value="0x0" />
+<reg address="0x2c" default_value="0x0" />
+<reg address="0x2d" default_value="0xfffffffc" />
+<reg address="0x2e" default_value="0xfffffffc" />
+<reg address="0x2f" default_value="0xfffffffc" />
+</noldn>
+<ldn number="0x0" name="Floppy" description="">
+<reg address="0x30" default_value="0x1" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0xf0" />
+<reg address="0x70" default_value="0x6" />
+<reg address="0x74" default_value="0x2" />
+<reg address="0xf0" default_value="0xe" />
+<reg address="0xf1" default_value="0x0" />
+<reg address="0xf2" default_value="0xff" />
+<reg address="0xf4" default_value="0x0" />
+<reg address="0xf5" default_value="0x0" />
+</ldn>
+<ldn number="0x1" name="Parallel port" description="">
+<reg address="0x30" default_value="0x1" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0x78" />
+<reg address="0x70" default_value="0x7" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0xf0" default_value="0x3f" />
+</ldn>
+<ldn number="0x2" name="COM1" description="">
+<reg address="0x30" default_value="0x1" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0xf8" />
+<reg address="0x70" default_value="0x4" />
+<reg address="0xf0" default_value="0x0" />
+</ldn>
+<ldn number="0x3" name="COM2" description="">
+<reg address="0x30" default_value="0x1" />
+<reg address="0x60" default_value="0x2" />
+<reg address="0x61" default_value="0xf8" />
+<reg address="0x70" default_value="0x3" />
+<reg address="0xf0" default_value="0x0" />
+<reg address="0xf1" default_value="0x0" />
+</ldn>
+<ldn number="0x5" name="Keyboard" description="">
+<reg address="0x30" default_value="0x1" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x60" />
+<reg address="0x62" default_value="0x0" />
+<reg address="0x63" default_value="0x64" />
+<reg address="0x70" default_value="0x1" />
+<reg address="0x72" default_value="0xc" />
+<reg address="0xf0" default_value="0x83" />
+</ldn>
+<ldn number="0x7" name="GPIO 1" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x62" default_value="0x0" />
+<reg address="0x63" default_value="0x0" />
+<reg address="0x64" default_value="0x0" />
+<reg address="0x65" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0x72" default_value="0x0" />
+<reg address="0xe0" default_value="0x1" />
+<reg address="0xe1" default_value="0x1" />
+<reg address="0xe2" default_value="0x1" />
+<reg address="0xe3" default_value="0x1" />
+<reg address="0xe4" default_value="0x1" />
+<reg address="0xe5" default_value="0x1" />
+<reg address="0xe6" default_value="0x1" />
+<reg address="0xe7" default_value="0x1" />
+<reg address="0xf1" default_value="0x0" />
+</ldn>
+<ldn number="0x8" name="GPIO 2" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0x72" default_value="0x0" />
+<reg address="0xe8" default_value="0x1" />
+<reg address="0xe9" default_value="0x1" />
+<reg address="0xea" default_value="0x1" />
+<reg address="0xeb" default_value="0x1" />
+<reg address="0xec" default_value="0x1" />
+<reg address="0xed" default_value="0x1" />
+<reg address="0xf0" default_value="0x0" />
+<reg address="0xf1" default_value="0xfffffffc" />
+<reg address="0xf2" default_value="0x0" />
+<reg address="0xf3" default_value="0x0" />
+<reg address="0xf4" default_value="0x0" />
+</ldn>
+<ldn number="0xa" name="ACPI" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0xe0" default_value="0x0" />
+<reg address="0xe1" default_value="0x0" />
+<reg address="0xe2" default_value="0xfffffffb" />
+<reg address="0xe3" default_value="0xfffffffb" />
+<reg address="0xe4" default_value="0xfffffffb" />
+<reg address="0xe5" default_value="0x0" />
+<reg address="0xe6" default_value="0x0" />
+<reg address="0xe7" default_value="0x0" />
+<reg address="0xf0" default_value="0x0" />
+<reg address="0xf1" default_value="0x0" />
+<reg address="0xf3" default_value="0x0" />
+<reg address="0xf4" default_value="0x0" />
+<reg address="0xf6" default_value="0x0" />
+<reg address="0xf7" default_value="0x0" />
+<reg address="0xf9" default_value="0x0" />
+<reg address="0xfe" default_value="0xfffffffc" />
+<reg address="0xff" default_value="0xfffffffc" />
+</ldn>
+</sio>
+<sio model="W83627SF" id="0x595" >
+</sio>
+<sio model="W83697HF/F/HG" id="0x601" >
+<noldn>
+<reg address="0x20" default_value="0x60" />
+<reg address="0x21" default_value="NANA" />
+<reg address="0x22" default_value="0xff" />
+<reg address="0x23" default_value="0x0" />
+<reg address="0x24" default_value="0x0" />
+<reg address="0x25" default_value="0x0" />
+<reg address="0x26" default_value="0x0" />
+<reg address="0x28" default_value="0x0" />
+<reg address="0x29" default_value="0x0" />
+<reg address="0x2a" default_value="0xfffffffb" />
+</noldn>
+<ldn number="0x0" name="Floppy" description="">
+<reg address="0x30" default_value="0x1" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0xf0" />
+<reg address="0x70" default_value="0x6" />
+<reg address="0x74" default_value="0x2" />
+<reg address="0xf0" default_value="0xe" />
+<reg address="0xf1" default_value="0x0" />
+<reg address="0xf2" default_value="0xff" />
+<reg address="0xf4" default_value="0x0" />
+<reg address="0xf5" default_value="0x0" />
+</ldn>
+<ldn number="0x1" name="Parallel port" description="">
+<reg address="0x30" default_value="0x1" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0x78" />
+<reg address="0x70" default_value="0x7" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0xf0" default_value="0x3f" />
+</ldn>
+<ldn number="0x2" name="COM1" description="">
+<reg address="0x30" default_value="0x1" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0xf8" />
+<reg address="0x70" default_value="0x4" />
+<reg address="0xf0" default_value="0x0" />
+</ldn>
+<ldn number="0x3" name="COM2" description="">
+<reg address="0x30" default_value="0x1" />
+<reg address="0x60" default_value="0x2" />
+<reg address="0x61" default_value="0xf8" />
+<reg address="0x70" default_value="0x3" />
+<reg address="0xf0" default_value="0x0" />
+<reg address="0xf1" default_value="0x0" />
+</ldn>
+<ldn number="0x6" name="Consumer IR" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+</ldn>
+<ldn number="0x7" name="Game port, GPIO 1" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x2" />
+<reg address="0x61" default_value="0x1" />
+<reg address="0x62" default_value="0x0" />
+<reg address="0x63" default_value="0x0" />
+<reg address="0xf0" default_value="0xff" />
+<reg address="0xf1" default_value="0x0" />
+<reg address="0xf2" default_value="0x0" />
+</ldn>
+<ldn number="0x8" name="MIDI port, GPIO 5" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0x30" />
+<reg address="0x62" default_value="0x0" />
+<reg address="0x63" default_value="0x0" />
+<reg address="0x70" default_value="0x9" />
+<reg address="0xf0" default_value="0xff" />
+<reg address="0xf1" default_value="0x0" />
+<reg address="0xf2" default_value="0x0" />
+<reg address="0xf3" default_value="0x0" />
+<reg address="0xf4" default_value="0x0" />
+<reg address="0xf5" default_value="0x0" />
+</ldn>
+<ldn number="0x9" name="GPIO 2, GPIO 3, GPIO 4" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0xf0" default_value="0xff" />
+<reg address="0xf1" default_value="0x0" />
+<reg address="0xf2" default_value="0x0" />
+<reg address="0xf3" default_value="0xff" />
+<reg address="0xf4" default_value="0x0" />
+<reg address="0xf5" default_value="0x0" />
+<reg address="0xf6" default_value="0xff" />
+<reg address="0xf7" default_value="0x0" />
+<reg address="0xf8" default_value="0x0" />
+<reg address="0xf5" default_value="0x0" />
+</ldn>
+<ldn number="0xa" name="ACPI" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0xe0" default_value="0x0" />
+<reg address="0xe1" default_value="0x0" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0xe5" default_value="0x0" />
+<reg address="0xe6" default_value="0x0" />
+<reg address="0xe7" default_value="0x0" />
+<reg address="0xf0" default_value="0x0" />
+<reg address="0xf1" default_value="0x0" />
+<reg address="0xf3" default_value="0x0" />
+<reg address="0xf4" default_value="0x0" />
+<reg address="0xf6" default_value="0x0" />
+<reg address="0xf7" default_value="0x0" />
+<reg address="0xf9" default_value="0x0" />
+</ldn>
+<ldn number="0xb" name="Hardware monitor" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+</ldn>
+</sio>
+<sio model="W83L517D/D-F" id="0x610" >
+</sio>
+<sio model="W83637HF/HG" id="0x708" >
+</sio>
+<sio model="W83627THF/THG" id="0x828" >
+<noldn>
+<reg address="0x20" default_value="0x82" />
+<reg address="0x21" default_value="NANA" />
+<reg address="0x22" default_value="0xff" />
+<reg address="0x23" default_value="0x0" />
+<reg address="0x24" default_value="0xfffffffb" />
+<reg address="0x25" default_value="0x0" />
+<reg address="0x26" default_value="0xfffffffb" />
+<reg address="0x28" default_value="0x0" />
+<reg address="0x29" default_value="0x0" />
+<reg address="0x2a" default_value="0x0" />
+<reg address="0x2b" default_value="0xfffffffb" />
+<reg address="0x2c" default_value="0xfffffffb" />
+<reg address="0x2d" default_value="0xfffffffb" />
+<reg address="0x2e" default_value="0x0" />
+<reg address="0x2f" default_value="0x0" />
+</noldn>
+<ldn number="0x0" name="Floppy" description="">
+<reg address="0x30" default_value="0x1" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0xf0" />
+<reg address="0x70" default_value="0x6" />
+<reg address="0x74" default_value="0x2" />
+<reg address="0xf0" default_value="0xe" />
+<reg address="0xf1" default_value="0x0" />
+<reg address="0xf2" default_value="0xff" />
+<reg address="0xf4" default_value="0x0" />
+<reg address="0xf5" default_value="0x0" />
+</ldn>
+<ldn number="0x1" name="Parallel port" description="">
+<reg address="0x30" default_value="0x1" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0x78" />
+<reg address="0x70" default_value="0x7" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0xf0" default_value="0x3f" />
+</ldn>
+<ldn number="0x2" name="COM1" description="">
+<reg address="0x30" default_value="0x1" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0xf8" />
+<reg address="0x70" default_value="0x4" />
+<reg address="0xf0" default_value="0x0" />
+</ldn>
+<ldn number="0x3" name="COM2" description="">
+<reg address="0x30" default_value="0x1" />
+<reg address="0x60" default_value="0x2" />
+<reg address="0x61" default_value="0xf8" />
+<reg address="0x70" default_value="0x3" />
+<reg address="0xf0" default_value="0x0" />
+<reg address="0xf1" default_value="0x0" />
+</ldn>
+<ldn number="0x5" name="Keyboard" description="">
+<reg address="0x30" default_value="0x1" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x60" />
+<reg address="0x62" default_value="0x0" />
+<reg address="0x63" default_value="0x64" />
+<reg address="0x70" default_value="0x1" />
+<reg address="0x72" default_value="0xc" />
+<reg address="0xf0" default_value="0x80" />
+</ldn>
+<ldn number="0x7" name="GPIO 1, GPIO 5, game port, MIDI port" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x2" />
+<reg address="0x61" default_value="0x1" />
+<reg address="0x62" default_value="0x3" />
+<reg address="0x63" default_value="0x30" />
+<reg address="0x70" default_value="0x9" />
+<reg address="0xf0" default_value="0xff" />
+<reg address="0xf1" default_value="0x0" />
+<reg address="0xf2" default_value="0x0" />
+<reg address="0xf3" default_value="0xff" />
+<reg address="0xf4" default_value="0x0" />
+<reg address="0xf5" default_value="0x0" />
+</ldn>
+<ldn number="0x8" name="GPIO 2" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0xf0" default_value="0xff" />
+<reg address="0xf1" default_value="0x0" />
+<reg address="0xf2" default_value="0x0" />
+<reg address="0xf3" default_value="0x0" />
+<reg address="0xf4" default_value="0xfffffffc" />
+<reg address="0xf5" default_value="0x0" />
+<reg address="0xf6" default_value="0x0" />
+<reg address="0xf7" default_value="0x0" />
+</ldn>
+<ldn number="0x9" name="GPIO 3, GPIO 4" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0xf0" default_value="0xff" />
+<reg address="0xf1" default_value="0x0" />
+<reg address="0xf2" default_value="0x0" />
+<reg address="0xf3" default_value="0x0" />
+<reg address="0xf4" default_value="0xff" />
+<reg address="0xf5" default_value="0x0" />
+<reg address="0xf6" default_value="0x0" />
+</ldn>
+<ldn number="0xa" name="ACPI" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0xe0" default_value="0x0" />
+<reg address="0xe1" default_value="0x0" />
+<reg address="0xe2" default_value="0xfffffffb" />
+<reg address="0xe3" default_value="0xfffffffb" />
+<reg address="0xe4" default_value="0x0" />
+<reg address="0xe5" default_value="0x0" />
+<reg address="0xe6" default_value="0x0" />
+<reg address="0xe7" default_value="0x0" />
+<reg address="0xf0" default_value="0x0" />
+<reg address="0xf1" default_value="0x0" />
+<reg address="0xf3" default_value="0x0" />
+<reg address="0xf4" default_value="0x0" />
+<reg address="0xf6" default_value="0x0" />
+<reg address="0xf7" default_value="0x0" />
+<reg address="0xf9" default_value="0x0" />
+<reg address="0xfe" default_value="0xfffffffc" />
+<reg address="0xff" default_value="0xfffffffc" />
+</ldn>
+<ldn number="0xb" name="Hardware monitor" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+</ldn>
+</sio>
+<sio model="W83627DHG" id="0xa02" >
+<noldn>
+<reg address="0x2" default_value="0x0" />
+<reg address="0x20" default_value="0xa0" />
+<reg address="0x21" default_value="NANA" />
+<reg address="0x22" default_value="0xff" />
+<reg address="0x23" default_value="0x0" />
+<reg address="0x24" default_value="0xfffffffb" />
+<reg address="0x25" default_value="0x0" />
+<reg address="0x26" default_value="0xfffffffb" />
+<reg address="0x27" default_value="0xfffffffc" />
+<reg address="0x28" default_value="0x50" />
+<reg address="0x29" default_value="0x0" />
+<reg address="0x2a" default_value="0x0" />
+<reg address="0x2b" default_value="0xfffffffc" />
+<reg address="0x2c" default_value="0xe2" />
+<reg address="0x2d" default_value="0x21" />
+<reg address="0x2e" default_value="0x0" />
+<reg address="0x2f" default_value="0x0" />
+</noldn>
+<ldn number="0x0" name="Floppy" description="">
+<reg address="0x30" default_value="0x1" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0xf0" />
+<reg address="0x70" default_value="0x6" />
+<reg address="0x74" default_value="0x2" />
+<reg address="0xf0" default_value="0x8e" />
+<reg address="0xf1" default_value="0x0" />
+<reg address="0xf2" default_value="0xff" />
+<reg address="0xf4" default_value="0x0" />
+<reg address="0xf5" default_value="0x0" />
+</ldn>
+<ldn number="0x1" name="Parallel port" description="">
+<reg address="0x30" default_value="0x1" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0x78" />
+<reg address="0x70" default_value="0x7" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0xf0" default_value="0x3f" />
+</ldn>
+<ldn number="0x2" name="COM1" description="">
+<reg address="0x30" default_value="0x1" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0xf8" />
+<reg address="0x70" default_value="0x4" />
+<reg address="0xf0" default_value="0x0" />
+</ldn>
+<ldn number="0x3" name="COM2" description="">
+<reg address="0x30" default_value="0x1" />
+<reg address="0x60" default_value="0x2" />
+<reg address="0x61" default_value="0xf8" />
+<reg address="0x70" default_value="0x3" />
+<reg address="0xf0" default_value="0x0" />
+<reg address="0xf1" default_value="0x0" />
+</ldn>
+<ldn number="0x5" name="Keyboard" description="">
+<reg address="0x30" default_value="0x1" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x60" />
+<reg address="0x62" default_value="0x0" />
+<reg address="0x63" default_value="0x64" />
+<reg address="0x70" default_value="0x1" />
+<reg address="0x72" default_value="0xc" />
+<reg address="0xf0" default_value="0x83" />
+</ldn>
+<ldn number="0x6" name="Serial peripheral interface" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x62" default_value="0x0" />
+<reg address="0x63" default_value="0x0" />
+</ldn>
+<ldn number="0x7" name="GPIO 6" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0xf4" default_value="0xff" />
+<reg address="0xf5" default_value="0x0" />
+<reg address="0xf6" default_value="0x0" />
+<reg address="0xf7" default_value="0x0" />
+</ldn>
+<ldn number="0x8" name="WDTO#, PLED" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0xf5" default_value="0x0" />
+<reg address="0xf6" default_value="0x0" />
+<reg address="0xf7" default_value="0x0" />
+</ldn>
+<ldn number="0x9" name="GPIO 2, GPIO 3, GPIO 4, GPIO 5" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0xe0" default_value="0xff" />
+<reg address="0xe1" default_value="0x0" />
+<reg address="0xe2" default_value="0x0" />
+<reg address="0xe3" default_value="0xff" />
+<reg address="0xe4" default_value="0x0" />
+<reg address="0xe5" default_value="0x0" />
+<reg address="0xe6" default_value="0x0" />
+<reg address="0xe7" default_value="0x0" />
+<reg address="0xe8" default_value="0x0" />
+<reg address="0xe9" default_value="0x0" />
+<reg address="0xf0" default_value="0xff" />
+<reg address="0xf1" default_value="0x0" />
+<reg address="0xf2" default_value="0x0" />
+<reg address="0xf3" default_value="0x0" />
+<reg address="0xf4" default_value="0xff" />
+<reg address="0xf5" default_value="0x0" />
+<reg address="0xf6" default_value="0x0" />
+<reg address="0xf7" default_value="0x0" />
+<reg address="0xfe" default_value="0x0" />
+</ldn>
+<ldn number="0xa" name="ACPI" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0xe0" default_value="0x1" />
+<reg address="0xe1" default_value="0x0" />
+<reg address="0xe2" default_value="0xff" />
+<reg address="0xe3" default_value="0x8" />
+<reg address="0xe4" default_value="0x0" />
+<reg address="0xe5" default_value="0xfffffffc" />
+<reg address="0xe6" default_value="0x1c" />
+<reg address="0xe7" default_value="0x0" />
+<reg address="0xe8" default_value="0xfffffffc" />
+<reg address="0xe9" default_value="0xfffffffc" />
+<reg address="0xf2" default_value="0x7c" />
+<reg address="0xf3" default_value="0x0" />
+<reg address="0xf4" default_value="0x0" />
+<reg address="0xf6" default_value="0x0" />
+<reg address="0xf7" default_value="0x0" />
+<reg address="0xfe" default_value="0x0" />
+</ldn>
+<ldn number="0xb" name="Hardware monitor" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0xf0" default_value="0x81" />
+<reg address="0xf1" default_value="0x0" />
+<reg address="0xf2" default_value="0x0" />
+</ldn>
+<ldn number="0xc" name="PECI, SST" description="">
+<reg address="0xe0" default_value="0x0" />
+<reg address="0xe1" default_value="0x48" />
+<reg address="0xe2" default_value="0x48" />
+<reg address="0xe3" default_value="0x48" />
+<reg address="0xe4" default_value="0x48" />
+<reg address="0xe5" default_value="0x0" />
+<reg address="0xe8" default_value="0x0" />
+<reg address="0xf1" default_value="0x48" />
+<reg address="0xfe" default_value="0x0" />
+<reg address="0xff" default_value="0x0" />
+</ldn>
+</sio>
+<sio model="W83627UHG" id="0xa23" >
+</sio>
+<sio model="W83667HG" id="0xa51" >
+</sio>
+<sio model="Nuvoton NCT5571D" id="0xb35" >
+<noldn>
+<reg address="0x2" default_value="0xfffffffc" />
+<reg address="0x20" default_value="0xb3" />
+<reg address="0x21" default_value="NANA" />
+<reg address="0x22" default_value="0xff" />
+<reg address="0x23" default_value="0x0" />
+<reg address="0x24" default_value="0x40" />
+<reg address="0x25" default_value="0x0" />
+<reg address="0x26" default_value="0xfffffffb" />
+<reg address="0x27" default_value="0xff" />
+<reg address="0x28" default_value="0x20" />
+<reg address="0x29" default_value="0x0" />
+<reg address="0x2a" default_value="0x0" />
+<reg address="0x2b" default_value="0x7f" />
+<reg address="0x2c" default_value="0xa" />
+<reg address="0x2d" default_value="0x8" />
+<reg address="0x2e" default_value="0x0" />
+<reg address="0x2f" default_value="0xfffffffb" />
+</noldn>
+<ldn number="0x2" name="COM1" description="">
+<reg address="0x30" default_value="0x1" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0xf8" />
+<reg address="0x70" default_value="0x4" />
+<reg address="0xf0" default_value="0x0" />
+</ldn>
+<ldn number="0x5" name="Keyboard" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x62" default_value="0x0" />
+<reg address="0x63" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0x72" default_value="0x0" />
+<reg address="0xf0" default_value="0x83" />
+</ldn>
+<ldn number="0x7" name="GPIO 6, GPIO 8, GPIO 9" description="">
+<reg address="0x30" default_value="0x18" />
+<reg address="0xe4" default_value="0xef" />
+<reg address="0xe5" default_value="0xfffffffb" />
+<reg address="0xe6" default_value="0x0" />
+<reg address="0xe7" default_value="0x0" />
+<reg address="0xe8" default_value="0xff" />
+<reg address="0xe9" default_value="0xfffffffb" />
+<reg address="0xea" default_value="0x0" />
+<reg address="0xeb" default_value="0x0" />
+<reg address="0xec" default_value="0xfffffffc" />
+<reg address="0xed" default_value="0x0" />
+<reg address="0xee" default_value="0x0" />
+<reg address="0xf4" default_value="0xff" />
+<reg address="0xf5" default_value="0xfffffffb" />
+<reg address="0xf6" default_value="0x0" />
+<reg address="0xf7" default_value="0x0" />
+<reg address="0xf8" default_value="0x0" />
+</ldn>
+<ldn number="0x9" name="GPIO 2, GPIO 3, GPIO 5" description="">
+<reg address="0x30" default_value="0x5" />
+<reg address="0xe0" default_value="0xff" />
+<reg address="0xe1" default_value="0xfffffffb" />
+<reg address="0xe2" default_value="0x0" />
+<reg address="0xe3" default_value="0x0" />
+<reg address="0xe4" default_value="0xff" />
+<reg address="0xe5" default_value="0xfffffffb" />
+<reg address="0xe6" default_value="0x0" />
+<reg address="0xe7" default_value="0x0" />
+<reg address="0xe9" default_value="0x0" />
+<reg address="0xea" default_value="0x0" />
+<reg address="0xeb" default_value="0x0" />
+<reg address="0xf4" default_value="0xff" />
+<reg address="0xf5" default_value="0xfffffffb" />
+<reg address="0xf6" default_value="0x0" />
+<reg address="0xf7" default_value="0x0" />
+<reg address="0xfe" default_value="0x0" />
+</ldn>
+<ldn number="0xa" name="ACPI" description="">
+<reg address="0xe0" default_value="0x1" />
+<reg address="0xe1" default_value="0x0" />
+<reg address="0xe2" default_value="0xff" />
+<reg address="0xe3" default_value="0x0" />
+<reg address="0xe4" default_value="0x0" />
+<reg address="0xe5" default_value="0x2" />
+<reg address="0xe6" default_value="0x1c" />
+<reg address="0xe7" default_value="0x0" />
+<reg address="0xe8" default_value="0xfffffffc" />
+<reg address="0xe9" default_value="0x0" />
+<reg address="0xf2" default_value="0x7c" />
+<reg address="0xf3" default_value="0x0" />
+<reg address="0xf4" default_value="0x0" />
+<reg address="0xf6" default_value="0x0" />
+<reg address="0xf7" default_value="0x0" />
+<reg address="0xfe" default_value="0x0" />
+<reg address="0xff" default_value="0x30" />
+</ldn>
+<ldn number="0xb" name="Hardware monitor" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0xe0" default_value="0x0" />
+<reg address="0xe1" default_value="0x0" />
+<reg address="0xe2" default_value="0x0" />
+<reg address="0xe3" default_value="0x0" />
+<reg address="0xf0" default_value="0xc1" />
+<reg address="0xf5" default_value="0x10" />
+</ldn>
+<ldn number="0xc" name="PECI" description="">
+<reg address="0xe0" default_value="0x0" />
+<reg address="0xe1" default_value="0x48" />
+<reg address="0xe2" default_value="0x48" />
+<reg address="0xe3" default_value="0x48" />
+<reg address="0xe4" default_value="0x48" />
+<reg address="0xe5" default_value="0x0" />
+<reg address="0xe6" default_value="0x0" />
+<reg address="0xe8" default_value="0x0" />
+<reg address="0xe9" default_value="0xfffffffc" />
+<reg address="0xea" default_value="0x0" />
+<reg address="0xec" default_value="0x0" />
+<reg address="0xee" default_value="0x1" />
+<reg address="0xef" default_value="0x5a" />
+<reg address="0xf1" default_value="0x48" />
+<reg address="0xf2" default_value="0x50" />
+<reg address="0xf3" default_value="0x10" />
+<reg address="0xfe" default_value="0x80" />
+<reg address="0xff" default_value="0x1" />
+</ldn>
+<ldn number="0xd" name="SUSLED" description="">
+<reg address="0xec" default_value="0x1" />
+</ldn>
+<ldn number="0xf" name="GPIO Push-Pull/OD Select" description="">
+<reg address="0xe0" default_value="0xfffffffc" />
+<reg address="0xe1" default_value="0xfd" />
+<reg address="0xe3" default_value="0xfffffffc" />
+<reg address="0xe4" default_value="0xf7" />
+<reg address="0xe5" default_value="0xcb" />
+<reg address="0xe6" default_value="0xfffffffc" />
+<reg address="0xe7" default_value="0xff" />
+<reg address="0xe8" default_value="0xff" />
+<reg address="0xe9" default_value="0x0" />
+<reg address="0xf0" default_value="0xfffffffb" />
+<reg address="0xf1" default_value="0xfffffffb" />
+<reg address="0xf2" default_value="0xfffffffb" />
+<reg address="0xf3" default_value="0xfffffffb" />
+<reg address="0xf4" default_value="0xfffffffb" />
+<reg address="0xf5" default_value="0xfffffffb" />
+<reg address="0xf6" default_value="0xfffffffb" />
+<reg address="0xf7" default_value="0xfffffffb" />
+<reg address="0xf8" default_value="0xfffffffb" />
+<reg address="0xf9" default_value="0xfffffffb" />
+<reg address="0xfa" default_value="0xfffffffb" />
+<reg address="0xfb" default_value="0xfffffffb" />
+<reg address="0xfc" default_value="0xfffffffb" />
+<reg address="0xfd" default_value="0xfffffffb" />
+<reg address="0xfe" default_value="0xfffffffb" />
+<reg address="0xff" default_value="0xfffffffb" />
+</ldn>
+</sio>
+<sio model="W83977F-A/G-A/AF-A/AG-A" id="0x9771" >
+</sio>
+<sio model="W83977AF" id="0x9777" >
+</sio>
+<sio model="W83977TF" id="0x9773" >
+<noldn>
+<reg address="0x20" default_value="0x97" />
+<reg address="0x21" default_value="0x73" />
+<reg address="0x22" default_value="0xff" />
+<reg address="0x23" default_value="0xfe" />
+<reg address="0x24" default_value="0xfffffffb" />
+<reg address="0x25" default_value="0x0" />
+<reg address="0x26" default_value="0xfffffffb" />
+<reg address="0x28" default_value="0x0" />
+<reg address="0x2a" default_value="0x0" />
+<reg address="0x2b" default_value="0x0" />
+<reg address="0x2c" default_value="0x0" />
+<reg address="0x2d" default_value="0xfffffffc" />
+<reg address="0x2e" default_value="0xfffffffc" />
+<reg address="0x2f" default_value="0xfffffffc" />
+</noldn>
+<ldn number="0x0" name="Floppy" description="">
+<reg address="0x30" default_value="0x1" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0xf0" />
+<reg address="0x70" default_value="0x6" />
+<reg address="0x74" default_value="0x2" />
+<reg address="0xf0" default_value="0xe" />
+<reg address="0xf1" default_value="0x0" />
+<reg address="0xf2" default_value="0xff" />
+<reg address="0xf4" default_value="0x0" />
+<reg address="0xf5" default_value="0x0" />
+</ldn>
+<ldn number="0x1" name="Parallel port" description="">
+<reg address="0x30" default_value="0x1" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0x78" />
+<reg address="0x70" default_value="0x7" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0xf0" default_value="0x3f" />
+</ldn>
+<ldn number="0x2" name="COM1" description="">
+<reg address="0x30" default_value="0x1" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0xf8" />
+<reg address="0x70" default_value="0x4" />
+<reg address="0xf0" default_value="0x0" />
+</ldn>
+<ldn number="0x3" name="COM2" description="">
+<reg address="0x30" default_value="0x1" />
+<reg address="0x60" default_value="0x2" />
+<reg address="0x61" default_value="0xf8" />
+<reg address="0x70" default_value="0x3" />
+<reg address="0xf0" default_value="0x0" />
+<reg address="0xf1" default_value="0x0" />
+</ldn>
+<ldn number="0x5" name="Keyboard / mouse" description="">
+<reg address="0x30" default_value="0x1" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x60" />
+<reg address="0x62" default_value="0x0" />
+<reg address="0x63" default_value="0x64" />
+<reg address="0x70" default_value="0x1" />
+<reg address="0x72" default_value="0xc" />
+<reg address="0xf0" default_value="0x83" />
+</ldn>
+<ldn number="0x7" name="GPIO 1" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x62" default_value="0x0" />
+<reg address="0x63" default_value="0x0" />
+<reg address="0x64" default_value="0x0" />
+<reg address="0x65" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0x72" default_value="0x0" />
+<reg address="0xe0" default_value="0x1" />
+<reg address="0xe1" default_value="0x1" />
+<reg address="0xe2" default_value="0x1" />
+<reg address="0xe3" default_value="0x1" />
+<reg address="0xe4" default_value="0x1" />
+<reg address="0xe5" default_value="0x1" />
+<reg address="0xe6" default_value="0x1" />
+<reg address="0xe7" default_value="0x1" />
+<reg address="0xf1" default_value="0x0" />
+</ldn>
+<ldn number="0x8" name="GPIO 2" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0x72" default_value="0x0" />
+<reg address="0xe8" default_value="0x1" />
+<reg address="0xe9" default_value="0x1" />
+<reg address="0xea" default_value="0x1" />
+<reg address="0xeb" default_value="0x1" />
+<reg address="0xec" default_value="0x1" />
+<reg address="0xed" default_value="0x1" />
+<reg address="0xee" default_value="0x1" />
+<reg address="0xf0" default_value="0x0" />
+<reg address="0xf1" default_value="0xfffffffc" />
+<reg address="0xf2" default_value="0x0" />
+<reg address="0xf3" default_value="0x0" />
+<reg address="0xf4" default_value="0x0" />
+</ldn>
+<ldn number="0x9" name="GPIO 3" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x62" default_value="0x0" />
+<reg address="0x63" default_value="0x0" />
+<reg address="0x64" default_value="0x0" />
+<reg address="0x65" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0x72" default_value="0x0" />
+<reg address="0xe0" default_value="0x1" />
+<reg address="0xe1" default_value="0x1" />
+<reg address="0xe2" default_value="0x1" />
+<reg address="0xe3" default_value="0x1" />
+<reg address="0xe4" default_value="0x1" />
+<reg address="0xe5" default_value="0x1" />
+<reg address="0xe6" default_value="0x1" />
+<reg address="0xe7" default_value="0x1" />
+<reg address="0xf1" default_value="0x0" />
+</ldn>
+<ldn number="0xa" name="ACPI" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x62" default_value="0x0" />
+<reg address="0x63" default_value="0x0" />
+<reg address="0x64" default_value="0x0" />
+<reg address="0x65" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0xe0" default_value="0x0" />
+<reg address="0xe1" default_value="0x0" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0xe3" default_value="0xfffffffb" />
+<reg address="0xe4" default_value="0xfffffffc" />
+<reg address="0xf0" default_value="0x0" />
+<reg address="0xf1" default_value="0x0" />
+<reg address="0xf2" default_value="0x0" />
+<reg address="0xf3" default_value="0x0" />
+<reg address="0xf4" default_value="0x0" />
+<reg address="0xf5" default_value="0x0" />
+<reg address="0xf6" default_value="0x0" />
+<reg address="0xf7" default_value="0x0" />
+<reg address="0xfe" default_value="0xfffffffc" />
+<reg address="0xff" default_value="0xfffffffc" />
+</ldn>
+</sio>
+<sio model="W83977ATF" id="0x9774" >
+</sio>
+<sio model="W83527HG" id="0xb07" >
+<noldn>
+<reg address="0x20" default_value="0xb0" />
+<reg address="0x21" default_value="0x73" />
+<reg address="0x22" default_value="0xff" />
+<reg address="0x23" default_value="0x0" />
+<reg address="0x24" default_value="0xfffffffb" />
+<reg address="0x25" default_value="0x0" />
+<reg address="0x26" default_value="0x0" />
+<reg address="0x27" default_value="0xfffffffc" />
+<reg address="0x28" default_value="0x50" />
+<reg address="0x29" default_value="0x0" />
+<reg address="0x2a" default_value="0x0" />
+<reg address="0x2b" default_value="0xfffffffc" />
+<reg address="0x2c" default_value="0xe2" />
+<reg address="0x2d" default_value="0x21" />
+<reg address="0x2e" default_value="0x0" />
+<reg address="0x2f" default_value="0x0" />
+</noldn>
+<ldn number="0x5" name="Keyboard" description="">
+<reg address="0x30" default_value="0x1" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x60" />
+<reg address="0x62" default_value="0x0" />
+<reg address="0x63" default_value="0x64" />
+<reg address="0x70" default_value="0x1" />
+<reg address="0x72" default_value="0xc" />
+<reg address="0xf0" default_value="0x83" />
+</ldn>
+<ldn number="0x8" name="WDTO#, PLED" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0xf5" default_value="0x0" />
+<reg address="0xf6" default_value="0x0" />
+<reg address="0xf7" default_value="0x0" />
+</ldn>
+<ldn number="0x9" name="GPIO 2, GPIO3, GPIO5" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0xe0" default_value="0xff" />
+<reg address="0xe1" default_value="0x0" />
+<reg address="0xe2" default_value="0x0" />
+<reg address="0xe3" default_value="0xff" />
+<reg address="0xe4" default_value="0x0" />
+<reg address="0xe5" default_value="0x0" />
+<reg address="0xe6" default_value="0x0" />
+<reg address="0xe7" default_value="0x0" />
+<reg address="0xe9" default_value="0x0" />
+<reg address="0xf0" default_value="0xff" />
+<reg address="0xf1" default_value="0x0" />
+<reg address="0xf2" default_value="0x0" />
+<reg address="0xf3" default_value="0x0" />
+<reg address="0xf8" default_value="0x0" />
+<reg address="0xf9" default_value="0x0" />
+<reg address="0xfa" default_value="0x0" />
+<reg address="0xfe" default_value="0x0" />
+</ldn>
+<ldn number="0xa" name="ACPI" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0xe0" default_value="0x1" />
+<reg address="0xe1" default_value="0x0" />
+<reg address="0xe2" default_value="0xff" />
+<reg address="0xe3" default_value="0x8" />
+<reg address="0xe4" default_value="0x0" />
+<reg address="0xe5" default_value="0x0" />
+<reg address="0xe6" default_value="0x1c" />
+<reg address="0xe7" default_value="0x0" />
+<reg address="0xe8" default_value="0xfffffffc" />
+<reg address="0xe9" default_value="0xfffffffc" />
+<reg address="0xf2" default_value="0x7c" />
+<reg address="0xf3" default_value="0x0" />
+<reg address="0xf4" default_value="0x0" />
+<reg address="0xf6" default_value="0x0" />
+<reg address="0xf7" default_value="0x0" />
+<reg address="0xfe" default_value="0x0" />
+</ldn>
+<ldn number="0xb" name="Hardware monitor" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0xf0" default_value="0x81" />
+<reg address="0xf1" default_value="0xfffffffc" />
+<reg address="0xf2" default_value="0x0" />
+</ldn>
+<ldn number="0xc" name="PECI" description="">
+<reg address="0xe0" default_value="0x0" />
+<reg address="0xe1" default_value="0x48" />
+<reg address="0xe2" default_value="0x48" />
+<reg address="0xe3" default_value="0x48" />
+<reg address="0xe4" default_value="0x48" />
+<reg address="0xe5" default_value="0x0" />
+<reg address="0xe8" default_value="0x0" />
+<reg address="0xe9" default_value="0xfffffffc" />
+<reg address="0xea" default_value="0x0" />
+<reg address="0xec" default_value="0x0" />
+<reg address="0xfe" default_value="0x0" />
+<reg address="0xff" default_value="0x0" />
+</ldn>
+</sio>
+<sio model="W83627HF/F/HG/G" id="0x52" >
+<noldn>
+<reg address="0x2" default_value="0x0" />
+<reg address="0x20" default_value="0x52" />
+<reg address="0x21" default_value="NANA" />
+<reg address="0x22" default_value="0xff" />
+<reg address="0x23" default_value="0x0" />
+<reg address="0x24" default_value="0xfffffffb" />
+<reg address="0x25" default_value="0x0" />
+<reg address="0x26" default_value="0x0" />
+<reg address="0x28" default_value="0x0" />
+<reg address="0x29" default_value="0x0" />
+<reg address="0x2a" default_value="0x7c" />
+<reg address="0x2b" default_value="0xc0" />
+<reg address="0x2c" default_value="0x0" />
+<reg address="0x2e" default_value="0x0" />
+<reg address="0x2f" default_value="0x0" />
+</noldn>
+<ldn number="0x0" name="Floppy" description="">
+<reg address="0x30" default_value="0x1" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0xf0" />
+<reg address="0x70" default_value="0x6" />
+<reg address="0x74" default_value="0x2" />
+<reg address="0xf0" default_value="0xe" />
+<reg address="0xf1" default_value="0x0" />
+<reg address="0xf2" default_value="0xff" />
+<reg address="0xf4" default_value="0x0" />
+<reg address="0xf5" default_value="0x0" />
+</ldn>
+<ldn number="0x1" name="Parallel port" description="">
+<reg address="0x30" default_value="0x1" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0x78" />
+<reg address="0x70" default_value="0x7" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0xf0" default_value="0x3f" />
+</ldn>
+<ldn number="0x2" name="COM1" description="">
+<reg address="0x30" default_value="0x1" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0xf8" />
+<reg address="0x70" default_value="0x4" />
+<reg address="0xf0" default_value="0x0" />
+</ldn>
+<ldn number="0x3" name="COM2" description="">
+<reg address="0x30" default_value="0x1" />
+<reg address="0x60" default_value="0x2" />
+<reg address="0x61" default_value="0xf8" />
+<reg address="0x70" default_value="0x3" />
+<reg address="0xf0" default_value="0x0" />
+<reg address="0xf1" default_value="0x0" />
+</ldn>
+<ldn number="0x5" name="Keyboard" description="">
+<reg address="0x30" default_value="0x1" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x60" />
+<reg address="0x62" default_value="0x0" />
+<reg address="0x63" default_value="0x64" />
+<reg address="0x70" default_value="0x1" />
+<reg address="0x72" default_value="0xc" />
+<reg address="0xf0" default_value="0x80" />
+</ldn>
+<ldn number="0x6" name="Consumer IR" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+</ldn>
+<ldn number="0x7" name="Game port, MIDI port, GPIO 1" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x2" />
+<reg address="0x61" default_value="0x1" />
+<reg address="0x62" default_value="0x3" />
+<reg address="0x63" default_value="0x30" />
+<reg address="0x70" default_value="0x9" />
+<reg address="0xf0" default_value="0xff" />
+<reg address="0xf1" default_value="0x0" />
+<reg address="0xf2" default_value="0x0" />
+</ldn>
+<ldn number="0x8" name="GPIO 2, watchdog timer" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0xf0" default_value="0xff" />
+<reg address="0xf1" default_value="0x0" />
+<reg address="0xf2" default_value="0x0" />
+<reg address="0xf3" default_value="0x0" />
+<reg address="0xf5" default_value="0x0" />
+<reg address="0xf6" default_value="0x0" />
+<reg address="0xf6" default_value="0x0" />
+<reg address="0xf7" default_value="0x0" />
+</ldn>
+<ldn number="0x9" name="GPIO 3" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0xf0" default_value="0xff" />
+<reg address="0xf1" default_value="0x0" />
+<reg address="0xf2" default_value="0x0" />
+<reg address="0xf3" default_value="0x0" />
+</ldn>
+<ldn number="0xa" name="ACPI" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0xe0" default_value="0x0" />
+<reg address="0xe1" default_value="0x0" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0xe4" default_value="0x0" />
+<reg address="0xe5" default_value="0x0" />
+<reg address="0xe6" default_value="0x0" />
+<reg address="0xe7" default_value="0x0" />
+<reg address="0xf0" default_value="0x0" />
+<reg address="0xf1" default_value="0x0" />
+<reg address="0xf3" default_value="0x0" />
+<reg address="0xf4" default_value="0x0" />
+<reg address="0xf6" default_value="0x0" />
+<reg address="0xf7" default_value="0x0" />
+<reg address="0xf9" default_value="0x0" />
+<reg address="0xfe" default_value="0x0" />
+<reg address="0xff" default_value="0x0" />
+</ldn>
+<ldn number="0xb" name="Hardware monitor" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0xf0" default_value="0x0" />
+</ldn>
+</sio>
+<sio model="W83697SF/UF/UG" id="0x68" >
+<noldn>
+<reg address="0x20" default_value="0x68" />
+<reg address="0x21" default_value="NANA" />
+<reg address="0x22" default_value="0xef" />
+<reg address="0x23" default_value="0xfe" />
+<reg address="0x24" default_value="0xfffffffb" />
+<reg address="0x25" default_value="0x0" />
+<reg address="0x26" default_value="0x0" />
+<reg address="0x28" default_value="0x0" />
+<reg address="0x29" default_value="0x0" />
+<reg address="0x2a" default_value="0xfffffffb" />
+<reg address="0x2b" default_value="0x0" />
+<reg address="0x2c" default_value="0x30" />
+</noldn>
+<ldn number="0x0" name="Floppy" description="">
+<reg address="0x30" default_value="0x1" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0xf0" />
+<reg address="0x70" default_value="0x6" />
+<reg address="0x74" default_value="0x2" />
+<reg address="0xf0" default_value="0xe" />
+<reg address="0xf1" default_value="0x0" />
+<reg address="0xf2" default_value="0xff" />
+<reg address="0xf4" default_value="0x0" />
+<reg address="0xf5" default_value="0x0" />
+</ldn>
+<ldn number="0x1" name="Parallel port" description="">
+<reg address="0x30" default_value="0x1" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0x78" />
+<reg address="0x70" default_value="0x7" />
+<reg address="0x74" default_value="0x3" />
+<reg address="0xf0" default_value="0x3f" />
+</ldn>
+<ldn number="0x2" name="COM1" description="">
+<reg address="0x30" default_value="0x1" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0xf8" />
+<reg address="0x70" default_value="0x4" />
+<reg address="0xf0" default_value="0x0" />
+</ldn>
+<ldn number="0x3" name="COM2" description="">
+<reg address="0x30" default_value="0x1" />
+<reg address="0x60" default_value="0x2" />
+<reg address="0x61" default_value="0xf8" />
+<reg address="0x70" default_value="0x3" />
+<reg address="0xf0" default_value="0x0" />
+<reg address="0xf1" default_value="0x0" />
+</ldn>
+<ldn number="0x7" name="Game port, GPIO 1" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x2" />
+<reg address="0x61" default_value="0x1" />
+<reg address="0x62" default_value="0x0" />
+<reg address="0x63" default_value="0x0" />
+<reg address="0xf0" default_value="0xff" />
+<reg address="0xf1" default_value="0x0" />
+<reg address="0xf2" default_value="0x0" />
+</ldn>
+<ldn number="0x8" name="MIDI port, GPIO 5" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0x30" />
+<reg address="0x62" default_value="0x0" />
+<reg address="0x63" default_value="0x0" />
+<reg address="0x70" default_value="0x9" />
+<reg address="0xf0" default_value="0xff" />
+<reg address="0xf1" default_value="0x0" />
+<reg address="0xf2" default_value="0x0" />
+<reg address="0xf3" default_value="0x0" />
+<reg address="0xf4" default_value="0x0" />
+<reg address="0xf5" default_value="0x0" />
+</ldn>
+<ldn number="0x9" name="GPIO 2, GPIO 3, GPIO 4" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0xf0" default_value="0xff" />
+<reg address="0xf1" default_value="0x0" />
+<reg address="0xf2" default_value="0x0" />
+<reg address="0xf3" default_value="0xff" />
+<reg address="0xf4" default_value="0x0" />
+<reg address="0xf5" default_value="0x0" />
+<reg address="0xf6" default_value="0xff" />
+<reg address="0xf7" default_value="0x0" />
+<reg address="0xf8" default_value="0x0" />
+</ldn>
+<ldn number="0xa" name="ACPI" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0xf0" default_value="0x0" />
+<reg address="0xf1" default_value="0x0" />
+<reg address="0xf2" default_value="0x0" />
+<reg address="0xf3" default_value="0x0" />
+<reg address="0xf4" default_value="0x0" />
+<reg address="0xf6" default_value="0x0" />
+<reg address="0xf7" default_value="0x0" />
+<reg address="0xf9" default_value="0x0" />
+<reg address="0xfa" default_value="0x0" />
+</ldn>
+<ldn number="0xb" name="PWM" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+</ldn>
+<ldn number="0xc" name="Smart card" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0xf0" default_value="0x0" />
+</ldn>
+<ldn number="0xd" name="URC, GPIO 6" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0xe8" />
+<reg address="0x62" default_value="0x0" />
+<reg address="0x63" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0xf0" default_value="0x0" />
+<reg address="0xf1" default_value="0xff" />
+<reg address="0xf2" default_value="0x0" />
+<reg address="0xf3" default_value="0x0" />
+<reg address="0xf4" default_value="0x0" />
+</ldn>
+<ldn number="0xe" name="URD, GPIO 7" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x2" />
+<reg address="0x61" default_value="0xe8" />
+<reg address="0x62" default_value="0x0" />
+<reg address="0x63" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0xf0" default_value="0x0" />
+<reg address="0xf1" default_value="0xff" />
+<reg address="0xf2" default_value="0x0" />
+<reg address="0xf3" default_value="0x0" />
+</ldn>
+<ldn number="0xf" name="GPIO 8" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0xf0" default_value="0xff" />
+<reg address="0xf1" default_value="0x0" />
+<reg address="0xf2" default_value="0x0" />
+</ldn>
+</sio>
+<sio model="W83627EHF/EF/EHG/EG" id="0x88" >
+<noldn>
+<reg address="0x20" default_value="0x88" />
+<reg address="0x21" default_value="0xfffffffb" />
+<reg address="0x22" default_value="0xff" />
+<reg address="0x23" default_value="0x0" />
+<reg address="0x24" default_value="0xfffffffb" />
+<reg address="0x25" default_value="0x0" />
+<reg address="0x26" default_value="0xfffffffb" />
+<reg address="0x27" default_value="0xfffffffc" />
+<reg address="0x28" default_value="0x50" />
+<reg address="0x29" default_value="0x4" />
+<reg address="0x2a" default_value="0x0" />
+<reg address="0x2b" default_value="0xfffffffc" />
+<reg address="0x2c" default_value="0x0" />
+<reg address="0x2d" default_value="0x21" />
+<reg address="0x2e" default_value="0x0" />
+<reg address="0x2f" default_value="0x0" />
+</noldn>
+<ldn number="0x0" name="Floppy" description="">
+<reg address="0x30" default_value="0x1" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0xf0" />
+<reg address="0x70" default_value="0x6" />
+<reg address="0x74" default_value="0x2" />
+<reg address="0xf0" default_value="0x8e" />
+<reg address="0xf1" default_value="0x0" />
+<reg address="0xf2" default_value="0xff" />
+<reg address="0xf4" default_value="0x0" />
+<reg address="0xf5" default_value="0x0" />
+</ldn>
+<ldn number="0x1" name="Parallel port" description="">
+<reg address="0x30" default_value="0x1" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0x78" />
+<reg address="0x70" default_value="0x7" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0xf0" default_value="0x3f" />
+</ldn>
+<ldn number="0x2" name="COM1" description="">
+<reg address="0x30" default_value="0x1" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0xf8" />
+<reg address="0x70" default_value="0x4" />
+<reg address="0xf0" default_value="0x0" />
+</ldn>
+<ldn number="0x3" name="COM2" description="">
+<reg address="0x30" default_value="0x1" />
+<reg address="0x60" default_value="0x2" />
+<reg address="0x61" default_value="0xf8" />
+<reg address="0x70" default_value="0x3" />
+<reg address="0xf0" default_value="0x0" />
+<reg address="0xf1" default_value="0x0" />
+</ldn>
+<ldn number="0x5" name="Keyboard" description="">
+<reg address="0x30" default_value="0x1" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x60" />
+<reg address="0x62" default_value="0x0" />
+<reg address="0x63" default_value="0x64" />
+<reg address="0x70" default_value="0x1" />
+<reg address="0x72" default_value="0xc" />
+<reg address="0xf0" default_value="0x83" />
+</ldn>
+<ldn number="0x6" name="Serial flash interface" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x62" default_value="0x0" />
+<reg address="0x63" default_value="0x0" />
+</ldn>
+<ldn number="0x7" name="GPIO 1, GPIO 6, game port, MIDI port" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x2" />
+<reg address="0x61" default_value="0x1" />
+<reg address="0x62" default_value="0x3" />
+<reg address="0x63" default_value="0x30" />
+<reg address="0x70" default_value="0x9" />
+<reg address="0xf0" default_value="0xff" />
+<reg address="0xf1" default_value="0x0" />
+<reg address="0xf2" default_value="0x0" />
+<reg address="0xf3" default_value="0x0" />
+<reg address="0xf4" default_value="0xff" />
+<reg address="0xf5" default_value="0x0" />
+<reg address="0xf6" default_value="0x0" />
+<reg address="0xf7" default_value="0x0" />
+</ldn>
+<ldn number="0x8" name="WDTO#, PLED" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0xf5" default_value="0x0" />
+<reg address="0xf6" default_value="0x0" />
+<reg address="0xf7" default_value="0x0" />
+</ldn>
+<ldn number="0x9" name="GPIO 2, GPIO 3, GPIO 4, GPIO 5, SUSLED" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0xe0" default_value="0xff" />
+<reg address="0xe1" default_value="0x0" />
+<reg address="0xe2" default_value="0x0" />
+<reg address="0xe3" default_value="0xff" />
+<reg address="0xe4" default_value="0x0" />
+<reg address="0xe5" default_value="0x0" />
+<reg address="0xf0" default_value="0xff" />
+<reg address="0xf1" default_value="0x0" />
+<reg address="0xf2" default_value="0x0" />
+<reg address="0xf3" default_value="0x0" />
+<reg address="0xf4" default_value="0xff" />
+<reg address="0xf5" default_value="0x0" />
+<reg address="0xf6" default_value="0x0" />
+<reg address="0xf7" default_value="0x0" />
+</ldn>
+<ldn number="0xa" name="ACPI" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0xe0" default_value="0x1" />
+<reg address="0xe1" default_value="0x0" />
+<reg address="0xe2" default_value="0xff" />
+<reg address="0xe3" default_value="0x8" />
+<reg address="0xe4" default_value="0x0" />
+<reg address="0xe5" default_value="0xfffffffc" />
+<reg address="0xe6" default_value="0x0" />
+<reg address="0xe7" default_value="0x0" />
+<reg address="0xe8" default_value="0xfffffffc" />
+<reg address="0xf2" default_value="0x7c" />
+<reg address="0xf3" default_value="0x0" />
+<reg address="0xf4" default_value="0x0" />
+<reg address="0xf6" default_value="0x0" />
+<reg address="0xf7" default_value="0x0" />
+</ldn>
+<ldn number="0xb" name="Hardware monitor" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0xf0" default_value="0xc1" />
+<reg address="0xf1" default_value="0x0" />
+</ldn>
+</sio>
+<sio model="W83877F" id="0xa" >
+</sio>
+<sio model="W83877AF" id="0xb" >
+<noldn>
+<reg address="0x1" default_value="0x0" />
+<reg address="0x2" default_value="0x0" />
+<reg address="0x3" default_value="0x30" />
+<reg address="0x4" default_value="0x0" />
+<reg address="0x5" default_value="0x0" />
+<reg address="0x6" default_value="0x0" />
+<reg address="0x7" default_value="0x0" />
+<reg address="0x8" default_value="0x0" />
+<reg address="0x9" default_value="0xa" />
+<reg address="0xa" default_value="0x1f" />
+<reg address="0xb" default_value="0xc" />
+<reg address="0xc" default_value="0x28" />
+<reg address="0xd" default_value="0xa3" />
+<reg address="0xe" default_value="0xfffffffc" />
+<reg address="0xf" default_value="0xfffffffc" />
+<reg address="0x10" default_value="0x0" />
+<reg address="0x11" default_value="0x0" />
+<reg address="0x12" default_value="0x0" />
+<reg address="0x13" default_value="0x0" />
+<reg address="0x14" default_value="0x0" />
+<reg address="0x15" default_value="0x0" />
+<reg address="0x16" default_value="0xe" />
+<reg address="0x17" default_value="0x0" />
+<reg address="0x1e" default_value="0xfffffffb" />
+<reg address="0x20" default_value="0xfffffffb" />
+<reg address="0x21" default_value="0xfffffffb" />
+<reg address="0x22" default_value="0xfffffffb" />
+<reg address="0x23" default_value="0xfffffffb" />
+<reg address="0x24" default_value="0xfffffffb" />
+<reg address="0x25" default_value="0xfffffffb" />
+<reg address="0x26" default_value="0xfffffffb" />
+<reg address="0x27" default_value="0xfffffffb" />
+<reg address="0x28" default_value="0xfffffffb" />
+<reg address="0x29" default_value="0xfffffffb" />
+<reg address="0x2a" default_value="0xfffffffb" />
+<reg address="0x2b" default_value="0xfffffffb" />
+<reg address="0x2c" default_value="0xfffffffb" />
+<reg address="0x2d" default_value="0xfffffffb" />
+</noldn>
+</sio>
+<sio model="W83877TF" id="0xc" >
+</sio>
+<sio model="W83877ATF/ATG" id="0xd" >
+</sio>
+</sioarray>
Index: util/pygen/data/sio/fintek.sio.xml
===================================================================
--- util/pygen/data/sio/fintek.sio.xml	(revision 0)
+++ util/pygen/data/sio/fintek.sio.xml	(revision 0)
@@ -0,0 +1,649 @@ 
+<?xml version="1.0" encoding="UTF-8"?>
+<sioarray name="fintek" description="fintek superios">
+<sio model="F71862FG / F71863FG" id="0x106" >
+<noldn>
+<reg address="0x20" default_value="0x6" />
+<reg address="0x21" default_value="0x1" />
+<reg address="0x23" default_value="0x19" />
+<reg address="0x24" default_value="0x34" />
+<reg address="0x25" default_value="0x0" />
+<reg address="0x26" default_value="0x0" />
+<reg address="0x27" default_value="0xfffffffb" />
+<reg address="0x28" default_value="0x0" />
+<reg address="0x29" default_value="0x0" />
+<reg address="0x2a" default_value="0x0" />
+<reg address="0x2b" default_value="0x0" />
+<reg address="0x2c" default_value="0x0" />
+<reg address="0x2d" default_value="0x8" />
+</noldn>
+<ldn number="0x0" name="Floppy" description="">
+<reg address="0x30" default_value="0x1" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0xf0" />
+<reg address="0x70" default_value="0x6" />
+<reg address="0x74" default_value="0x2" />
+<reg address="0xf0" default_value="0xe" />
+<reg address="0xf2" default_value="0x3" />
+<reg address="0xf4" default_value="0x0" />
+</ldn>
+<ldn number="0x1" name="COM1" description="">
+<reg address="0x30" default_value="0x1" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0xf8" />
+<reg address="0x70" default_value="0x4" />
+<reg address="0xf0" default_value="0x0" />
+</ldn>
+<ldn number="0x2" name="COM2" description="">
+<reg address="0x30" default_value="0x1" />
+<reg address="0x60" default_value="0x2" />
+<reg address="0x61" default_value="0xf8" />
+<reg address="0x70" default_value="0x3" />
+<reg address="0xf0" default_value="0x0" />
+<reg address="0xf1" default_value="0x0" />
+</ldn>
+<ldn number="0x3" name="Parallel port" description="">
+<reg address="0x30" default_value="0x1" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0x78" />
+<reg address="0x70" default_value="0x7" />
+<reg address="0x74" default_value="0x3" />
+<reg address="0xf0" default_value="0x42" />
+</ldn>
+<ldn number="0x4" name="Hardware monitor" description="">
+<reg address="0x30" default_value="0x1" />
+<reg address="0x60" default_value="0x2" />
+<reg address="0x61" default_value="0x95" />
+<reg address="0x70" default_value="0x0" />
+</ldn>
+<ldn number="0x5" name="Keyboard" description="">
+<reg address="0x30" default_value="0x1" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x60" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0x72" default_value="0x0" />
+</ldn>
+<ldn number="0x6" name="GPIO" description="">
+<reg address="0xf0" default_value="0x0" />
+<reg address="0xf1" default_value="0xf" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0xf3" default_value="0x0" />
+<reg address="0xe0" default_value="0x0" />
+<reg address="0xe1" default_value="0xff" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0xe3" default_value="0x0" />
+<reg address="0xd0" default_value="0x0" />
+<reg address="0xd1" default_value="0xff" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0xd3" default_value="0x0" />
+<reg address="0xc0" default_value="0x0" />
+<reg address="0xc1" default_value="0xf" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0xc3" default_value="0x0" />
+<reg address="0xb0" default_value="0x0" />
+<reg address="0xb1" default_value="0x3f" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0xb3" default_value="0x0" />
+</ldn>
+<ldn number="0x7" name="VID" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0xf0" default_value="0x0" />
+<reg address="0xf1" default_value="0x0" />
+<reg address="0xf2" default_value="0xfffffffb" />
+<reg address="0xf3" default_value="0x0" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0xf5" default_value="0x0" />
+<reg address="0xf6" default_value="0x0" />
+<reg address="0xf7" default_value="0x0" />
+</ldn>
+<ldn number="0x8" name="SPI" description="">
+<reg address="0xf0" default_value="0x10" />
+<reg address="0xf1" default_value="0x4" />
+<reg address="0xf2" default_value="0x1" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0xf4" default_value="0x0" />
+<reg address="0xf5" default_value="0x0" />
+<reg address="0xf6" default_value="0x0" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0xf8" default_value="0x0" />
+<reg address="0xfa" default_value="0x0" />
+<reg address="0xfb" default_value="0x0" />
+<reg address="0xfc" default_value="0x0" />
+<reg address="0xfd" default_value="0x0" />
+<reg address="0xfe" default_value="0x0" />
+<reg address="0xff" default_value="0x0" />
+</ldn>
+<ldn number="0xa" name="PME, ACPI" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0xf0" default_value="0x0" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0xf4" default_value="0x6" />
+<reg address="0xf5" default_value="0x1c" />
+<reg address="0xf7" default_value="0x1" />
+</ldn>
+</sio>
+<sio model="F71889" id="0x2307" >
+<noldn>
+<reg address="0x20" default_value="0x7" />
+<reg address="0x21" default_value="0x23" />
+<reg address="0x23" default_value="0x19" />
+<reg address="0x24" default_value="0x34" />
+<reg address="0x25" default_value="0x0" />
+<reg address="0x26" default_value="0x0" />
+<reg address="0x27" default_value="0x0" />
+<reg address="0x28" default_value="0x0" />
+<reg address="0x2a" default_value="0xf0" />
+<reg address="0x2b" default_value="0x30" />
+<reg address="0x2c" default_value="0x0" />
+<reg address="0x2d" default_value="0x8" />
+</noldn>
+<ldn number="0x0" name="Floppy" description="">
+<reg address="0x30" default_value="0x1" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0xf0" />
+<reg address="0x70" default_value="0x6" />
+<reg address="0x74" default_value="0x2" />
+<reg address="0xf0" default_value="0xe" />
+<reg address="0xf2" default_value="0x3" />
+<reg address="0xf4" default_value="0x0" />
+</ldn>
+<ldn number="0x1" name="COM1" description="">
+<reg address="0x30" default_value="0x1" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0xf8" />
+<reg address="0x70" default_value="0x4" />
+<reg address="0xf0" default_value="0x0" />
+</ldn>
+<ldn number="0x2" name="COM2" description="">
+<reg address="0x30" default_value="0x1" />
+<reg address="0x60" default_value="0x2" />
+<reg address="0x61" default_value="0xf8" />
+<reg address="0x70" default_value="0x3" />
+<reg address="0xf0" default_value="0x0" />
+<reg address="0xf1" default_value="0x4" />
+</ldn>
+<ldn number="0x3" name="Parallel port" description="">
+<reg address="0x30" default_value="0x1" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0x78" />
+<reg address="0x70" default_value="0x7" />
+<reg address="0x74" default_value="0x3" />
+<reg address="0xf0" default_value="0x42" />
+</ldn>
+<ldn number="0x4" name="Hardware monitor" description="">
+<reg address="0x30" default_value="0x1" />
+<reg address="0x60" default_value="0x2" />
+<reg address="0x61" default_value="0x95" />
+<reg address="0x70" default_value="0x0" />
+</ldn>
+<ldn number="0x5" name="Keyboard" description="">
+<reg address="0x30" default_value="0x1" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x60" />
+<reg address="0x70" default_value="0x1" />
+<reg address="0x72" default_value="0xc" />
+<reg address="0xfe" default_value="0x81" />
+</ldn>
+<ldn number="0x6" name="GPIO" description="">
+<reg address="0x80" default_value="0x0" />
+<reg address="0x81" default_value="0xff" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0x83" default_value="0x0" />
+<reg address="0x90" default_value="0x0" />
+<reg address="0x91" default_value="0xff" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0x93" default_value="0x0" />
+<reg address="0xa0" default_value="0x0" />
+<reg address="0xa1" default_value="0x1f" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0xa3" default_value="0x0" />
+<reg address="0xb0" default_value="0x0" />
+<reg address="0xb1" default_value="0xff" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0xc0" default_value="0x0" />
+<reg address="0xc1" default_value="0xff" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0xc3" default_value="0x0" />
+<reg address="0xd0" default_value="0x0" />
+<reg address="0xd1" default_value="0xff" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0xd3" default_value="0x0" />
+<reg address="0xe0" default_value="0x0" />
+<reg address="0xe1" default_value="0x7f" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0xe3" default_value="0x0" />
+<reg address="0xf0" default_value="0x0" />
+<reg address="0xf1" default_value="0x7f" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0xf3" default_value="0x0" />
+<reg address="0xfe" default_value="0x0" />
+<reg address="0xff" default_value="0x0" />
+</ldn>
+<ldn number="0x7" name="VID" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+</ldn>
+<ldn number="0x8" name="SPI" description="">
+<reg address="0xf0" default_value="0x0" />
+<reg address="0xf1" default_value="0xfffffffc" />
+<reg address="0xf2" default_value="0x1" />
+<reg address="0xf3" default_value="0x0" />
+<reg address="0xf4" default_value="0x0" />
+<reg address="0xf5" default_value="0x0" />
+<reg address="0xf6" default_value="0x0" />
+<reg address="0xf7" default_value="0x0" />
+<reg address="0xf8" default_value="0x0" />
+<reg address="0xfa" default_value="0x0" />
+<reg address="0xfb" default_value="0x0" />
+<reg address="0xfc" default_value="0x0" />
+<reg address="0xfd" default_value="0x0" />
+<reg address="0xfe" default_value="0x0" />
+<reg address="0xff" default_value="0x0" />
+</ldn>
+<ldn number="0xa" name="PME, ACPI" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0xf0" default_value="0x0" />
+<reg address="0xf1" default_value="0x0" />
+<reg address="0xf4" default_value="0x26" />
+<reg address="0xf5" default_value="0x1c" />
+<reg address="0xf6" default_value="0x7" />
+</ldn>
+<ldn number="0xb" name="VREF" description="">
+<reg address="0xf0" default_value="0x64" />
+<reg address="0xf1" default_value="0x64" />
+<reg address="0xf2" default_value="0x64" />
+<reg address="0xf3" default_value="0x0" />
+<reg address="0xff" default_value="0x0" />
+</ldn>
+</sio>
+<sio model="F71872F/FG / F71806F/FG" id="0x4103" >
+<noldn>
+<reg address="0x20" default_value="0x3" />
+<reg address="0x21" default_value="0x41" />
+<reg address="0x22" default_value="0xfffffffc" />
+<reg address="0x23" default_value="0x19" />
+<reg address="0x24" default_value="0x34" />
+<reg address="0x25" default_value="0x0" />
+<reg address="0x26" default_value="0x0" />
+<reg address="0x27" default_value="0xfffffffb" />
+<reg address="0x28" default_value="0x66" />
+<reg address="0x29" default_value="0x80" />
+<reg address="0x2a" default_value="0x0" />
+<reg address="0x2b" default_value="0x0" />
+<reg address="0x2c" default_value="0x0" />
+<reg address="0x2d" default_value="0x4" />
+</noldn>
+<ldn number="0x0" name="Floppy" description="">
+<reg address="0x30" default_value="0x1" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0xf0" />
+<reg address="0x70" default_value="0x6" />
+<reg address="0x74" default_value="0x2" />
+<reg address="0xf0" default_value="0xe" />
+<reg address="0xf2" default_value="0x3" />
+<reg address="0xf4" default_value="0x0" />
+</ldn>
+<ldn number="0x1" name="COM1" description="">
+<reg address="0x30" default_value="0x1" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0xf8" />
+<reg address="0x70" default_value="0x4" />
+<reg address="0xf0" default_value="0x0" />
+</ldn>
+<ldn number="0x2" name="COM2" description="">
+<reg address="0x30" default_value="0x1" />
+<reg address="0x60" default_value="0x2" />
+<reg address="0x61" default_value="0xf8" />
+<reg address="0x70" default_value="0x3" />
+<reg address="0xf0" default_value="0x0" />
+<reg address="0xf1" default_value="0x4" />
+</ldn>
+<ldn number="0x3" name="Parallel port" description="">
+<reg address="0x30" default_value="0x1" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0x78" />
+<reg address="0x70" default_value="0x7" />
+<reg address="0x74" default_value="0x3" />
+<reg address="0xf0" default_value="0x42" />
+</ldn>
+<ldn number="0x4" name="Hardware monitor" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x2" />
+<reg address="0x61" default_value="0x95" />
+<reg address="0x70" default_value="0x0" />
+</ldn>
+<ldn number="0x5" name="Keyboard" description="">
+<reg address="0x30" default_value="0x1" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x60" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0x72" default_value="0x0" />
+<reg address="0xf0" default_value="0x83" />
+<reg address="0xf1" default_value="0x0" />
+</ldn>
+<ldn number="0x6" name="GPIO" description="">
+<reg address="0x70" default_value="0x0" />
+<reg address="0xe0" default_value="0x0" />
+<reg address="0xe1" default_value="0x0" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0xe3" default_value="0x0" />
+<reg address="0xe4" default_value="0x0" />
+<reg address="0xe5" default_value="0x0" />
+<reg address="0xe6" default_value="0x0" />
+<reg address="0xe7" default_value="0x0" />
+<reg address="0xe8" default_value="0x0" />
+<reg address="0xe9" default_value="0x7f" />
+<reg address="0xf0" default_value="0x0" />
+<reg address="0xf1" default_value="0x7f" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0xf3" default_value="0x0" />
+<reg address="0xf4" default_value="0xff" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0xf6" default_value="0x0" />
+<reg address="0xf7" default_value="0x3" />
+<reg address="0x0" default_value="NANA" />
+</ldn>
+<ldn number="0x7" name="VID" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+</ldn>
+<ldn number="0xa" name="PME, ACPI" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0xf0" default_value="0x0" />
+<reg address="0xf1" default_value="0x61" />
+<reg address="0xf4" default_value="0x6" />
+<reg address="0xf5" default_value="0x3c" />
+</ldn>
+</sio>
+<sio model="F71882FG/F71883FG" id="0x4105" >
+<noldn>
+<reg address="0x20" default_value="0x5" />
+<reg address="0x21" default_value="0x41" />
+<reg address="0x23" default_value="0x19" />
+<reg address="0x24" default_value="0x34" />
+<reg address="0x25" default_value="0x0" />
+<reg address="0x26" default_value="0x0" />
+<reg address="0x27" default_value="0x0" />
+<reg address="0x28" default_value="0x0" />
+<reg address="0x29" default_value="0x0" />
+<reg address="0x2a" default_value="0x0" />
+<reg address="0x2b" default_value="0x0" />
+<reg address="0x2c" default_value="0x8" />
+<reg address="0x2d" default_value="0x8" />
+</noldn>
+<ldn number="0x0" name="Floppy" description="">
+<reg address="0x30" default_value="0x1" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0xf0" />
+<reg address="0x70" default_value="0x6" />
+<reg address="0x74" default_value="0x2" />
+<reg address="0xf0" default_value="0xe" />
+<reg address="0xf2" default_value="0x3" />
+<reg address="0xf4" default_value="0x0" />
+</ldn>
+<ldn number="0x1" name="COM1" description="">
+<reg address="0x30" default_value="0x1" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0xf8" />
+<reg address="0x70" default_value="0x4" />
+<reg address="0xf0" default_value="0x0" />
+</ldn>
+<ldn number="0x2" name="COM2" description="">
+<reg address="0x30" default_value="0x1" />
+<reg address="0x60" default_value="0x2" />
+<reg address="0x61" default_value="0xf8" />
+<reg address="0x70" default_value="0x3" />
+<reg address="0xf0" default_value="0x0" />
+<reg address="0xf1" default_value="0x4" />
+</ldn>
+<ldn number="0x3" name="Parallel port" description="">
+<reg address="0x30" default_value="0x1" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0x78" />
+<reg address="0x70" default_value="0x7" />
+<reg address="0x74" default_value="0x3" />
+<reg address="0xf0" default_value="0x42" />
+</ldn>
+<ldn number="0x4" name="Hardware monitor" description="">
+<reg address="0x30" default_value="0x1" />
+<reg address="0x60" default_value="0x2" />
+<reg address="0x61" default_value="0x95" />
+<reg address="0x70" default_value="0x0" />
+</ldn>
+<ldn number="0x5" name="Keyboard" description="">
+<reg address="0x30" default_value="0x1" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x60" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0x72" default_value="0x0" />
+<reg address="0xf0" default_value="0x83" />
+</ldn>
+<ldn number="0x6" name="GPIO" description="">
+<reg address="0x70" default_value="0x0" />
+<reg address="0xe0" default_value="0x0" />
+<reg address="0xe1" default_value="0xff" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0xe3" default_value="0x0" />
+<reg address="0xd0" default_value="0x0" />
+<reg address="0xd1" default_value="0xff" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0xd3" default_value="0x0" />
+<reg address="0xc0" default_value="0x0" />
+<reg address="0xc1" default_value="0xf" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0xc3" default_value="0x0" />
+<reg address="0xb0" default_value="0x0" />
+<reg address="0xb1" default_value="0xf" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0xb3" default_value="0x0" />
+<reg address="0xf0" default_value="0x0" />
+<reg address="0xf1" default_value="0xff" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0xf3" default_value="0x0" />
+</ldn>
+<ldn number="0x7" name="VID" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+</ldn>
+<ldn number="0x7" name="SPI" description="">
+<reg address="0xf0" default_value="0x10" />
+<reg address="0xf1" default_value="0x4" />
+<reg address="0xf2" default_value="0x1" />
+<reg address="0xf3" default_value="0x0" />
+<reg address="0xf4" default_value="0x0" />
+<reg address="0xf5" default_value="0x0" />
+<reg address="0xf6" default_value="0x0" />
+<reg address="0xf7" default_value="0x0" />
+<reg address="0xf8" default_value="0x0" />
+<reg address="0xfa" default_value="0x0" />
+<reg address="0xfb" default_value="0x0" />
+<reg address="0xfc" default_value="0x0" />
+<reg address="0xfd" default_value="0x0" />
+<reg address="0xfe" default_value="0x0" />
+<reg address="0xff" default_value="0x0" />
+</ldn>
+<ldn number="0xa" name="PME, ACPI" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0xf0" default_value="0x0" />
+<reg address="0xf1" default_value="0x1" />
+<reg address="0xf4" default_value="0x6" />
+<reg address="0xf5" default_value="0x1c" />
+</ldn>
+</sio>
+<sio model="F71805F/FG" id="0x604" >
+<noldn>
+<reg address="0x20" default_value="0x4" />
+<reg address="0x21" default_value="0x6" />
+<reg address="0x23" default_value="0x19" />
+<reg address="0x24" default_value="0x34" />
+<reg address="0x25" default_value="0x0" />
+<reg address="0x26" default_value="0x0" />
+<reg address="0x27" default_value="0x3f" />
+<reg address="0x28" default_value="0x8" />
+<reg address="0x29" default_value="0x0" />
+</noldn>
+<ldn number="0x0" name="Floppy" description="">
+<reg address="0x30" default_value="0x1" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0xf0" />
+<reg address="0x70" default_value="0x6" />
+<reg address="0x74" default_value="0x2" />
+<reg address="0xf0" default_value="0xe" />
+<reg address="0xf2" default_value="0x3" />
+<reg address="0xf4" default_value="0x0" />
+</ldn>
+<ldn number="0x1" name="COM1" description="">
+<reg address="0x30" default_value="0x1" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0xf8" />
+<reg address="0x70" default_value="0x4" />
+<reg address="0xf0" default_value="0x0" />
+</ldn>
+<ldn number="0x2" name="COM2" description="">
+<reg address="0x30" default_value="0x1" />
+<reg address="0x60" default_value="0x2" />
+<reg address="0x61" default_value="0xf8" />
+<reg address="0x70" default_value="0x3" />
+<reg address="0xf0" default_value="0x0" />
+<reg address="0xf1" default_value="0x4" />
+</ldn>
+<ldn number="0x3" name="Parallel port" description="">
+<reg address="0x30" default_value="0x1" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0x78" />
+<reg address="0x70" default_value="0x7" />
+<reg address="0x74" default_value="0x3" />
+<reg address="0xf0" default_value="0x42" />
+</ldn>
+<ldn number="0x4" name="Hardware monitor" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x2" />
+<reg address="0x61" default_value="0x95" />
+<reg address="0x70" default_value="0x0" />
+</ldn>
+<ldn number="0x6" name="GPIO" description="">
+<reg address="0x70" default_value="0x0" />
+<reg address="0xe0" default_value="0x0" />
+<reg address="0xe1" default_value="0x0" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0xe3" default_value="0x0" />
+<reg address="0xe4" default_value="0x0" />
+<reg address="0xe5" default_value="0x0" />
+<reg address="0xe6" default_value="0x0" />
+<reg address="0xe7" default_value="0x0" />
+<reg address="0xe8" default_value="0x0" />
+<reg address="0xe9" default_value="0x0" />
+<reg address="0xf0" default_value="0x0" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0xf3" default_value="0x0" />
+<reg address="0x0" default_value="NANA" />
+</ldn>
+<ldn number="0xa" name="PME" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0xf0" default_value="0x0" />
+<reg address="0xf1" default_value="0x0" />
+</ldn>
+</sio>
+<sio model="F8000" id="0x581" >
+</sio>
+<sio model="F81216D/DG" id="0x802" >
+<noldn>
+<reg address="0x25" default_value="0x0" />
+<reg address="0x2f" default_value="0xfffffffc" />
+</noldn>
+<ldn number="0x0" name="UART1" description="">
+<reg address="0x30" default_value="NANA" />
+<reg address="0x60" default_value="NANA" />
+<reg address="0x61" default_value="NANA" />
+<reg address="0x70" default_value="NANA" />
+<reg address="0xf0" default_value="0x0" />
+<reg address="0xf1" default_value="0x40" />
+</ldn>
+<ldn number="0x1" name="UART2" description="">
+<reg address="0x30" default_value="NANA" />
+<reg address="0x60" default_value="NANA" />
+<reg address="0x61" default_value="NANA" />
+<reg address="0x70" default_value="NANA" />
+<reg address="0xf0" default_value="0x0" />
+</ldn>
+<ldn number="0x2" name="UART3" description="">
+<reg address="0x30" default_value="NANA" />
+<reg address="0x60" default_value="NANA" />
+<reg address="0x61" default_value="NANA" />
+<reg address="0x70" default_value="NANA" />
+<reg address="0xf0" default_value="0x0" />
+</ldn>
+<ldn number="0x3" name="UART4" description="">
+<reg address="0x30" default_value="NANA" />
+<reg address="0x60" default_value="NANA" />
+<reg address="0x61" default_value="NANA" />
+<reg address="0x70" default_value="NANA" />
+<reg address="0xf0" default_value="0x0" />
+</ldn>
+<ldn number="0x8" name="WDT" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0x0" default_value="NANA" />
+</ldn>
+</sio>
+<sio model="F81216AD" id="0x1602" >
+<noldn>
+<reg address="0x25" default_value="0x0" />
+<reg address="0x27" default_value="NANA" />
+</noldn>
+<ldn number="0x0" name="UART1" description="">
+<reg address="0x30" default_value="NANA" />
+<reg address="0x60" default_value="NANA" />
+<reg address="0x61" default_value="NANA" />
+<reg address="0x70" default_value="NANA" />
+<reg address="0xf0" default_value="0x0" />
+<reg address="0xf1" default_value="0x40" />
+<reg address="0xf4" default_value="0x0" />
+<reg address="0xf5" default_value="0x0" />
+</ldn>
+<ldn number="0x1" name="UART2" description="">
+<reg address="0x30" default_value="NANA" />
+<reg address="0x60" default_value="NANA" />
+<reg address="0x61" default_value="NANA" />
+<reg address="0x70" default_value="NANA" />
+<reg address="0xf0" default_value="0x0" />
+<reg address="0xf4" default_value="0x0" />
+<reg address="0xf5" default_value="0x0" />
+</ldn>
+<ldn number="0x2" name="UART3" description="">
+<reg address="0x30" default_value="NANA" />
+<reg address="0x60" default_value="NANA" />
+<reg address="0x61" default_value="NANA" />
+<reg address="0x70" default_value="NANA" />
+<reg address="0xf0" default_value="0x0" />
+<reg address="0xf4" default_value="0x0" />
+<reg address="0xf5" default_value="0x0" />
+</ldn>
+<ldn number="0x3" name="UART4" description="">
+<reg address="0x30" default_value="NANA" />
+<reg address="0x60" default_value="NANA" />
+<reg address="0x61" default_value="NANA" />
+<reg address="0x70" default_value="NANA" />
+<reg address="0xf0" default_value="0x0" />
+<reg address="0xf4" default_value="0x0" />
+<reg address="0xf5" default_value="0x0" />
+</ldn>
+<ldn number="0x8" name="WDT" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0x0" default_value="NANA" />
+</ldn>
+</sio>
+<sio model="F81865F/F-I" id="0x407" >
+</sio>
+</sioarray>
Index: util/pygen/data/sio/ite.sio.xml
===================================================================
--- util/pygen/data/sio/ite.sio.xml	(revision 0)
+++ util/pygen/data/sio/ite.sio.xml	(revision 0)
@@ -0,0 +1,1807 @@ 
+<?xml version="1.0" encoding="UTF-8"?>
+<sioarray name="ite" description="ite superios">
+<sio model="IT8228E" id="0x8228" >
+</sio>
+<sio model="IT8500B/E" id="0x8500" >
+<noldn>
+<reg address="0x20" default_value="0x85" />
+<reg address="0x21" default_value="0x0" />
+<reg address="0x22" default_value="0x1" />
+<reg address="0x23" default_value="0x1" />
+<reg address="0x25" default_value="0x0" />
+<reg address="0x2d" default_value="0x0" />
+<reg address="0x2e" default_value="NANA" />
+<reg address="0x2f" default_value="NANA" />
+<reg address="0x30" default_value="0x0" />
+</noldn>
+<ldn number="0x4" name="System Wake-Up Control (SWUC)" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x62" default_value="0x0" />
+<reg address="0x63" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0x71" default_value="0x1" />
+</ldn>
+<ldn number="0x5" name="KBC/Mouse Interface" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x62" default_value="0x0" />
+<reg address="0x63" default_value="0x0" />
+<reg address="0x70" default_value="0xc" />
+<reg address="0x71" default_value="0x1" />
+</ldn>
+<ldn number="0x6" name="KBC/Keyboard Interface" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x60" />
+<reg address="0x62" default_value="0x0" />
+<reg address="0x63" default_value="0x64" />
+<reg address="0x70" default_value="0x1" />
+<reg address="0x71" default_value="0x1" />
+</ldn>
+<ldn number="0xf" name="Shared Memory/Flash Interface (SMFI)" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x62" default_value="0x0" />
+<reg address="0x63" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0x71" default_value="0x0" />
+<reg address="0xf4" default_value="NANA" />
+</ldn>
+<ldn number="0x10" name="BRAM" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x62" default_value="0x0" />
+<reg address="0x63" default_value="0x72" />
+<reg address="0x70" default_value="0x8" />
+<reg address="0x71" default_value="0x1" />
+<reg address="0x70" default_value="NANA" />
+<reg address="0x71" default_value="NANA" />
+<reg address="0xf3" default_value="NANA" />
+</ldn>
+<ldn number="0x11" name="Power Management I/F Channel 1 (PMC1)" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x62" />
+<reg address="0x62" default_value="0x0" />
+<reg address="0x63" default_value="0x66" />
+<reg address="0x70" default_value="0x1" />
+<reg address="0x71" default_value="0x1" />
+</ldn>
+<ldn number="0x12" name="Power Management I/F Channel 2 (PMC2)" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x68" />
+<reg address="0x62" default_value="0x0" />
+<reg address="0x63" default_value="0x6c" />
+<reg address="0x64" default_value="0x0" />
+<reg address="0x65" default_value="0x0" />
+<reg address="0x70" default_value="0x1" />
+<reg address="0x71" default_value="0x1" />
+<reg address="0x0" default_value="NANA" />
+</ldn>
+</sio>
+<sio model="IT8502E/TE/G" id="0x8502" >
+<noldn>
+<reg address="0x20" default_value="0x85" />
+<reg address="0x21" default_value="0x2" />
+<reg address="0x22" default_value="0x71" />
+<reg address="0x23" default_value="0x1" />
+<reg address="0x24" default_value="NANA" />
+<reg address="0x25" default_value="0x0" />
+<reg address="0x26" default_value="0x0" />
+<reg address="0x27" default_value="NANA" />
+<reg address="0x28" default_value="NANA" />
+<reg address="0x29" default_value="NANA" />
+<reg address="0x2a" default_value="NANA" />
+<reg address="0x2b" default_value="NANA" />
+<reg address="0x2c" default_value="NANA" />
+<reg address="0x2d" default_value="0x0" />
+<reg address="0x2e" default_value="NANA" />
+</noldn>
+<ldn number="0x1" name="UART1" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0xf8" />
+<reg address="0x62" default_value="0x0" />
+<reg address="0x63" default_value="0x0" />
+<reg address="0x70" default_value="0x4" />
+<reg address="0x71" default_value="0x2" />
+<reg address="0xf0" default_value="0x0" />
+</ldn>
+<ldn number="0x4" name="System Wake-Up" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x62" default_value="0x0" />
+<reg address="0x63" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0x71" default_value="0x1" />
+<reg address="0xf0" default_value="0x0" />
+</ldn>
+<ldn number="0x5" name="Mouse" description="">
+<reg address="0x30" default_value="0x1" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x62" default_value="0x0" />
+<reg address="0x63" default_value="0x0" />
+<reg address="0x70" default_value="0xc" />
+<reg address="0x71" default_value="0x1" />
+<reg address="0x0" default_value="NANA" />
+</ldn>
+<ldn number="0x6" name="Keyboard" description="">
+<reg address="0x30" default_value="0x1" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x60" />
+<reg address="0x62" default_value="0x0" />
+<reg address="0x63" default_value="0x64" />
+<reg address="0x70" default_value="0x1" />
+<reg address="0x71" default_value="0x1" />
+<reg address="0xf4" default_value="NANA" />
+</ldn>
+<ldn number="0xf" name="Shared Memory/Flash" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x62" default_value="0x0" />
+<reg address="0x63" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0x71" default_value="0x0" />
+<reg address="0xf4" default_value="0x0" />
+<reg address="0xf5" default_value="0x0" />
+<reg address="0xf6" default_value="0x0" />
+</ldn>
+<ldn number="0x10" name="BRAM" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x70" />
+<reg address="0x62" default_value="0x0" />
+<reg address="0x63" default_value="0x72" />
+<reg address="0x70" default_value="0x8" />
+<reg address="0x71" default_value="0x1" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0x0" default_value="NANA" />
+</ldn>
+<ldn number="0x11" name="Power Channel 1" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x62" />
+<reg address="0x62" default_value="0x0" />
+<reg address="0x63" default_value="0x66" />
+<reg address="0x70" default_value="0x1" />
+<reg address="0x71" default_value="0x1" />
+</ldn>
+<ldn number="0x12" name="Power Channel 2" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x68" />
+<reg address="0x62" default_value="0x0" />
+<reg address="0x63" default_value="0x6c" />
+<reg address="0x70" default_value="0x1" />
+<reg address="0x71" default_value="0x1" />
+</ldn>
+<ldn number="0x17" name="Power Channel 3" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x6a" />
+<reg address="0x62" default_value="0x0" />
+<reg address="0x63" default_value="0x6e" />
+<reg address="0x70" default_value="0x1" />
+<reg address="0x71" default_value="0x1" />
+</ldn>
+</sio>
+<sio model="IT8510E/TE/G" id="0x8510" >
+<noldn>
+<reg address="0x20" default_value="0x85" />
+<reg address="0x21" default_value="0x10" />
+</noldn>
+<noldn>
+<reg address="0x22" default_value="0x21" />
+</noldn>
+<noldn>
+<reg address="0x23" default_value="0x1" />
+</noldn>
+<noldn>
+<reg address="0x25" default_value="0x0" />
+</noldn>
+<noldn>
+<reg address="0x26" default_value="0x0" />
+</noldn>
+<noldn>
+<reg address="0x2d" default_value="0x0" />
+</noldn>
+<noldn>
+<reg address="0x30" default_value="0x0" />
+</noldn>
+<noldn>
+<reg address="0x60" default_value="NANA" />
+<reg address="0x61" default_value="NANA" />
+</noldn>
+<noldn>
+<reg address="0x62" default_value="NANA" />
+<reg address="0x63" default_value="NANA" />
+</noldn>
+<noldn>
+<reg address="0x70" default_value="NANA" />
+</noldn>
+<noldn>
+<reg address="0x71" default_value="NANA" />
+</noldn>
+<noldn>
+<reg address="0x74" default_value="0x4" />
+</noldn>
+<noldn>
+<reg address="0x75" default_value="0x4" />
+</noldn>
+<ldn number="0x4" name="System Wakup-Up (SWUC)" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x62" default_value="0x0" />
+<reg address="0x63" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0x71" default_value="0x3" />
+</ldn>
+<ldn number="0x5" name="Keyboard/Mouse" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x62" default_value="0x0" />
+<reg address="0x63" default_value="0x0" />
+<reg address="0x70" default_value="0xc" />
+<reg address="0x71" default_value="0x3" />
+</ldn>
+<ldn number="0x6" name="Keyboard/Mouse" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x60" />
+<reg address="0x62" default_value="0x0" />
+<reg address="0x63" default_value="0x64" />
+<reg address="0x70" default_value="0x1" />
+<reg address="0x71" default_value="0x3" />
+</ldn>
+<ldn number="0xf" name="Shared Memory/Flash Interface (SMFI)" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x62" default_value="0x0" />
+<reg address="0x63" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0x71" default_value="0x0" />
+<reg address="0xf4" default_value="0x0" />
+<reg address="0xf5" default_value="0x0" />
+<reg address="0xf6" default_value="0x0" />
+<reg address="0xf7" default_value="0x0" />
+<reg address="0xf8" default_value="0x0" />
+</ldn>
+<ldn number="0x10" name="Real Time Clock (RTC)" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x70" />
+<reg address="0x62" default_value="0x0" />
+<reg address="0x63" default_value="0x72" />
+<reg address="0x70" default_value="0x8" />
+<reg address="0x71" default_value="0x0" />
+<reg address="0xf0" default_value="0x0" />
+<reg address="0xf1" default_value="0x49" />
+<reg address="0xf2" default_value="0x4a" />
+</ldn>
+<ldn number="0x11" name="Power Management Interface Channel 1" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x62" />
+<reg address="0x62" default_value="0x0" />
+<reg address="0x63" default_value="0x66" />
+<reg address="0x70" default_value="0x1" />
+<reg address="0x71" default_value="0x3" />
+</ldn>
+<ldn number="0x12" name="Power Management Interface Channel 2" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x68" />
+<reg address="0x62" default_value="0x0" />
+<reg address="0x63" default_value="0x6c" />
+<reg address="0x70" default_value="0x1" />
+<reg address="0x71" default_value="0x3" />
+</ldn>
+</sio>
+<sio model="IT8511E/TE/G" id="0x8511" >
+<noldn>
+<reg address="0x20" default_value="0x85" />
+<reg address="0x21" default_value="0x11" />
+<reg address="0x22" default_value="0x10" />
+<reg address="0x23" default_value="0x1" />
+<reg address="0x24" default_value="NANA" />
+<reg address="0x25" default_value="0x0" />
+<reg address="0x26" default_value="0x0" />
+<reg address="0x27" default_value="NANA" />
+<reg address="0x28" default_value="NANA" />
+<reg address="0x29" default_value="NANA" />
+<reg address="0x2a" default_value="NANA" />
+<reg address="0x2b" default_value="NANA" />
+<reg address="0x2c" default_value="NANA" />
+<reg address="0x2d" default_value="0x0" />
+<reg address="0x2e" default_value="NANA" />
+</noldn>
+<ldn number="0x4" name="System Wake-Up" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x62" default_value="0x0" />
+<reg address="0x63" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0x71" default_value="0x3" />
+<reg address="0xf0" default_value="0x0" />
+</ldn>
+<ldn number="0x5" name="Mouse" description="">
+<reg address="0x30" default_value="0x1" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x62" default_value="0x0" />
+<reg address="0x63" default_value="0x0" />
+<reg address="0x70" default_value="0xc" />
+<reg address="0x71" default_value="0x3" />
+<reg address="0xf0" default_value="NANA" />
+</ldn>
+<ldn number="0x6" name="Keyboard" description="">
+<reg address="0x30" default_value="0x1" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x60" />
+<reg address="0x62" default_value="0x0" />
+<reg address="0x63" default_value="0x64" />
+<reg address="0x70" default_value="0x1" />
+<reg address="0x71" default_value="0x3" />
+<reg address="0x0" default_value="NANA" />
+</ldn>
+<ldn number="0xf" name="Shared Memory/Flash" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x62" default_value="0x0" />
+<reg address="0x63" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0x71" default_value="0x0" />
+<reg address="0xf4" default_value="0x0" />
+<reg address="0xf5" default_value="0x0" />
+<reg address="0xf6" default_value="0x0" />
+</ldn>
+<ldn number="0x10" name="Real-Time Clock" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x70" />
+<reg address="0x62" default_value="0x0" />
+<reg address="0x63" default_value="0x72" />
+<reg address="0x70" default_value="0x8" />
+<reg address="0x71" default_value="0x0" />
+<reg address="0xf0" default_value="0x0" />
+<reg address="0xf1" default_value="0x49" />
+<reg address="0xf2" default_value="0x4a" />
+<reg address="0xffffffff" default_value="NANA" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0x0" default_value="NANA" />
+</ldn>
+<ldn number="0x11" name="Power Channel 1" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x62" />
+<reg address="0x62" default_value="0x0" />
+<reg address="0x63" default_value="0x66" />
+<reg address="0x70" default_value="0x1" />
+<reg address="0x71" default_value="0x3" />
+</ldn>
+<ldn number="0x12" name="Power Channel 2" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x68" />
+<reg address="0x62" default_value="0x0" />
+<reg address="0x63" default_value="0x6c" />
+<reg address="0x70" default_value="0x1" />
+<reg address="0x71" default_value="0x3" />
+</ldn>
+</sio>
+<sio model="IT8512E/F/G" id="0x8512" >
+<noldn>
+<reg address="0x20" default_value="0x85" />
+<reg address="0x21" default_value="0x12" />
+<reg address="0x22" default_value="0x22" />
+<reg address="0x23" default_value="0x1" />
+<reg address="0x24" default_value="NANA" />
+<reg address="0x25" default_value="0x0" />
+<reg address="0x26" default_value="0x0" />
+<reg address="0x27" default_value="NANA" />
+<reg address="0x28" default_value="NANA" />
+<reg address="0x29" default_value="NANA" />
+<reg address="0x2a" default_value="NANA" />
+<reg address="0x2b" default_value="NANA" />
+<reg address="0x2c" default_value="NANA" />
+<reg address="0x2d" default_value="0x0" />
+<reg address="0x2e" default_value="NANA" />
+</noldn>
+<ldn number="0x4" name="System Wake-Up" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x62" default_value="0x0" />
+<reg address="0x63" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0x71" default_value="0x3" />
+</ldn>
+<ldn number="0x5" name="Mouse" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x62" default_value="0x0" />
+<reg address="0x63" default_value="0x0" />
+<reg address="0x70" default_value="0xc" />
+<reg address="0x71" default_value="0x3" />
+<reg address="0xf0" default_value="NANA" />
+</ldn>
+<ldn number="0x6" name="Keyboard" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x60" />
+<reg address="0x62" default_value="0x0" />
+<reg address="0x63" default_value="0x64" />
+<reg address="0x70" default_value="0x1" />
+<reg address="0x71" default_value="0x3" />
+<reg address="0x0" default_value="NANA" />
+</ldn>
+<ldn number="0xf" name="Shared Memory/Flash" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x62" default_value="0x0" />
+<reg address="0x63" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0x71" default_value="0x0" />
+<reg address="0xf4" default_value="0x0" />
+<reg address="0xf5" default_value="0x0" />
+<reg address="0xf6" default_value="0x0" />
+</ldn>
+<ldn number="0x10" name="BRAM" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x70" />
+<reg address="0x62" default_value="0x0" />
+<reg address="0x63" default_value="0x72" />
+<reg address="0x70" default_value="0x8" />
+<reg address="0x71" default_value="0x0" />
+<reg address="0xf3" default_value="NANA" />
+<reg address="0xf4" default_value="NANA" />
+<reg address="0xf5" default_value="NANA" />
+</ldn>
+<ldn number="0x11" name="Power Channel 1" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x62" />
+<reg address="0x62" default_value="0x0" />
+<reg address="0x63" default_value="0x66" />
+<reg address="0x70" default_value="0x1" />
+<reg address="0x71" default_value="0x3" />
+</ldn>
+<ldn number="0x12" name="Power Channel 2" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x68" />
+<reg address="0x62" default_value="0x0" />
+<reg address="0x63" default_value="0x6c" />
+<reg address="0x70" default_value="0x1" />
+<reg address="0x71" default_value="0x3" />
+</ldn>
+</sio>
+<sio model="IT8513E/F/G" id="0x8513" >
+</sio>
+<sio model="IT8661F/IT8770F" id="0x8661" >
+<noldn>
+<reg address="0x1" default_value="NANA" />
+<reg address="0x2" default_value="NANA" />
+<reg address="0x3" default_value="NANA" />
+<reg address="0x4" default_value="NANA" />
+<reg address="0x5" default_value="NANA" />
+<reg address="0x6" default_value="0x0" />
+<reg address="0x20" default_value="0x86" />
+<reg address="0x21" default_value="0x61" />
+<reg address="0x22" default_value="0x0" />
+<reg address="0x23" default_value="0x0" />
+<reg address="0x24" default_value="0x0" />
+</noldn>
+<ldn number="0x0" name="Floppy" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x31" default_value="0x0" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0xf0" />
+<reg address="0x70" default_value="0x6" />
+<reg address="0x71" default_value="0x2" />
+<reg address="0x74" default_value="0x2" />
+<reg address="0xf0" default_value="0x0" />
+</ldn>
+<ldn number="0x1" name="COM1" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x31" default_value="0x0" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0xf8" />
+<reg address="0x70" default_value="0x4" />
+<reg address="0x71" default_value="0x2" />
+<reg address="0xf0" default_value="0x0" />
+</ldn>
+<ldn number="0x2" name="COM2" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x31" default_value="0x0" />
+<reg address="0x60" default_value="0x2" />
+<reg address="0x61" default_value="0xf8" />
+<reg address="0x70" default_value="0x3" />
+<reg address="0x71" default_value="0x2" />
+<reg address="0xf0" default_value="0x0" />
+</ldn>
+<ldn number="0x3" name="Parallel port" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x31" default_value="0x0" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0x78" />
+<reg address="0x62" default_value="0x7" />
+<reg address="0x63" default_value="0x78" />
+<reg address="0x70" default_value="0x7" />
+<reg address="0x71" default_value="0x2" />
+<reg address="0x74" default_value="0x3" />
+<reg address="0xf0" default_value="0x3" />
+</ldn>
+<ldn number="0x4" name="IR" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x31" default_value="0x0" />
+<reg address="0x60" default_value="0x2" />
+<reg address="0x61" default_value="0xe8" />
+<reg address="0x62" default_value="0x3" />
+<reg address="0x63" default_value="0x0" />
+<reg address="0x70" default_value="0xa" />
+<reg address="0x71" default_value="0x2" />
+<reg address="0x72" default_value="0xb" />
+<reg address="0x73" default_value="0x2" />
+<reg address="0x74" default_value="0x1" />
+<reg address="0x75" default_value="0x0" />
+<reg address="0xf0" default_value="0x0" />
+</ldn>
+<ldn number="0x5" name="GPIO" description="">
+<reg address="0x25" default_value="0x0" />
+<reg address="0x26" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x62" default_value="0x0" />
+<reg address="0x63" default_value="0x0" />
+<reg address="0x64" default_value="0x0" />
+<reg address="0x65" default_value="0x0" />
+<reg address="0x66" default_value="0x0" />
+<reg address="0x67" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0xf0" default_value="0x0" />
+<reg address="0xf1" default_value="0x0" />
+<reg address="0xf2" default_value="0x0" />
+<reg address="0xf3" default_value="0x0" />
+<reg address="0xf4" default_value="0x0" />
+<reg address="0xf5" default_value="0x0" />
+<reg address="0xf6" default_value="0x0" />
+<reg address="0xf7" default_value="0x0" />
+<reg address="0xf8" default_value="0x0" />
+<reg address="0xf9" default_value="0x0" />
+<reg address="0xfa" default_value="0x0" />
+<reg address="0xfb" default_value="0x0" />
+<reg address="0xfc" default_value="0x0" />
+</ldn>
+</sio>
+<sio model="IT8673F" id="0x8673" >
+</sio>
+<sio model="IT8671F/IT8687R" id="0x8681" >
+<noldn>
+<reg address="0x1" default_value="NANA" />
+<reg address="0x2" default_value="NANA" />
+<reg address="0x3" default_value="NANA" />
+<reg address="0x4" default_value="NANA" />
+<reg address="0x5" default_value="NANA" />
+<reg address="0x6" default_value="0x0" />
+<reg address="0x20" default_value="0x86" />
+<reg address="0x21" default_value="0x81" />
+<reg address="0x22" default_value="0x0" />
+<reg address="0x23" default_value="0x0" />
+<reg address="0x24" default_value="0x0" />
+<reg address="0x25" default_value="0x0" />
+<reg address="0x26" default_value="0x0" />
+<reg address="0x2e" default_value="0x0" />
+<reg address="0x2f" default_value="0x0" />
+</noldn>
+<ldn number="0x0" name="Floppy" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x31" default_value="0x0" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0xf0" />
+<reg address="0x70" default_value="0x6" />
+<reg address="0x71" default_value="0x2" />
+<reg address="0x74" default_value="0x2" />
+<reg address="0xf0" default_value="0x0" />
+</ldn>
+<ldn number="0x1" name="COM1" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x31" default_value="0x0" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0xf8" />
+<reg address="0x70" default_value="0x4" />
+<reg address="0x71" default_value="0x2" />
+<reg address="0xf0" default_value="0x0" />
+</ldn>
+<ldn number="0x2" name="COM2" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x31" default_value="0x0" />
+<reg address="0x60" default_value="0x2" />
+<reg address="0x61" default_value="0xf8" />
+<reg address="0x62" default_value="0x3" />
+<reg address="0x63" default_value="0x0" />
+<reg address="0x70" default_value="0x3" />
+<reg address="0x71" default_value="0x2" />
+<reg address="0x72" default_value="0xa" />
+<reg address="0x73" default_value="0x2" />
+<reg address="0x74" default_value="0x0" />
+<reg address="0x75" default_value="0x1" />
+<reg address="0xf0" default_value="0x0" />
+<reg address="0xf1" default_value="0x0" />
+</ldn>
+<ldn number="0x3" name="Parallel port" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x31" default_value="0x0" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0x78" />
+<reg address="0x62" default_value="0x7" />
+<reg address="0x63" default_value="0x78" />
+<reg address="0x70" default_value="0x7" />
+<reg address="0x71" default_value="0x2" />
+<reg address="0x74" default_value="0x3" />
+<reg address="0xf0" default_value="0x3" />
+</ldn>
+<ldn number="0x4" name="APC" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0xf0" default_value="0x0" />
+<reg address="0xf1" default_value="0x0" />
+<reg address="0xf2" default_value="0x0" />
+<reg address="0xf4" default_value="0x0" />
+<reg address="0xf5" default_value="0x0" />
+<reg address="0xf6" default_value="0x0" />
+</ldn>
+<ldn number="0x5" name="Keyboard" description="">
+<reg address="0x30" default_value="0xfffffffb" />
+<reg address="0x31" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x60" />
+<reg address="0x62" default_value="0x0" />
+<reg address="0x63" default_value="0x64" />
+<reg address="0x70" default_value="0x1" />
+<reg address="0x71" default_value="0x2" />
+<reg address="0xf0" default_value="0x0" />
+</ldn>
+<ldn number="0x6" name="Mouse" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x70" default_value="0xc" />
+<reg address="0x71" default_value="0x2" />
+<reg address="0xf0" default_value="0x0" />
+</ldn>
+<ldn number="0x7" name="GPIO" description="">
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x62" default_value="0x0" />
+<reg address="0x63" default_value="0x0" />
+<reg address="0x64" default_value="0x0" />
+<reg address="0x65" default_value="0x0" />
+<reg address="0x66" default_value="0x0" />
+<reg address="0x67" default_value="0x0" />
+<reg address="0x68" default_value="0x0" />
+<reg address="0x69" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0x71" default_value="0x0" />
+<reg address="0x72" default_value="0x0" />
+<reg address="0x73" default_value="0x0" />
+<reg address="0xf0" default_value="0x0" />
+<reg address="0xf1" default_value="0x0" />
+<reg address="0xf2" default_value="0x0" />
+<reg address="0xf3" default_value="0x0" />
+<reg address="0xf4" default_value="0x0" />
+<reg address="0xf5" default_value="0x0" />
+<reg address="0xf6" default_value="0x0" />
+<reg address="0xf7" default_value="0x0" />
+<reg address="0xf8" default_value="0x0" />
+<reg address="0xf9" default_value="0x0" />
+<reg address="0xfa" default_value="0x0" />
+<reg address="0xfb" default_value="0x0" />
+<reg address="0xfc" default_value="0x0" />
+<reg address="0xfd" default_value="0x0" />
+<reg address="0xfe" default_value="0x0" />
+<reg address="0xff" default_value="0x0" />
+<reg address="0xe0" default_value="0x0" />
+<reg address="0xe1" default_value="0x0" />
+<reg address="0xe2" default_value="0x0" />
+<reg address="0xe3" default_value="0x0" />
+<reg address="0xe4" default_value="0x0" />
+</ldn>
+</sio>
+<sio model="IT8703F" id="0x8701" >
+<noldn>
+<reg address="0x20" default_value="0x87" />
+<reg address="0x21" default_value="0x0" />
+<reg address="0x23" default_value="0x0" />
+<reg address="0x24" default_value="0x80" />
+<reg address="0x26" default_value="0x0" />
+<reg address="0x29" default_value="0x0" />
+<reg address="0x2a" default_value="0x7c" />
+<reg address="0x2b" default_value="0xc0" />
+</noldn>
+<ldn number="0x0" name="Floppy" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0xf0" />
+<reg address="0x70" default_value="0x6" />
+<reg address="0x74" default_value="0x2" />
+<reg address="0xf0" default_value="0xe" />
+<reg address="0xf1" default_value="0x0" />
+<reg address="0xf2" default_value="0xff" />
+<reg address="0xf3" default_value="0x0" />
+<reg address="0xf4" default_value="0x0" />
+<reg address="0xf5" default_value="0x0" />
+</ldn>
+<ldn number="0x1" name="Parallel port" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0x78" />
+<reg address="0x62" default_value="0x0" />
+<reg address="0x63" default_value="0x80" />
+<reg address="0x70" default_value="0x7" />
+<reg address="0x74" default_value="0x3" />
+<reg address="0xf0" default_value="0x3" />
+</ldn>
+<ldn number="0x2" name="COM1" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0xf8" />
+<reg address="0x70" default_value="0x4" />
+<reg address="0xf0" default_value="0x0" />
+</ldn>
+<ldn number="0x3" name="COM2" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x2" />
+<reg address="0x61" default_value="0xf8" />
+<reg address="0x70" default_value="0x3" />
+<reg address="0xf0" default_value="0x0" />
+<reg address="0xf1" default_value="0x0" />
+<reg address="0xf2" default_value="0x0" />
+<reg address="0xf3" default_value="0x7f" />
+</ldn>
+<ldn number="0x5" name="Keyboard" description="">
+<reg address="0x30" default_value="0x1" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x60" />
+<reg address="0x62" default_value="0x0" />
+<reg address="0x63" default_value="0x64" />
+<reg address="0x70" default_value="0x1" />
+<reg address="0x71" default_value="0xc" />
+<reg address="0xf0" default_value="0x80" />
+</ldn>
+<ldn number="0x6" name="Consumer IR" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+</ldn>
+<ldn number="0x7" name="Game port, MIDI, GPIO set 1" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x2" />
+<reg address="0x61" default_value="0x1" />
+<reg address="0x62" default_value="0x3" />
+<reg address="0x63" default_value="0x30" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0xf0" default_value="0xff" />
+<reg address="0xf1" default_value="0x0" />
+<reg address="0xf2" default_value="0x0" />
+</ldn>
+<ldn number="0x8" name="GPIO set 2" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0xf0" default_value="0xff" />
+<reg address="0xf1" default_value="0x0" />
+<reg address="0xf2" default_value="0x0" />
+<reg address="0xf3" default_value="0x0" />
+<reg address="0xf5" default_value="0x0" />
+</ldn>
+<ldn number="0x9" name="GPIO set 3 and 4" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x2" />
+<reg address="0x61" default_value="0x90" />
+<reg address="0xf0" default_value="0xff" />
+<reg address="0xf1" default_value="0x0" />
+<reg address="0xf2" default_value="0x0" />
+<reg address="0xf3" default_value="0x0" />
+<reg address="0xf4" default_value="0x0" />
+</ldn>
+<ldn number="0xa" name="ACPI" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0xe0" default_value="0x0" />
+<reg address="0xe1" default_value="0x0" />
+<reg address="0xe2" default_value="NANA" />
+<reg address="0xe3" default_value="NANA" />
+<reg address="0xe4" default_value="0x0" />
+<reg address="0xe5" default_value="0x0" />
+<reg address="0xe6" default_value="0x0" />
+<reg address="0xe7" default_value="0x0" />
+<reg address="0xf3" default_value="NANA" />
+<reg address="0xf4" default_value="NANA" />
+<reg address="0xf6" default_value="0x0" />
+<reg address="0xf7" default_value="0x0" />
+<reg address="0xf9" default_value="0x0" />
+</ldn>
+<ldn number="0xc" name="GPIO set 5, 6 and 7" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0x70" />
+<reg address="0xf0" default_value="0x0" />
+<reg address="0xf3" default_value="0xff" />
+<reg address="0xf6" default_value="0xff" />
+</ldn>
+</sio>
+<sio model="IT8702F" id="0x8702" >
+</sio>
+<sio model="IT8705F/AF / IT8700F" id="0x8705" >
+<noldn>
+<reg address="0x20" default_value="0x87" />
+<reg address="0x21" default_value="0x5" />
+<reg address="0x22" default_value="0x0" />
+<reg address="0x23" default_value="0x0" />
+<reg address="0x24" default_value="NANA" />
+</noldn>
+<ldn number="0x0" name="Floppy" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0xf0" />
+<reg address="0x70" default_value="0x6" />
+<reg address="0x74" default_value="0x2" />
+<reg address="0xf0" default_value="0x0" />
+<reg address="0xf1" default_value="0x0" />
+</ldn>
+<ldn number="0x1" name="COM1" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0xf8" />
+<reg address="0x70" default_value="0x4" />
+<reg address="0xf0" default_value="0x0" />
+</ldn>
+<ldn number="0x2" name="COM2" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x2" />
+<reg address="0x61" default_value="0xf8" />
+<reg address="0x70" default_value="0x3" />
+<reg address="0xf0" default_value="0x0" />
+<reg address="0xf1" default_value="0x50" />
+<reg address="0xf2" default_value="0x0" />
+<reg address="0xf3" default_value="0x7f" />
+</ldn>
+<ldn number="0x3" name="Parallel port" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0x78" />
+<reg address="0x62" default_value="0x7" />
+<reg address="0x63" default_value="0x78" />
+<reg address="0x64" default_value="0x0" />
+<reg address="0x65" default_value="0x80" />
+<reg address="0x70" default_value="0x7" />
+<reg address="0x74" default_value="0x3" />
+<reg address="0xf0" default_value="0x3" />
+</ldn>
+<ldn number="0x4" name="Environment controller" description="">
+<reg address="0x2b" default_value="0x0" />
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x2" />
+<reg address="0x61" default_value="0x90" />
+<reg address="0x62" default_value="0x2" />
+<reg address="0x63" default_value="0x30" />
+<reg address="0x70" default_value="0x9" />
+<reg address="0xf0" default_value="0x0" />
+<reg address="0xf1" default_value="0x0" />
+<reg address="0xf2" default_value="0x0" />
+<reg address="0xf3" default_value="0x0" />
+<reg address="0xf4" default_value="0x0" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0x0" default_value="NANA" />
+</ldn>
+<ldn number="0x5" name="GPIO" description="">
+<reg address="0x25" default_value="0x0" />
+<reg address="0x26" default_value="0x0" />
+<reg address="0x27" default_value="0x0" />
+<reg address="0x28" default_value="0xff" />
+<reg address="0x29" default_value="0xe0" />
+<reg address="0x2a" default_value="0xff" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x62" default_value="0x0" />
+<reg address="0x63" default_value="0x0" />
+<reg address="0x64" default_value="0x0" />
+<reg address="0x65" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0x71" default_value="0x0" />
+<reg address="0x72" default_value="0x0" />
+<reg address="0xb0" default_value="0x0" />
+<reg address="0xb1" default_value="0x0" />
+<reg address="0xb2" default_value="0x0" />
+<reg address="0xb3" default_value="0x0" />
+<reg address="0xb4" default_value="0x0" />
+<reg address="0xb5" default_value="0x0" />
+<reg address="0xb8" default_value="0x0" />
+<reg address="0xb9" default_value="0x0" />
+<reg address="0xba" default_value="0x0" />
+<reg address="0xbb" default_value="0x0" />
+<reg address="0xbc" default_value="0x0" />
+<reg address="0xbd" default_value="0x0" />
+<reg address="0xc0" default_value="0x0" />
+<reg address="0xc1" default_value="0x0" />
+<reg address="0xc2" default_value="0x0" />
+<reg address="0xc3" default_value="0x0" />
+<reg address="0xc4" default_value="0x0" />
+<reg address="0xc5" default_value="0x0" />
+<reg address="0xc8" default_value="0x0" />
+<reg address="0xc9" default_value="0x0" />
+<reg address="0xca" default_value="0x0" />
+<reg address="0xcb" default_value="0x0" />
+<reg address="0xcc" default_value="0x0" />
+<reg address="0xcd" default_value="0x0" />
+<reg address="0xd0" default_value="0x0" />
+<reg address="0xd1" default_value="0x0" />
+<reg address="0xd2" default_value="0x0" />
+<reg address="0xd3" default_value="0x0" />
+<reg address="0xd4" default_value="0x0" />
+<reg address="0xd5" default_value="0x0" />
+<reg address="0xd6" default_value="0x0" />
+<reg address="0xd8" default_value="0x0" />
+<reg address="0xd9" default_value="0x0" />
+<reg address="0xda" default_value="0x0" />
+<reg address="0xf0" default_value="0x0" />
+<reg address="0xf1" default_value="0x0" />
+<reg address="0xf2" default_value="0x0" />
+<reg address="0xf5" default_value="0x0" />
+<reg address="0xf6" default_value="0x0" />
+<reg address="0xf7" default_value="0x0" />
+<reg address="0xf8" default_value="0x0" />
+<reg address="0xf9" default_value="0x0" />
+<reg address="0xfa" default_value="0x0" />
+<reg address="0xfb" default_value="0x0" />
+<reg address="0xfc" default_value="0x0" />
+<reg address="0xfd" default_value="0x0" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0xff" default_value="0x0" />
+</ldn>
+<ldn number="0x6" name="Game port" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x2" />
+<reg address="0x61" default_value="0x1" />
+</ldn>
+<ldn number="0x7" name="Consumer IR" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0x10" />
+<reg address="0x70" default_value="0xb" />
+<reg address="0xf0" default_value="0x0" />
+</ldn>
+<ldn number="0x8" name="MIDI port" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x70" default_value="0xa" />
+<reg address="0xf0" default_value="0x0" />
+</ldn>
+</sio>
+<sio model="IT8706R" id="0x8706" >
+</sio>
+<sio model="IT8707F" id="0x8707" >
+</sio>
+<sio model="IT8708F" id="0x8708" >
+<noldn>
+<reg address="0x20" default_value="0x87" />
+<reg address="0x21" default_value="0x8" />
+<reg address="0x22" default_value="0x0" />
+<reg address="0x23" default_value="0x0" />
+<reg address="0x24" default_value="NANA" />
+<reg address="0x25" default_value="0x3f" />
+<reg address="0x26" default_value="0x0" />
+<reg address="0x27" default_value="0xff" />
+<reg address="0x28" default_value="0xff" />
+<reg address="0x29" default_value="0xff" />
+<reg address="0x2a" default_value="0xff" />
+<reg address="0x2e" default_value="0x0" />
+<reg address="0x2f" default_value="0x0" />
+</noldn>
+<ldn number="0x0" name="Floppy" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0xf0" />
+<reg address="0x70" default_value="0x6" />
+<reg address="0x74" default_value="0x2" />
+<reg address="0xf0" default_value="0x0" />
+<reg address="0xf1" default_value="0x0" />
+</ldn>
+<ldn number="0x1" name="COM1" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0xf8" />
+<reg address="0x70" default_value="0x4" />
+<reg address="0xf0" default_value="0x0" />
+</ldn>
+<ldn number="0x2" name="COM2" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x2" />
+<reg address="0x61" default_value="0xf8" />
+<reg address="0x70" default_value="0x3" />
+<reg address="0xf0" default_value="0x0" />
+<reg address="0xf1" default_value="0x50" />
+<reg address="0xf2" default_value="0x0" />
+<reg address="0xf3" default_value="0x7f" />
+</ldn>
+<ldn number="0x3" name="Parallel port" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0x78" />
+<reg address="0x62" default_value="0x7" />
+<reg address="0x63" default_value="0x78" />
+<reg address="0x64" default_value="0x0" />
+<reg address="0x65" default_value="0x80" />
+<reg address="0x70" default_value="0x7" />
+<reg address="0x74" default_value="0x3" />
+<reg address="0xf0" default_value="0x3" />
+</ldn>
+<ldn number="0x4" name="SWC" description="">
+<reg address="0x30" default_value="NANA" />
+<reg address="0x60" default_value="NANA" />
+<reg address="0xe2" default_value="0x0" />
+<reg address="0xe3" default_value="0x0" />
+<reg address="0xe4" default_value="0x0" />
+<reg address="0xe5" default_value="0x0" />
+<reg address="0xe6" default_value="0x0" />
+<reg address="0xe7" default_value="0x0" />
+<reg address="0xf0" default_value="0x0" />
+<reg address="0xf1" default_value="0x0" />
+<reg address="0xf2" default_value="0x0" />
+<reg address="0xf3" default_value="0x0" />
+<reg address="0xf4" default_value="0x0" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0x0" default_value="NANA" />
+</ldn>
+<ldn number="0x5" name="Keyboard" description="">
+<reg address="0x30" default_value="0x1" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x60" />
+<reg address="0x62" default_value="0x0" />
+<reg address="0x63" default_value="0x64" />
+<reg address="0x70" default_value="0x1" />
+<reg address="0x71" default_value="0x2" />
+<reg address="0xf0" default_value="0x0" />
+</ldn>
+<ldn number="0x6" name="Mouse" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x70" default_value="0xc" />
+<reg address="0x71" default_value="0x2" />
+<reg address="0xf0" default_value="0x0" />
+</ldn>
+<ldn number="0x7" name="GPIO" description="">
+<reg address="0x70" default_value="0x0" />
+<reg address="0xb0" default_value="0x0" />
+<reg address="0xb1" default_value="0x0" />
+<reg address="0xb2" default_value="0x0" />
+<reg address="0xb3" default_value="0x0" />
+<reg address="0xb4" default_value="0x0" />
+<reg address="0xb5" default_value="0x0" />
+<reg address="0xb8" default_value="0x0" />
+<reg address="0xb9" default_value="0x0" />
+<reg address="0xba" default_value="0x0" />
+<reg address="0xbb" default_value="0x0" />
+<reg address="0xbc" default_value="0x0" />
+<reg address="0xbd" default_value="0x0" />
+<reg address="0xc0" default_value="0x0" />
+<reg address="0xc1" default_value="0x0" />
+<reg address="0xc2" default_value="0x0" />
+<reg address="0xc3" default_value="0x0" />
+<reg address="0xc4" default_value="0x0" />
+<reg address="0xc5" default_value="0x0" />
+<reg address="0xc8" default_value="0x0" />
+<reg address="0xc9" default_value="0x0" />
+<reg address="0xca" default_value="0x0" />
+<reg address="0xcb" default_value="0x0" />
+<reg address="0xcc" default_value="0x0" />
+<reg address="0xcd" default_value="0x0" />
+<reg address="0xd0" default_value="0x0" />
+<reg address="0xd1" default_value="0x0" />
+<reg address="0xd2" default_value="0x0" />
+<reg address="0xd3" default_value="0x0" />
+<reg address="0xd4" default_value="0x0" />
+<reg address="0xd5" default_value="0x0" />
+<reg address="0xd6" default_value="0x0" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0xf0" default_value="0x0" />
+<reg address="0xf1" default_value="0x0" />
+<reg address="0xf2" default_value="0x0" />
+<reg address="0xf3" default_value="0x0" />
+<reg address="0xf4" default_value="0x0" />
+<reg address="0xf5" default_value="0x0" />
+<reg address="0xf6" default_value="0x0" />
+<reg address="0xf7" default_value="0x0" />
+<reg address="0xf8" default_value="0x0" />
+<reg address="0xf9" default_value="0x0" />
+<reg address="0xfa" default_value="0x0" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0xfc" default_value="0x0" />
+</ldn>
+<ldn number="0x8" name="Game port" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x2" />
+<reg address="0x61" default_value="0x1" />
+</ldn>
+<ldn number="0x9" name="Consumer IR" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0x10" />
+<reg address="0x70" default_value="0xb" />
+<reg address="0xf0" default_value="0x0" />
+</ldn>
+<ldn number="0xa" name="MIDI port" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x70" default_value="0xa" />
+<reg address="0xf0" default_value="0x0" />
+</ldn>
+</sio>
+<sio model="IT8710F" id="0x8710" >
+</sio>
+<sio model="IT8711F" id="0x8711" >
+</sio>
+<sio model="IT8712F" id="0x8712" >
+<noldn>
+<reg address="0x20" default_value="0x87" />
+<reg address="0x21" default_value="0x12" />
+<reg address="0x22" default_value="0x8" />
+<reg address="0x23" default_value="0x0" />
+<reg address="0x24" default_value="0x0" />
+<reg address="0x2b" default_value="0x0" />
+</noldn>
+<ldn number="0x0" name="Floppy" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0xf0" />
+<reg address="0x70" default_value="0x6" />
+<reg address="0x74" default_value="0x2" />
+<reg address="0xf0" default_value="0x0" />
+<reg address="0xf1" default_value="0x0" />
+</ldn>
+<ldn number="0x1" name="COM1" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0xf8" />
+<reg address="0x70" default_value="0x4" />
+<reg address="0xf0" default_value="0x0" />
+<reg address="0xf1" default_value="0x50" />
+<reg address="0xf2" default_value="0x0" />
+<reg address="0xf3" default_value="0x7f" />
+</ldn>
+<ldn number="0x2" name="COM2" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x2" />
+<reg address="0x61" default_value="0xf8" />
+<reg address="0x70" default_value="0x3" />
+<reg address="0xf0" default_value="0x0" />
+<reg address="0xf1" default_value="0x50" />
+<reg address="0xf2" default_value="0x0" />
+<reg address="0xf3" default_value="0x7f" />
+</ldn>
+<ldn number="0x3" name="Parallel port" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0x78" />
+<reg address="0x62" default_value="0x7" />
+<reg address="0x63" default_value="0x78" />
+<reg address="0x70" default_value="0x7" />
+<reg address="0x74" default_value="0x3" />
+<reg address="0xf0" default_value="0x3" />
+</ldn>
+<ldn number="0x4" name="Environment controller" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x2" />
+<reg address="0x61" default_value="0x90" />
+<reg address="0x62" default_value="0x2" />
+<reg address="0x63" default_value="0x30" />
+<reg address="0x70" default_value="0x9" />
+<reg address="0xf0" default_value="0x0" />
+<reg address="0xf1" default_value="0x0" />
+<reg address="0xf2" default_value="0x0" />
+<reg address="0xf3" default_value="0x0" />
+<reg address="0xf4" default_value="0x0" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0x0" default_value="NANA" />
+</ldn>
+<ldn number="0x5" name="Keyboard" description="">
+<reg address="0x30" default_value="0x1" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x60" />
+<reg address="0x62" default_value="0x0" />
+<reg address="0x63" default_value="0x64" />
+<reg address="0x70" default_value="0x1" />
+<reg address="0x71" default_value="0x2" />
+<reg address="0xf0" default_value="0x8" />
+</ldn>
+<ldn number="0x6" name="Mouse" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x70" default_value="0xc" />
+<reg address="0x71" default_value="0x2" />
+<reg address="0xf0" default_value="0x0" />
+</ldn>
+<ldn number="0x7" name="GPIO" description="">
+<reg address="0x25" default_value="0x1" />
+<reg address="0x26" default_value="0x0" />
+<reg address="0x27" default_value="0x0" />
+<reg address="0x28" default_value="0x40" />
+<reg address="0x29" default_value="0x0" />
+<reg address="0x2a" default_value="0x0" />
+<reg address="0x2c" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x62" default_value="0x0" />
+<reg address="0x63" default_value="0x0" />
+<reg address="0x64" default_value="0x0" />
+<reg address="0x65" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0x71" default_value="0x0" />
+<reg address="0x72" default_value="0x0" />
+<reg address="0x73" default_value="0xc0" />
+<reg address="0x74" default_value="0x0" />
+<reg address="0xb0" default_value="0x0" />
+<reg address="0xb1" default_value="0x0" />
+<reg address="0xb2" default_value="0x0" />
+<reg address="0xb3" default_value="0x0" />
+<reg address="0xb4" default_value="0x0" />
+<reg address="0xb5" default_value="0x0" />
+<reg address="0xb8" default_value="0x0" />
+<reg address="0xb9" default_value="0x0" />
+<reg address="0xba" default_value="0x0" />
+<reg address="0xbb" default_value="0x0" />
+<reg address="0xbc" default_value="0x0" />
+<reg address="0xbd" default_value="0x0" />
+<reg address="0xc0" default_value="0x1" />
+<reg address="0xc1" default_value="0x0" />
+<reg address="0xc2" default_value="0x0" />
+<reg address="0xc3" default_value="0x40" />
+<reg address="0xc4" default_value="0x0" />
+<reg address="0xc8" default_value="0x1" />
+<reg address="0xc9" default_value="0x0" />
+<reg address="0xca" default_value="0x0" />
+<reg address="0xcb" default_value="0x40" />
+<reg address="0xcc" default_value="0x0" />
+<reg address="0xe0" default_value="0x0" />
+<reg address="0xe1" default_value="0x0" />
+<reg address="0xe2" default_value="0x0" />
+<reg address="0xe3" default_value="0x0" />
+<reg address="0xe4" default_value="0x0" />
+<reg address="0xf0" default_value="0x0" />
+<reg address="0xf1" default_value="0x0" />
+<reg address="0xf2" default_value="0x0" />
+<reg address="0xf3" default_value="0x0" />
+<reg address="0xf4" default_value="0x0" />
+<reg address="0xf5" default_value="0x0" />
+<reg address="0xf6" default_value="0x0" />
+<reg address="0xf7" default_value="0x0" />
+<reg address="0xf8" default_value="0x0" />
+<reg address="0xf9" default_value="0x0" />
+<reg address="0xfa" default_value="0x0" />
+<reg address="0xfb" default_value="0x0" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0xfd" default_value="0x0" />
+</ldn>
+<ldn number="0x8" name="MIDI port" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x70" default_value="0xa" />
+<reg address="0xf0" default_value="0x0" />
+</ldn>
+<ldn number="0x9" name="Game port" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x2" />
+<reg address="0x61" default_value="0x1" />
+</ldn>
+<ldn number="0xa" name="Consumer IR" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0x10" />
+<reg address="0x70" default_value="0xb" />
+<reg address="0xf0" default_value="0x0" />
+</ldn>
+</sio>
+<sio model="IT8716F" id="0x8716" >
+<noldn>
+<reg address="0x20" default_value="0x87" />
+<reg address="0x21" default_value="0x16" />
+<reg address="0x22" default_value="0x1" />
+<reg address="0x23" default_value="0x0" />
+<reg address="0x24" default_value="0x0" />
+<reg address="0x2b" default_value="0x0" />
+</noldn>
+<ldn number="0x0" name="Floppy" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0xf0" />
+<reg address="0x70" default_value="0x6" />
+<reg address="0x74" default_value="0x2" />
+<reg address="0xf0" default_value="0x0" />
+<reg address="0xf1" default_value="0x0" />
+</ldn>
+<ldn number="0x1" name="COM1" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0xf8" />
+<reg address="0x70" default_value="0x4" />
+<reg address="0xf0" default_value="0x0" />
+<reg address="0xf1" default_value="0x50" />
+<reg address="0xf2" default_value="0x0" />
+<reg address="0xf3" default_value="0x7f" />
+</ldn>
+<ldn number="0x2" name="COM2" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x2" />
+<reg address="0x61" default_value="0xf8" />
+<reg address="0x70" default_value="0x3" />
+<reg address="0xf0" default_value="0x0" />
+<reg address="0xf1" default_value="0x50" />
+<reg address="0xf2" default_value="0x0" />
+<reg address="0xf3" default_value="0x7f" />
+</ldn>
+<ldn number="0x3" name="Parallel port" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0x78" />
+<reg address="0x62" default_value="0x7" />
+<reg address="0x63" default_value="0x78" />
+<reg address="0x70" default_value="0x7" />
+<reg address="0x74" default_value="0x3" />
+<reg address="0xf0" default_value="0x3" />
+</ldn>
+<ldn number="0x4" name="Environment controller" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x2" />
+<reg address="0x61" default_value="0x90" />
+<reg address="0x62" default_value="0x2" />
+<reg address="0x63" default_value="0x30" />
+<reg address="0x70" default_value="0x9" />
+<reg address="0xf0" default_value="0x0" />
+<reg address="0xf1" default_value="0x0" />
+<reg address="0xf2" default_value="0x0" />
+<reg address="0xf3" default_value="0x0" />
+<reg address="0xf4" default_value="0x0" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0x0" default_value="NANA" />
+</ldn>
+<ldn number="0x5" name="Keyboard" description="">
+<reg address="0x30" default_value="0x1" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x60" />
+<reg address="0x62" default_value="0x0" />
+<reg address="0x63" default_value="0x64" />
+<reg address="0x70" default_value="0x1" />
+<reg address="0x71" default_value="0x2" />
+<reg address="0xf0" default_value="0x0" />
+</ldn>
+<ldn number="0x6" name="Mouse" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x70" default_value="0xc" />
+<reg address="0x71" default_value="0x2" />
+<reg address="0xf0" default_value="0x0" />
+</ldn>
+<ldn number="0x7" name="GPIO" description="">
+<reg address="0x25" default_value="0x1" />
+<reg address="0x26" default_value="0x0" />
+<reg address="0x27" default_value="0x0" />
+<reg address="0x28" default_value="0x40" />
+<reg address="0x29" default_value="0x0" />
+<reg address="0x2a" default_value="0x0" />
+<reg address="0x2c" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x62" default_value="0x0" />
+<reg address="0x63" default_value="0x0" />
+<reg address="0x64" default_value="0x0" />
+<reg address="0x65" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0x71" default_value="0x0" />
+<reg address="0x72" default_value="0x20" />
+<reg address="0x73" default_value="0x38" />
+<reg address="0x74" default_value="0x0" />
+<reg address="0xb0" default_value="0x0" />
+<reg address="0xb1" default_value="0x0" />
+<reg address="0xb2" default_value="0x0" />
+<reg address="0xb3" default_value="0x0" />
+<reg address="0xb4" default_value="0x0" />
+<reg address="0xb5" default_value="0x0" />
+<reg address="0xb8" default_value="0x0" />
+<reg address="0xb9" default_value="0x0" />
+<reg address="0xba" default_value="0x0" />
+<reg address="0xbb" default_value="0x0" />
+<reg address="0xbc" default_value="0x0" />
+<reg address="0xbd" default_value="0x0" />
+<reg address="0xc0" default_value="0x1" />
+<reg address="0xc1" default_value="0x0" />
+<reg address="0xc2" default_value="0x0" />
+<reg address="0xc3" default_value="0x40" />
+<reg address="0xc4" default_value="0x0" />
+<reg address="0xc8" default_value="0x1" />
+<reg address="0xc9" default_value="0x0" />
+<reg address="0xca" default_value="0x0" />
+<reg address="0xcb" default_value="0x40" />
+<reg address="0xcc" default_value="0x0" />
+<reg address="0xe0" default_value="0x0" />
+<reg address="0xe1" default_value="0x0" />
+<reg address="0xe2" default_value="0x0" />
+<reg address="0xe3" default_value="0x0" />
+<reg address="0xe4" default_value="0x0" />
+<reg address="0xf0" default_value="0x0" />
+<reg address="0xf1" default_value="0x0" />
+<reg address="0xf2" default_value="0x0" />
+<reg address="0xf3" default_value="0x0" />
+<reg address="0xf4" default_value="0x0" />
+<reg address="0xf5" default_value="0x0" />
+<reg address="0xf6" default_value="0x0" />
+<reg address="0xf7" default_value="0x0" />
+<reg address="0xf8" default_value="0x0" />
+<reg address="0xf9" default_value="0x0" />
+<reg address="0xfa" default_value="0x0" />
+<reg address="0xfb" default_value="0x0" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0xfd" default_value="0x0" />
+</ldn>
+<ldn number="0x8" name="MIDI port" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x70" default_value="0xa" />
+<reg address="0xf0" default_value="0x0" />
+</ldn>
+<ldn number="0x9" name="Game port" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x2" />
+<reg address="0x61" default_value="0x1" />
+</ldn>
+<ldn number="0xa" name="Consumer IR" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0x10" />
+<reg address="0x70" default_value="0xb" />
+<reg address="0xf0" default_value="0x0" />
+</ldn>
+</sio>
+<sio model="IT8718F" id="0x8718" >
+<noldn>
+<reg address="0x20" default_value="0x87" />
+<reg address="0x21" default_value="0x18" />
+<reg address="0x22" default_value="0x1" />
+<reg address="0x23" default_value="0x0" />
+<reg address="0x24" default_value="0x0" />
+<reg address="0x2b" default_value="0x0" />
+</noldn>
+<ldn number="0x0" name="Floppy" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0xf0" />
+<reg address="0x70" default_value="0x6" />
+<reg address="0x74" default_value="0x2" />
+<reg address="0xf0" default_value="0x0" />
+<reg address="0xf1" default_value="0x0" />
+</ldn>
+<ldn number="0x1" name="COM1" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0xf8" />
+<reg address="0x70" default_value="0x4" />
+<reg address="0xf0" default_value="0x0" />
+<reg address="0xf1" default_value="0x50" />
+<reg address="0xf2" default_value="0x0" />
+<reg address="0xf3" default_value="0x7f" />
+</ldn>
+<ldn number="0x2" name="COM2" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x2" />
+<reg address="0x61" default_value="0xf8" />
+<reg address="0x70" default_value="0x3" />
+<reg address="0xf0" default_value="0x0" />
+<reg address="0xf1" default_value="0x50" />
+<reg address="0xf2" default_value="0x0" />
+<reg address="0xf3" default_value="0x7f" />
+</ldn>
+<ldn number="0x3" name="Parallel port" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0x78" />
+<reg address="0x62" default_value="0x7" />
+<reg address="0x63" default_value="0x78" />
+<reg address="0x70" default_value="0x7" />
+<reg address="0x74" default_value="0x3" />
+<reg address="0xf0" default_value="0x3" />
+</ldn>
+<ldn number="0x4" name="Environment controller" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x2" />
+<reg address="0x61" default_value="0x90" />
+<reg address="0x62" default_value="0x2" />
+<reg address="0x63" default_value="0x30" />
+<reg address="0x70" default_value="0x9" />
+<reg address="0xf0" default_value="0x0" />
+<reg address="0xf1" default_value="0x0" />
+<reg address="0xf2" default_value="0x0" />
+<reg address="0xf3" default_value="0x0" />
+<reg address="0xf4" default_value="0x0" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0x0" default_value="NANA" />
+</ldn>
+<ldn number="0x5" name="Keyboard" description="">
+<reg address="0x30" default_value="0x1" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x60" />
+<reg address="0x62" default_value="0x0" />
+<reg address="0x63" default_value="0x64" />
+<reg address="0x70" default_value="0x1" />
+<reg address="0x71" default_value="0x2" />
+<reg address="0xf0" default_value="0x0" />
+</ldn>
+<ldn number="0x6" name="Mouse" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x70" default_value="0xc" />
+<reg address="0x71" default_value="0x2" />
+<reg address="0xf0" default_value="0x0" />
+</ldn>
+<ldn number="0x7" name="GPIO" description="">
+<reg address="0x25" default_value="0x1" />
+<reg address="0x26" default_value="0x0" />
+<reg address="0x27" default_value="0x0" />
+<reg address="0x28" default_value="0x40" />
+<reg address="0x29" default_value="0x0" />
+<reg address="0x2a" default_value="0x0" />
+<reg address="0x2c" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x62" default_value="0x0" />
+<reg address="0x63" default_value="0x0" />
+<reg address="0x64" default_value="0x0" />
+<reg address="0x65" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0x71" default_value="0x0" />
+<reg address="0x72" default_value="0x20" />
+<reg address="0x73" default_value="0x38" />
+<reg address="0x74" default_value="0x0" />
+<reg address="0xb0" default_value="0x0" />
+<reg address="0xb1" default_value="0x0" />
+<reg address="0xb2" default_value="0x0" />
+<reg address="0xb3" default_value="0x0" />
+<reg address="0xb4" default_value="0x0" />
+<reg address="0xb5" default_value="0x0" />
+<reg address="0xb8" default_value="0x0" />
+<reg address="0xb9" default_value="0x0" />
+<reg address="0xba" default_value="0x0" />
+<reg address="0xbb" default_value="0x0" />
+<reg address="0xbc" default_value="0x0" />
+<reg address="0xbd" default_value="0x0" />
+<reg address="0xc0" default_value="0x1" />
+<reg address="0xc1" default_value="0x0" />
+<reg address="0xc2" default_value="0x0" />
+<reg address="0xc3" default_value="0x40" />
+<reg address="0xc4" default_value="0x0" />
+<reg address="0xc5" default_value="0x0" />
+<reg address="0xc8" default_value="0x1" />
+<reg address="0xc9" default_value="0x0" />
+<reg address="0xca" default_value="0x0" />
+<reg address="0xcb" default_value="0x40" />
+<reg address="0xcc" default_value="0x0" />
+<reg address="0xe0" default_value="0x0" />
+<reg address="0xe1" default_value="0x0" />
+<reg address="0xe2" default_value="0x0" />
+<reg address="0xe3" default_value="0x0" />
+<reg address="0xe4" default_value="0x0" />
+<reg address="0xe5" default_value="0x0" />
+<reg address="0xe6" default_value="0x0" />
+<reg address="0xe7" default_value="0x0" />
+<reg address="0xf0" default_value="0x0" />
+<reg address="0xf1" default_value="0x0" />
+<reg address="0xf2" default_value="0x0" />
+<reg address="0xf3" default_value="0x0" />
+<reg address="0xf4" default_value="0x0" />
+<reg address="0xf5" default_value="0x0" />
+<reg address="0xf6" default_value="0x0" />
+<reg address="0xf7" default_value="0x0" />
+<reg address="0xf8" default_value="0x0" />
+<reg address="0xf9" default_value="0x0" />
+<reg address="0xfa" default_value="0x0" />
+<reg address="0xfb" default_value="0x0" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0xfd" default_value="0x0" />
+<reg address="0xfe" default_value="0x0" />
+<reg address="0xff" default_value="0x0" />
+</ldn>
+<ldn number="0xa" name="Consumer IR" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0x10" />
+<reg address="0x70" default_value="0xb" />
+<reg address="0xf0" default_value="0x0" />
+</ldn>
+</sio>
+<sio model="IT8720F" id="0x8720" >
+</sio>
+<sio model="IT8721F" id="0x8721" >
+</sio>
+<sio model="IT8722F" id="0x8722" >
+</sio>
+<sio model="IT8726F" id="0x8726" >
+<noldn>
+<reg address="0x20" default_value="0x87" />
+<reg address="0x21" default_value="0x26" />
+<reg address="0x22" default_value="0x1" />
+<reg address="0x23" default_value="0x0" />
+<reg address="0x24" default_value="0xfffffffb" />
+<reg address="0x2b" default_value="0x0" />
+</noldn>
+<ldn number="0x0" name="Floppy" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0xf0" />
+<reg address="0x70" default_value="0x6" />
+<reg address="0x74" default_value="0x2" />
+<reg address="0xf0" default_value="0x0" />
+<reg address="0xf1" default_value="0x0" />
+</ldn>
+<ldn number="0x1" name="COM1" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0xf8" />
+<reg address="0x70" default_value="0x4" />
+<reg address="0xf0" default_value="0x0" />
+<reg address="0xf1" default_value="0x50" />
+<reg address="0xf2" default_value="0x0" />
+<reg address="0xf3" default_value="0x7f" />
+</ldn>
+<ldn number="0x2" name="COM2" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x2" />
+<reg address="0x61" default_value="0xf8" />
+<reg address="0x70" default_value="0x3" />
+<reg address="0xf0" default_value="0x0" />
+<reg address="0xf1" default_value="0x50" />
+<reg address="0xf2" default_value="0x0" />
+<reg address="0xf3" default_value="0x7f" />
+</ldn>
+<ldn number="0x3" name="Parallel port" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0x78" />
+<reg address="0x62" default_value="0x7" />
+<reg address="0x63" default_value="0x78" />
+<reg address="0x70" default_value="0x7" />
+<reg address="0x74" default_value="0x3" />
+<reg address="0xf0" default_value="0x3" />
+</ldn>
+<ldn number="0x4" name="Environment controller" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x2" />
+<reg address="0x61" default_value="0x90" />
+<reg address="0x62" default_value="0x2" />
+<reg address="0x63" default_value="0x30" />
+<reg address="0x70" default_value="0x9" />
+<reg address="0xf0" default_value="0x0" />
+<reg address="0xf1" default_value="0x0" />
+<reg address="0xf2" default_value="0x0" />
+<reg address="0xf3" default_value="0x0" />
+<reg address="0xf4" default_value="0x0" />
+<reg address="0xf5" default_value="0xfffffffb" />
+<reg address="0xf6" default_value="0xfffffffb" />
+</ldn>
+<ldn number="0x5" name="Keyboard" description="">
+<reg address="0x30" default_value="0x1" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x60" />
+<reg address="0x62" default_value="0x0" />
+<reg address="0x63" default_value="0x64" />
+<reg address="0x70" default_value="0x1" />
+<reg address="0x71" default_value="0x2" />
+<reg address="0xf0" default_value="0x8" />
+</ldn>
+<ldn number="0x6" name="Mouse" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x70" default_value="0xc" />
+<reg address="0x71" default_value="0x2" />
+<reg address="0xf0" default_value="0x0" />
+</ldn>
+<ldn number="0x7" name="GPIO" description="">
+<reg address="0x25" default_value="0x1" />
+<reg address="0x26" default_value="0x0" />
+<reg address="0x27" default_value="0x0" />
+<reg address="0x28" default_value="0x40" />
+<reg address="0x29" default_value="0x0" />
+<reg address="0x2a" default_value="0x0" />
+<reg address="0x2c" default_value="0x1f" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x62" default_value="0x0" />
+<reg address="0x63" default_value="0x0" />
+<reg address="0x64" default_value="0x0" />
+<reg address="0x65" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0x71" default_value="0x0" />
+<reg address="0x72" default_value="0xfffffffb" />
+<reg address="0x73" default_value="0x38" />
+<reg address="0x74" default_value="0x0" />
+<reg address="0xb0" default_value="0x0" />
+<reg address="0xb1" default_value="0x0" />
+<reg address="0xb2" default_value="0x0" />
+<reg address="0xb3" default_value="0x0" />
+<reg address="0xb4" default_value="0x0" />
+<reg address="0xb5" default_value="0x0" />
+<reg address="0xb8" default_value="0x0" />
+<reg address="0xb9" default_value="0x0" />
+<reg address="0xba" default_value="0x0" />
+<reg address="0xbb" default_value="0x0" />
+<reg address="0xbc" default_value="0x0" />
+<reg address="0xbd" default_value="0x0" />
+<reg address="0xc0" default_value="0x1" />
+<reg address="0xc1" default_value="0x0" />
+<reg address="0xc2" default_value="0x0" />
+<reg address="0xc3" default_value="0x40" />
+<reg address="0xc4" default_value="0x0" />
+<reg address="0xc8" default_value="0x1" />
+<reg address="0xc9" default_value="0x0" />
+<reg address="0xca" default_value="0x0" />
+<reg address="0xcb" default_value="0x40" />
+<reg address="0xcc" default_value="0x0" />
+<reg address="0xe0" default_value="0x0" />
+<reg address="0xe1" default_value="0x0" />
+<reg address="0xe2" default_value="0x0" />
+<reg address="0xe3" default_value="0x0" />
+<reg address="0xe4" default_value="0x0" />
+<reg address="0xf0" default_value="0x0" />
+<reg address="0xf1" default_value="0x0" />
+<reg address="0xf2" default_value="0x0" />
+<reg address="0xf3" default_value="0x0" />
+<reg address="0xf4" default_value="0x0" />
+<reg address="0xf5" default_value="0x0" />
+<reg address="0xf6" default_value="0x0" />
+<reg address="0xf7" default_value="0x0" />
+<reg address="0xf8" default_value="0x0" />
+<reg address="0xf9" default_value="0x0" />
+<reg address="0xfa" default_value="0x0" />
+<reg address="0xfb" default_value="0x0" />
+<reg address="0xfc" default_value="0xfffffffb" />
+<reg address="0xfd" default_value="0x0" />
+</ldn>
+<ldn number="0x8" name="MIDI port" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x70" default_value="0xa" />
+<reg address="0xf0" default_value="0x0" />
+</ldn>
+<ldn number="0x9" name="Game port" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x2" />
+<reg address="0x61" default_value="0x1" />
+</ldn>
+<ldn number="0xa" name="Consumer IR" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0x10" />
+<reg address="0x70" default_value="0xb" />
+<reg address="0xf0" default_value="0x0" />
+</ldn>
+</sio>
+<sio model="IT8761E" id="0x8761" >
+</sio>
+<sio model="IT8780F" id="0x8780" >
+</sio>
+</sioarray>
Index: util/pygen/data/sio/nsc.sio.xml
===================================================================
--- util/pygen/data/sio/nsc.sio.xml	(revision 0)
+++ util/pygen/data/sio/nsc.sio.xml	(revision 0)
@@ -0,0 +1,1487 @@ 
+<?xml version="1.0" encoding="UTF-8"?>
+<sioarray name="nsc" description="nsc superios">
+<sio model="PC97307" id="0xcf" >
+<noldn>
+<reg address="0x20" default_value="0xcf" />
+<reg address="0x21" default_value="0xfffffffb" />
+<reg address="0x22" default_value="0xfffffffb" />
+<reg address="0x23" default_value="0x0" />
+<reg address="0x24" default_value="0x0" />
+<reg address="0x27" default_value="NANA" />
+</noldn>
+<ldn number="0x0" name="Keyboard" description="">
+<reg address="0x30" default_value="0xfffffffb" />
+<reg address="0x31" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x60" />
+<reg address="0x62" default_value="0x0" />
+<reg address="0x63" default_value="0x64" />
+<reg address="0x70" default_value="0x1" />
+<reg address="0x71" default_value="0x2" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+<reg address="0xf0" default_value="0x40" />
+</ldn>
+<ldn number="0x1" name="Mouse" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x70" default_value="0xc" />
+<reg address="0x71" default_value="0x2" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+</ldn>
+<ldn number="0x2" name="Real-time clock (RTC), advanced power control (APC)" description="">
+<reg address="0x30" default_value="0xfffffffb" />
+<reg address="0x31" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x70" />
+<reg address="0x70" default_value="0x8" />
+<reg address="0x71" default_value="0x0" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+</ldn>
+<ldn number="0x3" name="Floppy" description="">
+<reg address="0x30" default_value="0xfffffffb" />
+<reg address="0x31" default_value="0x0" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0xf2" />
+<reg address="0x70" default_value="0x6" />
+<reg address="0x71" default_value="0x3" />
+<reg address="0x74" default_value="0x2" />
+<reg address="0x75" default_value="0x4" />
+<reg address="0xf0" default_value="0x20" />
+<reg address="0xf1" default_value="0x0" />
+</ldn>
+<ldn number="0x4" name="Parallel port" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x31" default_value="0x0" />
+<reg address="0x60" default_value="0x2" />
+<reg address="0x61" default_value="0x78" />
+<reg address="0x70" default_value="0x7" />
+<reg address="0x71" default_value="0x0" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+<reg address="0xf0" default_value="0xf2" />
+</ldn>
+<ldn number="0x5" name="COM2 / IR" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x31" default_value="0x0" />
+<reg address="0x60" default_value="0x2" />
+<reg address="0x61" default_value="0xf8" />
+<reg address="0x70" default_value="0x3" />
+<reg address="0x71" default_value="0x3" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+<reg address="0xf0" default_value="0x2" />
+</ldn>
+<ldn number="0x6" name="COM1" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x31" default_value="0x0" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0xf8" />
+<reg address="0x70" default_value="0x4" />
+<reg address="0x71" default_value="0x3" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+<reg address="0xf0" default_value="0x2" />
+</ldn>
+<ldn number="0x7" name="GPIO" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x31" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+</ldn>
+<ldn number="0x8" name="Power management" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x31" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+</ldn>
+</sio>
+<sio model="PC87317" id="0xd0" >
+<noldn>
+<reg address="0x20" default_value="0xd0" />
+<reg address="0x21" default_value="0xfffffffb" />
+<reg address="0x22" default_value="0xfffffffb" />
+<reg address="0x23" default_value="0x0" />
+<reg address="0x24" default_value="0x0" />
+<reg address="0x25" default_value="0x0" />
+</noldn>
+<ldn number="0x0" name="Keyboard" description="">
+<reg address="0x30" default_value="0xfffffffb" />
+<reg address="0x31" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x60" />
+<reg address="0x62" default_value="0x0" />
+<reg address="0x63" default_value="0x64" />
+<reg address="0x70" default_value="0x1" />
+<reg address="0x71" default_value="0x2" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+<reg address="0xf0" default_value="0x40" />
+</ldn>
+<ldn number="0x1" name="Mouse" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x70" default_value="0xc" />
+<reg address="0x71" default_value="0x2" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+</ldn>
+<ldn number="0x2" name="Real-time clock (RTC), advanced power control (APC)" description="">
+<reg address="0x30" default_value="0xfffffffb" />
+<reg address="0x31" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x70" />
+<reg address="0x70" default_value="0x8" />
+<reg address="0x71" default_value="0x0" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+</ldn>
+<ldn number="0x3" name="Floppy" description="">
+<reg address="0x30" default_value="0xfffffffb" />
+<reg address="0x31" default_value="0x0" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0xf2" />
+<reg address="0x70" default_value="0x6" />
+<reg address="0x71" default_value="0x3" />
+<reg address="0x74" default_value="0x2" />
+<reg address="0x75" default_value="0x4" />
+<reg address="0xf0" default_value="0x20" />
+<reg address="0xf1" default_value="0x0" />
+</ldn>
+<ldn number="0x4" name="Parallel port" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x31" default_value="0x0" />
+<reg address="0x60" default_value="0x2" />
+<reg address="0x61" default_value="0x78" />
+<reg address="0x70" default_value="0x7" />
+<reg address="0x71" default_value="0x0" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+<reg address="0xf0" default_value="0xf2" />
+</ldn>
+<ldn number="0x5" name="COM2 / IR" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x31" default_value="0x0" />
+<reg address="0x60" default_value="0x2" />
+<reg address="0x61" default_value="0xf8" />
+<reg address="0x70" default_value="0x3" />
+<reg address="0x71" default_value="0x3" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+<reg address="0xf0" default_value="0x2" />
+</ldn>
+<ldn number="0x6" name="COM1" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x31" default_value="0x0" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0xf8" />
+<reg address="0x70" default_value="0x4" />
+<reg address="0x71" default_value="0x3" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+<reg address="0xf0" default_value="0x2" />
+</ldn>
+<ldn number="0x7" name="GPIO" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x31" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+</ldn>
+<ldn number="0x8" name="Power management" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x31" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+</ldn>
+</sio>
+<sio model="PC97317" id="0xdf" >
+<noldn>
+<reg address="0x20" default_value="0xdf" />
+<reg address="0x21" default_value="0xfffffffb" />
+<reg address="0x22" default_value="0xfffffffb" />
+<reg address="0x23" default_value="0x0" />
+<reg address="0x24" default_value="0x0" />
+<reg address="0x25" default_value="0x0" />
+<reg address="0x27" default_value="NANA" />
+</noldn>
+<ldn number="0x0" name="Keyboard" description="">
+<reg address="0x30" default_value="0xfffffffb" />
+<reg address="0x31" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x60" />
+<reg address="0x62" default_value="0x0" />
+<reg address="0x63" default_value="0x64" />
+<reg address="0x70" default_value="0x1" />
+<reg address="0x71" default_value="0x2" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+<reg address="0xf0" default_value="0x40" />
+</ldn>
+<ldn number="0x1" name="Mouse" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x70" default_value="0xc" />
+<reg address="0x71" default_value="0x2" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+</ldn>
+<ldn number="0x2" name="Real-time clock (RTC), advanced power control (APC)" description="">
+<reg address="0x30" default_value="0xfffffffb" />
+<reg address="0x31" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x70" />
+<reg address="0x70" default_value="0x8" />
+<reg address="0x71" default_value="0x0" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+</ldn>
+<ldn number="0x3" name="Floppy" description="">
+<reg address="0x30" default_value="0xfffffffb" />
+<reg address="0x31" default_value="0x0" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0xf2" />
+<reg address="0x70" default_value="0x6" />
+<reg address="0x71" default_value="0x3" />
+<reg address="0x74" default_value="0x2" />
+<reg address="0x75" default_value="0x4" />
+<reg address="0xf0" default_value="0x20" />
+<reg address="0xf1" default_value="0x0" />
+</ldn>
+<ldn number="0x4" name="Parallel port" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x31" default_value="0x0" />
+<reg address="0x60" default_value="0x2" />
+<reg address="0x61" default_value="0x78" />
+<reg address="0x70" default_value="0x7" />
+<reg address="0x71" default_value="0x0" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+<reg address="0xf0" default_value="0xf2" />
+</ldn>
+<ldn number="0x5" name="COM2 / IR" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x31" default_value="0x0" />
+<reg address="0x60" default_value="0x2" />
+<reg address="0x61" default_value="0xf8" />
+<reg address="0x70" default_value="0x3" />
+<reg address="0x71" default_value="0x3" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+<reg address="0xf0" default_value="0x2" />
+</ldn>
+<ldn number="0x6" name="COM1" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x31" default_value="0x0" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0xf8" />
+<reg address="0x70" default_value="0x4" />
+<reg address="0x71" default_value="0x3" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+<reg address="0xf0" default_value="0x2" />
+</ldn>
+<ldn number="0x7" name="GPIO" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x31" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+</ldn>
+<ldn number="0x8" name="Power management" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x31" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+</ldn>
+</sio>
+<sio model="PC87309" id="0xe0" >
+<noldn>
+<reg address="0x20" default_value="0xe0" />
+<reg address="0x21" default_value="0xfffffffb" />
+<reg address="0x22" default_value="0x0" />
+<reg address="0x27" default_value="NANA" />
+<reg address="0x2e" default_value="0xfffffffc" />
+</noldn>
+<ldn number="0x0" name="Floppy" description="">
+<reg address="0x30" default_value="0xfffffffb" />
+<reg address="0x31" default_value="0x0" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0xf2" />
+<reg address="0x70" default_value="0x6" />
+<reg address="0x71" default_value="0x3" />
+<reg address="0x74" default_value="0x2" />
+<reg address="0x75" default_value="0x4" />
+<reg address="0xf0" default_value="0x20" />
+<reg address="0xf1" default_value="0x0" />
+</ldn>
+<ldn number="0x1" name="Parallel port" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x31" default_value="0x0" />
+<reg address="0x60" default_value="0x2" />
+<reg address="0x61" default_value="0x78" />
+<reg address="0x70" default_value="0x7" />
+<reg address="0x71" default_value="0x0" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+<reg address="0xf0" default_value="0xf2" />
+</ldn>
+<ldn number="0x2" name="COM2 / IR" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x31" default_value="0x0" />
+<reg address="0x60" default_value="0x2" />
+<reg address="0x61" default_value="0xf8" />
+<reg address="0x70" default_value="0x3" />
+<reg address="0x71" default_value="0x3" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+<reg address="0xf0" default_value="0x2" />
+</ldn>
+<ldn number="0x3" name="COM1" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x31" default_value="0x0" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0xf8" />
+<reg address="0x70" default_value="0x4" />
+<reg address="0x71" default_value="0x3" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+<reg address="0xf0" default_value="0x2" />
+</ldn>
+<ldn number="0x4" name="Power management" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x31" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+</ldn>
+<ldn number="0x5" name="Mouse" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x70" default_value="0xc" />
+<reg address="0x71" default_value="0x2" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+</ldn>
+<ldn number="0x6" name="Keyboard" description="">
+<reg address="0x30" default_value="0x1" />
+<reg address="0x31" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x60" />
+<reg address="0x62" default_value="0x0" />
+<reg address="0x63" default_value="0x64" />
+<reg address="0x70" default_value="0x1" />
+<reg address="0x71" default_value="0x2" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+<reg address="0xf0" default_value="0x40" />
+</ldn>
+</sio>
+<sio model="PC87360" id="0xe1" >
+<noldn>
+<reg address="0x20" default_value="0xe1" />
+<reg address="0x21" default_value="0x11" />
+<reg address="0x22" default_value="0x0" />
+<reg address="0x23" default_value="0x3" />
+<reg address="0x24" default_value="0x0" />
+<reg address="0x25" default_value="0x0" />
+<reg address="0x26" default_value="0x0" />
+<reg address="0x27" default_value="NANA" />
+<reg address="0x28" default_value="0x0" />
+<reg address="0x2a" default_value="0xfffffffb" />
+<reg address="0x2b" default_value="0x0" />
+<reg address="0x2c" default_value="0x0" />
+<reg address="0x2d" default_value="0x0" />
+<reg address="0x2e" default_value="0xfffffffc" />
+</noldn>
+<ldn number="0x0" name="Floppy" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0xf2" />
+<reg address="0x70" default_value="0x6" />
+<reg address="0x71" default_value="0x3" />
+<reg address="0x74" default_value="0x2" />
+<reg address="0x75" default_value="0x4" />
+<reg address="0xf0" default_value="0x24" />
+<reg address="0xf1" default_value="0x0" />
+</ldn>
+<ldn number="0x1" name="Parallel port" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x2" />
+<reg address="0x61" default_value="0x78" />
+<reg address="0x70" default_value="0x7" />
+<reg address="0x71" default_value="0x2" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+<reg address="0xf0" default_value="0xf2" />
+</ldn>
+<ldn number="0x2" name="COM2" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x2" />
+<reg address="0x61" default_value="0xf8" />
+<reg address="0x70" default_value="0x3" />
+<reg address="0x71" default_value="0x3" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+<reg address="0xf0" default_value="0x2" />
+</ldn>
+<ldn number="0x3" name="COM1" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0xf8" />
+<reg address="0x70" default_value="0x4" />
+<reg address="0x71" default_value="0x3" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+<reg address="0xf0" default_value="0x2" />
+</ldn>
+<ldn number="0x4" name="System wake-up control (SWC)" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0x71" default_value="0x3" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+</ldn>
+<ldn number="0x5" name="Mouse" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x70" default_value="0xc" />
+<reg address="0x71" default_value="0x2" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+</ldn>
+<ldn number="0x6" name="Keyboard" description="">
+<reg address="0x30" default_value="0x1" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x60" />
+<reg address="0x62" default_value="0x0" />
+<reg address="0x63" default_value="0x64" />
+<reg address="0x70" default_value="0x1" />
+<reg address="0x71" default_value="0x2" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+<reg address="0xf0" default_value="0x40" />
+</ldn>
+<ldn number="0x7" name="GPIO" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0x71" default_value="0x3" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+<reg address="0xf0" default_value="0x0" />
+<reg address="0xf1" default_value="0x0" />
+<reg address="0xf2" default_value="0x0" />
+</ldn>
+<ldn number="0x8" name="ACCESS.bus (ACB)" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0x71" default_value="0x3" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+<reg address="0xf0" default_value="0x0" />
+</ldn>
+<ldn number="0x9" name="Fan speed control and monitor (FSCM)" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0x71" default_value="0x3" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+<reg address="0xf0" default_value="0x0" />
+</ldn>
+<ldn number="0xa" name="Watchdog timer" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0x71" default_value="0x3" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+<reg address="0xf0" default_value="0x2" />
+</ldn>
+</sio>
+<sio model="PC87351" id="0xe2" >
+<noldn>
+<reg address="0x20" default_value="0xe2" />
+<reg address="0x21" default_value="0x11" />
+<reg address="0x22" default_value="0xa1" />
+<reg address="0x23" default_value="0x0" />
+<reg address="0x24" default_value="0xfffffffb" />
+<reg address="0x27" default_value="NANA" />
+<reg address="0x2e" default_value="0xfffffffc" />
+</noldn>
+<ldn number="0x0" name="Floppy" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0xf2" />
+<reg address="0x70" default_value="0x6" />
+<reg address="0x71" default_value="0x3" />
+<reg address="0x74" default_value="0x2" />
+<reg address="0x75" default_value="0x4" />
+<reg address="0xf0" default_value="0x24" />
+<reg address="0xf1" default_value="0x0" />
+</ldn>
+<ldn number="0x1" name="Parallel port" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x2" />
+<reg address="0x61" default_value="0x78" />
+<reg address="0x70" default_value="0x7" />
+<reg address="0x71" default_value="0x2" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+<reg address="0xf0" default_value="0xf2" />
+</ldn>
+<ldn number="0x2" name="COM2" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x2" />
+<reg address="0x61" default_value="0xf8" />
+<reg address="0x70" default_value="0x3" />
+<reg address="0x71" default_value="0x3" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+<reg address="0xf0" default_value="0x2" />
+</ldn>
+<ldn number="0x3" name="COM1" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0xf8" />
+<reg address="0x70" default_value="0x4" />
+<reg address="0x71" default_value="0x3" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+<reg address="0xf0" default_value="0x2" />
+</ldn>
+<ldn number="0x4" name="System wake-up control (SWC)" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0x71" default_value="0x3" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+</ldn>
+<ldn number="0x5" name="Mouse" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x70" default_value="0xc" />
+<reg address="0x71" default_value="0x2" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+</ldn>
+<ldn number="0x6" name="Keyboard" description="">
+<reg address="0x30" default_value="0x1" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x60" />
+<reg address="0x62" default_value="0x0" />
+<reg address="0x63" default_value="0x64" />
+<reg address="0x70" default_value="0x1" />
+<reg address="0x71" default_value="0x2" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+<reg address="0xf0" default_value="0x40" />
+</ldn>
+<ldn number="0x7" name="GPIO" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0x71" default_value="0x3" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+<reg address="0xf0" default_value="0x0" />
+<reg address="0xf1" default_value="0x0" />
+</ldn>
+<ldn number="0x8" name="Fan speed control" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0x71" default_value="0x0" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+<reg address="0xf0" default_value="0x0" />
+</ldn>
+</sio>
+<sio model="PC87364" id="0xe4" >
+</sio>
+<sio model="PC87365" id="0xe5" >
+</sio>
+<sio model="PC87363" id="0xe8" >
+</sio>
+<sio model="PC87366" id="0xe9" >
+<noldn>
+<reg address="0x20" default_value="0xe9" />
+<reg address="0x21" default_value="0x11" />
+<reg address="0x22" default_value="0x0" />
+<reg address="0x23" default_value="0x3" />
+<reg address="0x24" default_value="0x0" />
+<reg address="0x25" default_value="0x0" />
+<reg address="0x27" default_value="NANA" />
+<reg address="0x28" default_value="0x0" />
+<reg address="0x2a" default_value="0xfffffffb" />
+<reg address="0x2b" default_value="0xfffffffb" />
+<reg address="0x2c" default_value="0x0" />
+<reg address="0x2d" default_value="0xfffffffb" />
+<reg address="0x2e" default_value="0xfffffffc" />
+</noldn>
+<ldn number="0x0" name="Floppy" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0xf2" />
+<reg address="0x70" default_value="0x6" />
+<reg address="0x71" default_value="0x3" />
+<reg address="0x74" default_value="0x2" />
+<reg address="0x75" default_value="0x4" />
+<reg address="0xf0" default_value="0x24" />
+<reg address="0xf1" default_value="0x0" />
+</ldn>
+<ldn number="0x1" name="Parallel port" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x2" />
+<reg address="0x61" default_value="0x78" />
+<reg address="0x70" default_value="0x7" />
+<reg address="0x71" default_value="0x2" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+<reg address="0xf0" default_value="0xf2" />
+</ldn>
+<ldn number="0x2" name="COM2" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x2" />
+<reg address="0x61" default_value="0xf8" />
+<reg address="0x70" default_value="0x3" />
+<reg address="0x71" default_value="0x3" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+<reg address="0xf0" default_value="0x2" />
+</ldn>
+<ldn number="0x3" name="COM1" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0xf8" />
+<reg address="0x70" default_value="0x4" />
+<reg address="0x71" default_value="0x3" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+<reg address="0xf0" default_value="0x2" />
+</ldn>
+<ldn number="0x4" name="System wake-up control (SWC)" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0x71" default_value="0x3" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+</ldn>
+<ldn number="0x5" name="Mouse" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x70" default_value="0xc" />
+<reg address="0x71" default_value="0x2" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+</ldn>
+<ldn number="0x6" name="Keyboard" description="">
+<reg address="0x30" default_value="0x1" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x60" />
+<reg address="0x62" default_value="0x0" />
+<reg address="0x63" default_value="0x64" />
+<reg address="0x70" default_value="0x1" />
+<reg address="0x71" default_value="0x2" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+<reg address="0xf0" default_value="0x40" />
+</ldn>
+<ldn number="0x7" name="GPIO" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0x71" default_value="0x3" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+<reg address="0xf0" default_value="0x0" />
+<reg address="0xf1" default_value="0x0" />
+<reg address="0xf2" default_value="0x0" />
+</ldn>
+<ldn number="0x8" name="ACCESS.bus (ACB)" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0x71" default_value="0x3" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+<reg address="0xf0" default_value="0x0" />
+</ldn>
+<ldn number="0x9" name="Fan speed control and monitor (FSCM)" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0x71" default_value="0x3" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+<reg address="0xf0" default_value="0x0" />
+<reg address="0xf1" default_value="0x0" />
+<reg address="0xf2" default_value="0x0" />
+</ldn>
+<ldn number="0xa" name="Watchdog timer (WDT)" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0x71" default_value="0x3" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+<reg address="0xf0" default_value="0x2" />
+</ldn>
+<ldn number="0xb" name="Game port" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x2" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0x71" default_value="0x3" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+<reg address="0xf0" default_value="0x0" />
+</ldn>
+<ldn number="0xc" name="MIDI port" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0x30" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0x71" default_value="0x3" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+<reg address="0xf0" default_value="0x0" />
+</ldn>
+<ldn number="0xd" name="Voltage level monitor (VLM)" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0x71" default_value="0x3" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+</ldn>
+<ldn number="0xe" name="Temperature sensor (TMS)" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0x71" default_value="0x3" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+</ldn>
+</sio>
+<sio model="PC8739x" id="0xea" >
+<noldn>
+<reg address="0x20" default_value="0xea" />
+<reg address="0x21" default_value="0x11" />
+<reg address="0x22" default_value="0xfffffffb" />
+<reg address="0x23" default_value="0xfffffffb" />
+<reg address="0x24" default_value="0xfffffffb" />
+<reg address="0x25" default_value="0x80" />
+<reg address="0x26" default_value="0x0" />
+<reg address="0x27" default_value="NANA" />
+<reg address="0x28" default_value="0x0" />
+<reg address="0x29" default_value="0xfffffffb" />
+<reg address="0x2a" default_value="0x37" />
+<reg address="0x2b" default_value="0xfffffffc" />
+<reg address="0x2c" default_value="0xfffffffc" />
+<reg address="0x2d" default_value="0xfffffffc" />
+<reg address="0x2e" default_value="0xfffffffc" />
+<reg address="0x2f" default_value="0xfffffffc" />
+</noldn>
+<ldn number="0x0" name="Floppy" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0xf2" />
+<reg address="0x70" default_value="0x6" />
+<reg address="0x71" default_value="0x3" />
+<reg address="0x74" default_value="0x2" />
+<reg address="0x75" default_value="0x4" />
+<reg address="0xf0" default_value="0x24" />
+<reg address="0xf1" default_value="0x0" />
+</ldn>
+<ldn number="0x1" name="Parallel port" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x2" />
+<reg address="0x61" default_value="0x78" />
+<reg address="0x70" default_value="0x7" />
+<reg address="0x71" default_value="0x2" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+<reg address="0xf0" default_value="0xf2" />
+</ldn>
+<ldn number="0x2" name="COM2 / FIR" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x2" />
+<reg address="0x61" default_value="0xf8" />
+<reg address="0x70" default_value="0x3" />
+<reg address="0x71" default_value="0x3" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+<reg address="0xf0" default_value="0x2" />
+</ldn>
+<ldn number="0x3" name="COM1" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0xf8" />
+<reg address="0x70" default_value="0x4" />
+<reg address="0x71" default_value="0x3" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+<reg address="0xf0" default_value="0x2" />
+</ldn>
+<ldn number="0x7" name="GPIO" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0x71" default_value="0x3" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+<reg address="0xf0" default_value="0x0" />
+<reg address="0xf1" default_value="0x44" />
+<reg address="0xf2" default_value="0x1" />
+</ldn>
+<ldn number="0xa" name="Watchdog timer (WDT)" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0x71" default_value="0x3" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+<reg address="0xf0" default_value="0x2" />
+</ldn>
+<ldn number="0xb" name="Game port" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x2" />
+<reg address="0x61" default_value="0x1" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0x71" default_value="0x3" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+<reg address="0xf0" default_value="0x0" />
+</ldn>
+<ldn number="0xc" name="MIDI port" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0x30" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0x71" default_value="0x3" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+<reg address="0xf0" default_value="0x0" />
+</ldn>
+<ldn number="0xf" name="X-Bus" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0x71" default_value="0x0" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+<reg address="0xf0" default_value="0x0" />
+<reg address="0xf1" default_value="0x0" />
+<reg address="0xf2" default_value="0x0" />
+<reg address="0xf3" default_value="0x0" />
+<reg address="0xf4" default_value="0x0" />
+<reg address="0xf5" default_value="0x0" />
+<reg address="0xf6" default_value="0x0" />
+<reg address="0xf7" default_value="0x0" />
+<reg address="0xf8" default_value="0x0" />
+<reg address="0xf9" default_value="0x0" />
+</ldn>
+</sio>
+<sio model="PC87591x" id="0xec" >
+</sio>
+<sio model="PC8741x" id="0xee" >
+<noldn>
+<reg address="0x20" default_value="0xee" />
+<reg address="0x21" default_value="0x11" />
+<reg address="0x22" default_value="0x20" />
+<reg address="0x23" default_value="0xfffffffb" />
+<reg address="0x24" default_value="0xfffffffb" />
+<reg address="0x25" default_value="0xfffffffb" />
+<reg address="0x26" default_value="0x0" />
+<reg address="0x27" default_value="NANA" />
+<reg address="0x28" default_value="0x0" />
+<reg address="0x29" default_value="0xfffffffb" />
+<reg address="0x2a" default_value="0x0" />
+<reg address="0x2b" default_value="0xfffffffc" />
+<reg address="0x2c" default_value="0xfffffffc" />
+<reg address="0x2d" default_value="0xfffffffc" />
+<reg address="0x2e" default_value="0xfffffffc" />
+<reg address="0x2f" default_value="0xfffffffc" />
+</noldn>
+<ldn number="0x0" name="Floppy" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0xf2" />
+<reg address="0x70" default_value="0x6" />
+<reg address="0x71" default_value="0x3" />
+<reg address="0x74" default_value="0x2" />
+<reg address="0x75" default_value="0x4" />
+<reg address="0xf0" default_value="0x24" />
+<reg address="0xf1" default_value="0x0" />
+</ldn>
+<ldn number="0x1" name="Parallel port" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x2" />
+<reg address="0x61" default_value="0x78" />
+<reg address="0x70" default_value="0x7" />
+<reg address="0x71" default_value="0x2" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+<reg address="0xf0" default_value="0xf2" />
+</ldn>
+<ldn number="0x2" name="COM2" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x2" />
+<reg address="0x61" default_value="0xf8" />
+<reg address="0x70" default_value="0x3" />
+<reg address="0x71" default_value="0x3" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+<reg address="0xf0" default_value="0x2" />
+</ldn>
+<ldn number="0x3" name="COM1" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0xf8" />
+<reg address="0x70" default_value="0x4" />
+<reg address="0x71" default_value="0x3" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+<reg address="0xf0" default_value="0x2" />
+</ldn>
+<ldn number="0x4" name="System wake-up control (SWC)" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x62" default_value="0x0" />
+<reg address="0x63" default_value="0x0" />
+<reg address="0x64" default_value="0x0" />
+<reg address="0x65" default_value="0x0" />
+<reg address="0x66" default_value="0x0" />
+<reg address="0x67" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0x71" default_value="0x3" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+</ldn>
+<ldn number="0x5" name="Mouse" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x70" default_value="0xc" />
+<reg address="0x71" default_value="0x2" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+</ldn>
+<ldn number="0x6" name="Keyboard" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x60" />
+<reg address="0x62" default_value="0x0" />
+<reg address="0x63" default_value="0x64" />
+<reg address="0x70" default_value="0x1" />
+<reg address="0x71" default_value="0x2" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+<reg address="0xf0" default_value="0x40" />
+</ldn>
+<ldn number="0x7" name="GPIO" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0x71" default_value="0x3" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+<reg address="0xf0" default_value="0x0" />
+<reg address="0xf1" default_value="0xfffffffb" />
+<reg address="0xf2" default_value="0x1" />
+<reg address="0xf3" default_value="0x0" />
+</ldn>
+<ldn number="0xf" name="X-Bus" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0x71" default_value="0x0" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+<reg address="0xf0" default_value="0x0" />
+<reg address="0xf1" default_value="0x0" />
+<reg address="0xf2" default_value="0x0" />
+<reg address="0xf3" default_value="0x0" />
+<reg address="0xf4" default_value="0x0" />
+<reg address="0xf5" default_value="0x0" />
+<reg address="0xf6" default_value="0x0" />
+<reg address="0xf7" default_value="0x0" />
+<reg address="0xf8" default_value="0x0" />
+<reg address="0xf9" default_value="0x0" />
+<reg address="0xfa" default_value="0x0" />
+<reg address="0xfb" default_value="0x0" />
+<reg address="0xfc" default_value="0x0" />
+</ldn>
+<ldn number="0x10" name="Real-time clock (RTC)" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x70" />
+<reg address="0x62" default_value="0x0" />
+<reg address="0x63" default_value="0x72" />
+<reg address="0x70" default_value="0x8" />
+<reg address="0x71" default_value="0x0" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+<reg address="0xf0" default_value="0x0" />
+<reg address="0xf1" default_value="0x0" />
+<reg address="0xf2" default_value="0x0" />
+<reg address="0xf3" default_value="0x0" />
+</ldn>
+</sio>
+<sio model="PC87372" id="0xf0" >
+</sio>
+<sio model="PC8374L" id="0xf1" >
+<noldn>
+<reg address="0x10" default_value="0x0" />
+<reg address="0x12" default_value="0x0" />
+<reg address="0x13" default_value="0x0" />
+<reg address="0x20" default_value="0xf1" />
+<reg address="0x21" default_value="0x11" />
+<reg address="0x22" default_value="0x0" />
+<reg address="0x23" default_value="0x0" />
+<reg address="0x24" default_value="0x0" />
+<reg address="0x25" default_value="0xfffffffc" />
+<reg address="0x26" default_value="0x0" />
+<reg address="0x27" default_value="0xfffffffb" />
+<reg address="0x28" default_value="0xfffffffc" />
+<reg address="0x29" default_value="0x1" />
+<reg address="0x2a" default_value="0x2e" />
+<reg address="0x2b" default_value="0xfffffffc" />
+<reg address="0x2c" default_value="0xfffffffc" />
+<reg address="0x2d" default_value="0xfffffffc" />
+<reg address="0x2e" default_value="0xfffffffc" />
+<reg address="0x2f" default_value="0xfffffffc" />
+</noldn>
+<ldn number="0x0" name="Floppy" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0xf2" />
+<reg address="0x70" default_value="0x6" />
+<reg address="0x71" default_value="0x3" />
+<reg address="0x74" default_value="0x2" />
+<reg address="0x75" default_value="0x4" />
+<reg address="0xf0" default_value="0x24" />
+<reg address="0xf1" default_value="0x0" />
+<reg address="0xf8" default_value="0x24" />
+</ldn>
+<ldn number="0x1" name="Parallel port" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x2" />
+<reg address="0x61" default_value="0x78" />
+<reg address="0x70" default_value="0x7" />
+<reg address="0x71" default_value="0x2" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+<reg address="0xf0" default_value="0xf2" />
+<reg address="0xf8" default_value="0x7" />
+</ldn>
+<ldn number="0x2" name="COM2 / IR" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x2" />
+<reg address="0x61" default_value="0xf8" />
+<reg address="0x70" default_value="0x3" />
+<reg address="0x71" default_value="0x3" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+<reg address="0xf0" default_value="0x2" />
+</ldn>
+<ldn number="0x3" name="COM1" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0xf8" />
+<reg address="0x70" default_value="0x4" />
+<reg address="0x71" default_value="0x3" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+<reg address="0xf0" default_value="0x2" />
+</ldn>
+<ldn number="0x4" name="System wake-up control (SWC)" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x50" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x62" default_value="0x0" />
+<reg address="0x63" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0x71" default_value="0x3" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+</ldn>
+<ldn number="0x5" name="Mouse" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x70" default_value="0xc" />
+<reg address="0x71" default_value="0x2" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+</ldn>
+<ldn number="0x6" name="Keyboard" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x60" />
+<reg address="0x62" default_value="0x0" />
+<reg address="0x63" default_value="0x64" />
+<reg address="0x70" default_value="0x1" />
+<reg address="0x71" default_value="0x2" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+<reg address="0xf0" default_value="0x40" />
+</ldn>
+<ldn number="0x7" name="GPIO" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x50" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0x71" default_value="0x3" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+<reg address="0xf0" default_value="0x0" />
+<reg address="0xf1" default_value="0xfffffffb" />
+<reg address="0xf2" default_value="0x0" />
+<reg address="0xf3" default_value="0xfffffffb" />
+<reg address="0xf8" default_value="0x1" />
+</ldn>
+<ldn number="0x8" name="Health management" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x50" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0x71" default_value="0x3" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+<reg address="0xf0" default_value="0x5" />
+</ldn>
+</sio>
+<sio model="WPCD376I" id="0x8f1" >
+<noldn>
+<reg address="0x10" default_value="0x0" />
+<reg address="0x12" default_value="0x0" />
+<reg address="0x13" default_value="0x0" />
+<reg address="0x20" default_value="0xf1" />
+<reg address="0x21" default_value="0x11" />
+<reg address="0x22" default_value="0x0" />
+<reg address="0x23" default_value="0x0" />
+<reg address="0x24" default_value="0x0" />
+<reg address="0x25" default_value="0xfffffffc" />
+<reg address="0x26" default_value="0x0" />
+<reg address="0x27" default_value="0xfffffffb" />
+<reg address="0x28" default_value="0xfffffffc" />
+<reg address="0x29" default_value="0x1" />
+<reg address="0x2a" default_value="0x2e" />
+<reg address="0x2b" default_value="0xfffffffc" />
+<reg address="0x2c" default_value="0xfffffffc" />
+<reg address="0x2d" default_value="0xfffffffc" />
+<reg address="0x2e" default_value="0xfffffffc" />
+<reg address="0x2f" default_value="0xfffffffc" />
+</noldn>
+<ldn number="0x0" name="Floppy" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0xf2" />
+<reg address="0x70" default_value="0x6" />
+<reg address="0x71" default_value="0x3" />
+<reg address="0x74" default_value="0x2" />
+<reg address="0x75" default_value="0x4" />
+<reg address="0xf0" default_value="0x24" />
+<reg address="0xf1" default_value="0x0" />
+<reg address="0xf8" default_value="0x24" />
+</ldn>
+<ldn number="0x1" name="Parallel port" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x2" />
+<reg address="0x61" default_value="0x78" />
+<reg address="0x70" default_value="0x7" />
+<reg address="0x71" default_value="0x2" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+<reg address="0xf0" default_value="0xf2" />
+<reg address="0xf8" default_value="0x7" />
+</ldn>
+<ldn number="0x2" name="IR" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x2" />
+<reg address="0x61" default_value="0xf8" />
+<reg address="0x70" default_value="0x3" />
+<reg address="0x71" default_value="0x3" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+<reg address="0xf0" default_value="0x2" />
+</ldn>
+<ldn number="0x3" name="COM1" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0xf8" />
+<reg address="0x70" default_value="0x4" />
+<reg address="0x71" default_value="0x3" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+<reg address="0xf0" default_value="0x2" />
+</ldn>
+<ldn number="0x4" name="System wake-up control (SWC)" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x50" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x62" default_value="0x0" />
+<reg address="0x63" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0x71" default_value="0x3" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+</ldn>
+<ldn number="0x5" name="Mouse" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x70" default_value="0xc" />
+<reg address="0x71" default_value="0x2" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+</ldn>
+<ldn number="0x6" name="Keyboard" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x60" />
+<reg address="0x62" default_value="0x0" />
+<reg address="0x63" default_value="0x64" />
+<reg address="0x70" default_value="0x1" />
+<reg address="0x71" default_value="0x2" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+<reg address="0xf0" default_value="0x40" />
+</ldn>
+<ldn number="0x7" name="GPIO" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x50" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0x71" default_value="0x3" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+<reg address="0xf0" default_value="0x0" />
+<reg address="0xf1" default_value="0xfffffffb" />
+<reg address="0xf2" default_value="0x0" />
+<reg address="0xf3" default_value="0xfffffffb" />
+<reg address="0xf8" default_value="0x1" />
+</ldn>
+</sio>
+<sio model="PC87427" id="0xf2" >
+<noldn>
+<reg address="0x10" default_value="0x0" />
+<reg address="0x12" default_value="0x0" />
+<reg address="0x13" default_value="0x0" />
+<reg address="0x1d" default_value="0x0" />
+<reg address="0x20" default_value="0xf2" />
+<reg address="0x21" default_value="0x11" />
+<reg address="0x22" default_value="0xa0" />
+<reg address="0x23" default_value="0xfffffffb" />
+<reg address="0x24" default_value="0xfffffffb" />
+<reg address="0x25" default_value="0xfffffffb" />
+<reg address="0x26" default_value="0x2" />
+<reg address="0x27" default_value="NANA" />
+<reg address="0x28" default_value="0x0" />
+<reg address="0x29" default_value="0xfffffffb" />
+<reg address="0x2a" default_value="0x0" />
+<reg address="0x2b" default_value="0x0" />
+<reg address="0x2c" default_value="0xfffffffb" />
+<reg address="0x2d" default_value="0xfffffffb" />
+<reg address="0x2e" default_value="0xfffffffc" />
+<reg address="0x2f" default_value="0xfffffffc" />
+</noldn>
+<ldn number="0x0" name="Floppy" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0xf2" />
+<reg address="0x70" default_value="0x6" />
+<reg address="0x71" default_value="0x3" />
+<reg address="0x74" default_value="0x2" />
+<reg address="0x75" default_value="0x4" />
+<reg address="0xf0" default_value="0x24" />
+<reg address="0xf1" default_value="0x0" />
+</ldn>
+<ldn number="0x2" name="COM2" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x2" />
+<reg address="0x61" default_value="0xf8" />
+<reg address="0x70" default_value="0x3" />
+<reg address="0x71" default_value="0x3" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+<reg address="0xf0" default_value="0x2" />
+</ldn>
+<ldn number="0x3" name="COM1" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0xf8" />
+<reg address="0x70" default_value="0x4" />
+<reg address="0x71" default_value="0x3" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+<reg address="0xf0" default_value="0x2" />
+</ldn>
+<ldn number="0x4" name="System wake-up control (SWC)" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x62" default_value="0x0" />
+<reg address="0x63" default_value="0x0" />
+<reg address="0x64" default_value="0x0" />
+<reg address="0x65" default_value="0x0" />
+<reg address="0x66" default_value="0x0" />
+<reg address="0x67" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0x71" default_value="0x3" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+</ldn>
+<ldn number="0x5" name="Mouse" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x70" default_value="0xc" />
+<reg address="0x71" default_value="0x2" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+</ldn>
+<ldn number="0x6" name="Keyboard" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x60" />
+<reg address="0x62" default_value="0x0" />
+<reg address="0x63" default_value="0x64" />
+<reg address="0x70" default_value="0x1" />
+<reg address="0x71" default_value="0x2" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+<reg address="0xf0" default_value="0x40" />
+</ldn>
+<ldn number="0x7" name="GPIO" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x50" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0x71" default_value="0x3" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+<reg address="0xf0" default_value="0x0" />
+<reg address="0xf1" default_value="0xfffffffb" />
+<reg address="0xf2" default_value="0x1" />
+<reg address="0xf3" default_value="0x0" />
+<reg address="0xf4" default_value="0x0" />
+<reg address="0xf5" default_value="0x0" />
+<reg address="0xf6" default_value="0x0" />
+<reg address="0xf7" default_value="0x0" />
+<reg address="0xf8" default_value="0x0" />
+</ldn>
+<ldn number="0x9" name="Fan Monitor and Control (FMC)" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x50" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0x71" default_value="0x3" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+<reg address="0xf0" default_value="0x19" />
+<reg address="0xf1" default_value="0x6" />
+</ldn>
+<ldn number="0xa" name="Watchdog timer (WDT)" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x50" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0x71" default_value="0x3" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+<reg address="0xf0" default_value="0x0" />
+</ldn>
+<ldn number="0xf" name="X-Bus" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0x71" default_value="0x0" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+<reg address="0xf0" default_value="0x0" />
+<reg address="0xf1" default_value="0x0" />
+<reg address="0xf2" default_value="0x0" />
+<reg address="0xf3" default_value="0x0" />
+<reg address="0xf4" default_value="0x0" />
+<reg address="0xf5" default_value="0x0" />
+<reg address="0xf6" default_value="0x0" />
+<reg address="0xf7" default_value="0x0" />
+<reg address="0xf8" default_value="0x0" />
+<reg address="0xf9" default_value="0x0" />
+<reg address="0xfa" default_value="0x0" />
+<reg address="0xfb" default_value="0x0" />
+<reg address="0xfc" default_value="0x0" />
+<reg address="0xfd" default_value="0x0" />
+<reg address="0xfe" default_value="0x80" />
+<reg address="0xff" default_value="0x10" />
+</ldn>
+<ldn number="0x10" name="Real-time clock (RTC)" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x70" />
+<reg address="0x62" default_value="0x0" />
+<reg address="0x63" default_value="0x72" />
+<reg address="0x70" default_value="0x8" />
+<reg address="0x71" default_value="0x0" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+<reg address="0xf0" default_value="0x0" />
+<reg address="0xf1" default_value="0x0" />
+<reg address="0xf2" default_value="0x0" />
+<reg address="0xf3" default_value="0x0" />
+<reg address="0xf6" default_value="0xfffffffb" />
+<reg address="0xf7" default_value="0x0" />
+</ldn>
+<ldn number="0x14" name="Health monitoring and control (HMC)" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x50" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x62" default_value="0x0" />
+<reg address="0x63" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0x71" default_value="0x3" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0x75" default_value="0x4" />
+<reg address="0xf0" default_value="0x5" />
+</ldn>
+</sio>
+<sio model="PC87373" id="0xf3" >
+</sio>
+</sioarray>
Index: util/pygen/data/sio/ali.sio.xml
===================================================================
--- util/pygen/data/sio/ali.sio.xml	(revision 0)
+++ util/pygen/data/sio/ali.sio.xml	(revision 0)
@@ -0,0 +1,80 @@ 
+<?xml version="1.0" encoding="UTF-8"?>
+<sioarray name="ali" description="ali superios">
+<sio model="M1535/M1535D/M1535+/M1535D+" id="0x5315" >
+<noldn>
+<reg address="0x1f" default_value="NANA" />
+<reg address="0x20" default_value="0x53" />
+<reg address="0x21" default_value="0x15" />
+<reg address="0x22" default_value="0x0" />
+<reg address="0x23" default_value="0x0" />
+<reg address="0x2c" default_value="0xfffffffc" />
+<reg address="0x2d" default_value="0xfffffffc" />
+<reg address="0x2e" default_value="0xfffffffc" />
+</noldn>
+<ldn number="0x0" name="Floppy" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0xf0" />
+<reg address="0x70" default_value="0x6" />
+<reg address="0x74" default_value="0x2" />
+<reg address="0xf0" default_value="0x8" />
+<reg address="0xf1" default_value="0x0" />
+<reg address="0xf2" default_value="0xff" />
+<reg address="0xf4" default_value="0x0" />
+</ldn>
+<ldn number="0x3" name="Parallel port" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0x78" />
+<reg address="0x70" default_value="0x5" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0xf0" default_value="0x8c" />
+<reg address="0xf1" default_value="0xc5" />
+</ldn>
+<ldn number="0x4" name="COM1" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0xf8" />
+<reg address="0x70" default_value="0x4" />
+<reg address="0xf0" default_value="0x0" />
+<reg address="0xf1" default_value="0x0" />
+<reg address="0xf2" default_value="0xc" />
+</ldn>
+<ldn number="0x5" name="COM2" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0xe8" />
+<reg address="0x70" default_value="0x9" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0xf0" default_value="0x80" />
+<reg address="0xf1" default_value="0x0" />
+<reg address="0xf2" default_value="0xc" />
+</ldn>
+<ldn number="0x7" name="Keyboard" description="">
+<reg address="0x0" default_value="NANA" />
+<reg address="0x70" default_value="0x1" />
+<reg address="0x72" default_value="0x0" />
+<reg address="0xf0" default_value="0x0" />
+</ldn>
+<ldn number="0x8" name="COM3" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x2" />
+<reg address="0x61" default_value="0xf8" />
+<reg address="0x70" default_value="0x3" />
+<reg address="0xf0" default_value="0x0" />
+<reg address="0xf1" default_value="0x0" />
+<reg address="0xf2" default_value="0xc" />
+</ldn>
+<ldn number="0xc" name="Hotkey" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0xf0" default_value="0x35" />
+<reg address="0xf1" default_value="0x14" />
+<reg address="0xf2" default_value="0x11" />
+<reg address="0xf3" default_value="0x71" />
+<reg address="0xf4" default_value="0xfffffffc" />
+<reg address="0xf5" default_value="0x5" />
+</ldn>
+</sio>
+<sio model="M512x" id="0x2351" >
+</sio>
+</sioarray>
Index: util/pygen/data/sio/smsc.sio.xml
===================================================================
--- util/pygen/data/sio/smsc.sio.xml	(revision 0)
+++ util/pygen/data/sio/smsc.sio.xml	(revision 0)
@@ -0,0 +1,1766 @@ 
+<?xml version="1.0" encoding="UTF-8"?>
+<sioarray name="smsc" description="nuovoton superios">
+<sio model="FDC37C932" id="0x2" >
+<noldn>
+<reg address="0x2" default_value="0x0" />
+<reg address="0x3" default_value="0x3" />
+<reg address="0x20" default_value="0x2" />
+<reg address="0x21" default_value="0x1" />
+<reg address="0x22" default_value="0x0" />
+<reg address="0x23" default_value="0x0" />
+<reg address="0x24" default_value="0x4" />
+<reg address="0x2d" default_value="NANA" />
+<reg address="0x2e" default_value="NANA" />
+<reg address="0x2f" default_value="0x0" />
+</noldn>
+<ldn number="0x0" name="Floppy" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0xf0" />
+<reg address="0x70" default_value="0x6" />
+<reg address="0x74" default_value="0x2" />
+<reg address="0xf0" default_value="0xe" />
+<reg address="0xf1" default_value="0x0" />
+<reg address="0xf2" default_value="0xff" />
+<reg address="0xf4" default_value="0x0" />
+<reg address="0xf5" default_value="0x0" />
+</ldn>
+<ldn number="0x1" name="IDE 1" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x1" />
+<reg address="0x61" default_value="0xf0" />
+<reg address="0x62" default_value="0x3" />
+<reg address="0x63" default_value="0xf6" />
+<reg address="0x70" default_value="0xe" />
+</ldn>
+<ldn number="0x2" name="IDE 2" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x62" default_value="0x0" />
+<reg address="0x63" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0xf0" default_value="0x0" />
+</ldn>
+<ldn number="0x3" name="Parallel port" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0xf0" default_value="0x3c" />
+</ldn>
+<ldn number="0x4" name="COM1" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0xf0" default_value="0x0" />
+</ldn>
+<ldn number="0x5" name="COM2" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0xf0" default_value="0x0" />
+<reg address="0xf1" default_value="0x0" />
+</ldn>
+<ldn number="0x6" name="Real-time clock (RTC)" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0xf0" default_value="0x0" />
+<reg address="0xf1" default_value="0x0" />
+<reg address="0xf2" default_value="0x0" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0xf4" default_value="0xfffffffb" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0x0" default_value="NANA" />
+</ldn>
+<ldn number="0x7" name="Keyboard" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0x72" default_value="0x0" />
+</ldn>
+<ldn number="0x8" name="Aux I/O" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x62" default_value="0x0" />
+<reg address="0x63" default_value="0x0" />
+<reg address="0xe0" default_value="0x1" />
+<reg address="0xe1" default_value="0x1" />
+<reg address="0xe2" default_value="0x1" />
+<reg address="0xe3" default_value="0x1" />
+<reg address="0xe4" default_value="0x1" />
+<reg address="0xe5" default_value="0x1" />
+<reg address="0xe6" default_value="0x1" />
+<reg address="0xe7" default_value="0x1" />
+<reg address="0xe8" default_value="0x1" />
+<reg address="0xe9" default_value="0x1" />
+<reg address="0xea" default_value="0x1" />
+<reg address="0xeb" default_value="0x1" />
+<reg address="0xec" default_value="0x1" />
+<reg address="0xed" default_value="0x1" />
+<reg address="0xf0" default_value="0x0" />
+<reg address="0xf1" default_value="0x0" />
+<reg address="0xf2" default_value="0x0" />
+<reg address="0xf3" default_value="0x0" />
+<reg address="0xf4" default_value="0xfffffffb" />
+</ldn>
+</sio>
+<sio model="FDC37C93xFR" id="0x3" >
+</sio>
+<sio model="FDC37N971" id="0xa" >
+<noldn>
+<reg address="0x2" default_value="0x0" />
+<reg address="0x20" default_value="0xa" />
+<reg address="0x21" default_value="0x0" />
+<reg address="0x22" default_value="0x0" />
+<reg address="0x23" default_value="0x0" />
+<reg address="0x24" default_value="0x4" />
+<reg address="0x25" default_value="0x4" />
+<reg address="0x26" default_value="NANA" />
+<reg address="0x27" default_value="NANA" />
+<reg address="0x28" default_value="0x0" />
+<reg address="0x29" default_value="0x0" />
+<reg address="0x2a" default_value="0x0" />
+<reg address="0x2b" default_value="0x0" />
+<reg address="0x2c" default_value="0x0" />
+<reg address="0x2d" default_value="0x0" />
+<reg address="0x2e" default_value="0x0" />
+<reg address="0x2f" default_value="0x0" />
+</noldn>
+<ldn number="0x0" name="Floppy" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0xf0" />
+<reg address="0x70" default_value="0x6" />
+<reg address="0x74" default_value="0x2" />
+<reg address="0xf0" default_value="0xe" />
+<reg address="0xf1" default_value="0x0" />
+<reg address="0xf2" default_value="0xff" />
+<reg address="0xf3" default_value="0xfffffffc" />
+<reg address="0xf4" default_value="0x0" />
+<reg address="0xf5" default_value="0x0" />
+</ldn>
+<ldn number="0x1" name="Power management (PM1)" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+</ldn>
+<ldn number="0x3" name="Parallel port" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0xf0" default_value="0x3c" />
+<reg address="0xf1" default_value="0x0" />
+</ldn>
+<ldn number="0x4" name="COM1" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0xf0" default_value="0x0" />
+</ldn>
+<ldn number="0x5" name="COM2" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x62" default_value="0x0" />
+<reg address="0x63" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0xf0" default_value="0x0" />
+<reg address="0xf1" default_value="0x2" />
+<reg address="0xf2" default_value="0x3" />
+<reg address="0xf7" default_value="0x0" />
+<reg address="0xf8" default_value="0x0" />
+</ldn>
+<ldn number="0x6" name="Real-time clock (RTC)" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x70" />
+<reg address="0x62" default_value="0x0" />
+<reg address="0x63" default_value="0x74" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0xf0" default_value="0x0" />
+<reg address="0x0" default_value="NANA" />
+</ldn>
+<ldn number="0x7" name="Keyboard" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0x72" default_value="0x0" />
+<reg address="0xf0" default_value="0x0" />
+</ldn>
+<ldn number="0x8" name="Embedded controller (EC)" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x62" />
+</ldn>
+<ldn number="0x9" name="Mailbox" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+</ldn>
+</sio>
+<sio model="FDC37N972" id="0xb" >
+<noldn>
+<reg address="0x2" default_value="0x0" />
+<reg address="0x20" default_value="0xb" />
+<reg address="0x21" default_value="0x0" />
+<reg address="0x22" default_value="0x0" />
+<reg address="0x23" default_value="0x0" />
+<reg address="0x24" default_value="0x4" />
+<reg address="0x25" default_value="0x4" />
+<reg address="0x26" default_value="NANA" />
+<reg address="0x27" default_value="NANA" />
+<reg address="0x28" default_value="0x0" />
+<reg address="0x29" default_value="0x0" />
+<reg address="0x2a" default_value="0x0" />
+<reg address="0x2b" default_value="0x0" />
+<reg address="0x2c" default_value="0x0" />
+<reg address="0x2d" default_value="0x0" />
+<reg address="0x2e" default_value="0x0" />
+<reg address="0x2f" default_value="0x0" />
+</noldn>
+<ldn number="0x0" name="Floppy" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0xf0" />
+<reg address="0x70" default_value="0x6" />
+<reg address="0x74" default_value="0x2" />
+<reg address="0xf0" default_value="0xe" />
+<reg address="0xf1" default_value="0x0" />
+<reg address="0xf2" default_value="0xff" />
+<reg address="0xf3" default_value="0xfffffffc" />
+<reg address="0xf4" default_value="0x0" />
+<reg address="0xf5" default_value="0x0" />
+</ldn>
+<ldn number="0x1" name="Power management (PM1)" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+</ldn>
+<ldn number="0x3" name="Parallel port" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0xf0" default_value="0x3c" />
+<reg address="0xf1" default_value="0x0" />
+</ldn>
+<ldn number="0x4" name="COM1" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0xf0" default_value="0x0" />
+</ldn>
+<ldn number="0x5" name="COM2" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x62" default_value="0x0" />
+<reg address="0x63" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0xf0" default_value="0x0" />
+<reg address="0xf1" default_value="0x2" />
+<reg address="0xf2" default_value="0x3" />
+<reg address="0xf7" default_value="0x0" />
+<reg address="0xf8" default_value="0x0" />
+</ldn>
+<ldn number="0x6" name="Real-time clock (RTC)" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x70" />
+<reg address="0x62" default_value="0x0" />
+<reg address="0x63" default_value="0x74" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0xf0" default_value="0x0" />
+<reg address="0x0" default_value="NANA" />
+</ldn>
+<ldn number="0x7" name="Keyboard" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0x72" default_value="0x0" />
+<reg address="0xf0" default_value="0x0" />
+</ldn>
+<ldn number="0x8" name="Embedded controller (EC)" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x62" />
+</ldn>
+<ldn number="0x9" name="Mailbox" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+</ldn>
+</sio>
+<sio model="LPC47N252" id="0xe" >
+<noldn>
+<reg address="0x20" default_value="0xe" />
+<reg address="0x21" default_value="NANA" />
+<reg address="0x22" default_value="0x0" />
+<reg address="0x23" default_value="0x0" />
+<reg address="0x24" default_value="0x4" />
+<reg address="0x25" default_value="0x4" />
+<reg address="0x26" default_value="NANA" />
+<reg address="0x27" default_value="NANA" />
+<reg address="0x28" default_value="0x0" />
+<reg address="0x29" default_value="0x0" />
+<reg address="0x2a" default_value="0x0" />
+<reg address="0x2b" default_value="0x0" />
+<reg address="0x2c" default_value="0x0" />
+<reg address="0x2d" default_value="0x0" />
+<reg address="0x2e" default_value="0x0" />
+<reg address="0x2f" default_value="0x0" />
+</noldn>
+<ldn number="0x0" name="Floppy" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0xf0" />
+<reg address="0x70" default_value="0x6" />
+<reg address="0x74" default_value="0x2" />
+<reg address="0xf0" default_value="0xe" />
+<reg address="0xf1" default_value="0x0" />
+<reg address="0xf2" default_value="0xff" />
+<reg address="0xf3" default_value="0xfffffffc" />
+<reg address="0xf4" default_value="0x0" />
+<reg address="0xf5" default_value="0x0" />
+</ldn>
+<ldn number="0x1" name="Power management (PM1)" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+</ldn>
+<ldn number="0x3" name="Parallel port" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0xf0" default_value="0x3c" />
+<reg address="0xf1" default_value="0x0" />
+</ldn>
+<ldn number="0x4" name="COM1" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0xf0" default_value="0x0" />
+</ldn>
+<ldn number="0x5" name="COM2 / IRCC" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x62" default_value="0x0" />
+<reg address="0x63" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0xf0" default_value="0x0" />
+<reg address="0xf1" default_value="0x2" />
+<reg address="0xf2" default_value="0x3" />
+<reg address="0xf7" default_value="0x0" />
+<reg address="0xf8" default_value="0x0" />
+</ldn>
+<ldn number="0x6" name="Real-time clock (RTC)" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x70" />
+<reg address="0x62" default_value="0x0" />
+<reg address="0x63" default_value="0x74" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0xf0" default_value="0x0" />
+<reg address="0x0" default_value="NANA" />
+</ldn>
+<ldn number="0x7" name="Keyboard" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0x72" default_value="0x0" />
+<reg address="0xf0" default_value="0x0" />
+</ldn>
+<ldn number="0x8" name="Embedded controller (EC)" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x62" />
+</ldn>
+<ldn number="0x9" name="Mailbox Interface" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+</ldn>
+<ldn number="0xa" name="LPC/8051 addressable GPIO (LGPIO)" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+</ldn>
+</sio>
+<sio model="LPC47M172" id="0x14" >
+</sio>
+<sio model="FDC37C93xAPM" id="0x30" >
+</sio>
+<sio model="FDC37C67x" id="0x40" >
+<noldn>
+<reg address="0x3" default_value="0x3" />
+<reg address="0x20" default_value="0x40" />
+<reg address="0x21" default_value="NANA" />
+<reg address="0x22" default_value="0x0" />
+<reg address="0x23" default_value="0x0" />
+<reg address="0x24" default_value="0x4" />
+<reg address="0x26" default_value="0xfffffffb" />
+<reg address="0x27" default_value="0xfffffffb" />
+<reg address="0x2b" default_value="NANA" />
+<reg address="0x2c" default_value="NANA" />
+<reg address="0x2d" default_value="NANA" />
+<reg address="0x2e" default_value="NANA" />
+<reg address="0x2f" default_value="NANA" />
+</noldn>
+<ldn number="0x0" name="Floppy" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0xf0" />
+<reg address="0x70" default_value="0x6" />
+<reg address="0x74" default_value="0x2" />
+<reg address="0xf0" default_value="0xe" />
+<reg address="0xf1" default_value="0x0" />
+<reg address="0xf2" default_value="0xff" />
+<reg address="0xf4" default_value="0x0" />
+<reg address="0xf5" default_value="0x0" />
+</ldn>
+<ldn number="0x3" name="Parallel port" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0xf0" default_value="0x3c" />
+<reg address="0xf1" default_value="0x0" />
+</ldn>
+<ldn number="0x4" name="COM1" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0xf0" default_value="0x0" />
+</ldn>
+<ldn number="0x5" name="COM2" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x62" default_value="0x0" />
+<reg address="0x63" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0xf0" default_value="0x0" />
+<reg address="0xf1" default_value="0x2" />
+<reg address="0xf2" default_value="0x3" />
+</ldn>
+<ldn number="0x7" name="Keyboard" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0x72" default_value="0x0" />
+<reg address="0xf0" default_value="0x0" />
+</ldn>
+<ldn number="0x8" name="Aux I/O" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0xc0" default_value="0x6" />
+<reg address="0xc1" default_value="0x3" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0xf1" default_value="0x0" />
+<reg address="0xf2" default_value="0x0" />
+<reg address="0xf3" default_value="0x0" />
+<reg address="0xf4" default_value="0xfffffffb" />
+<reg address="0xf6" default_value="0xfffffffc" />
+<reg address="0xf7" default_value="0xfffffffc" />
+<reg address="0xf8" default_value="0xfffffffc" />
+<reg address="0xf9" default_value="0xfffffffc" />
+<reg address="0xfa" default_value="0xfffffffc" />
+<reg address="0xfb" default_value="0xfffffffc" />
+</ldn>
+</sio>
+<sio model="FDC37B80x/FDC37M707" id="0x42" >
+</sio>
+<sio model="FDC37N958FR" id="0x9" >
+<noldn>
+<reg address="0x3" default_value="0x3" />
+<reg address="0x20" default_value="0x44" />
+<reg address="0x21" default_value="0x0" />
+<reg address="0x22" default_value="0x0" />
+<reg address="0x23" default_value="0x0" />
+<reg address="0x24" default_value="0x4" />
+<reg address="0x26" default_value="0xfffffffb" />
+<reg address="0x27" default_value="0xfffffffb" />
+<reg address="0x28" default_value="0x0" />
+<reg address="0x2b" default_value="NANA" />
+<reg address="0x2c" default_value="NANA" />
+<reg address="0x2d" default_value="NANA" />
+<reg address="0x2e" default_value="NANA" />
+<reg address="0x2f" default_value="NANA" />
+</noldn>
+<ldn number="0x0" name="Floppy" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0xf0" />
+<reg address="0x70" default_value="0x6" />
+<reg address="0x74" default_value="0x2" />
+<reg address="0xf0" default_value="0xe" />
+<reg address="0xf1" default_value="0x0" />
+<reg address="0xf2" default_value="0xff" />
+<reg address="0xf4" default_value="0x0" />
+<reg address="0xf5" default_value="0x0" />
+</ldn>
+<ldn number="0x3" name="Parallel port" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0xf0" default_value="0x3c" />
+<reg address="0xf1" default_value="0x0" />
+</ldn>
+<ldn number="0x4" name="COM1" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0xf0" default_value="0x0" />
+</ldn>
+<ldn number="0x5" name="COM2" description="">
+<reg address="0x30" default_value="NANA" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x62" default_value="0x0" />
+<reg address="0x63" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0xf0" default_value="0x0" />
+<reg address="0xf1" default_value="0x2" />
+<reg address="0xf2" default_value="0x3" />
+</ldn>
+<ldn number="0x6" name="Real-time clock (RTC)" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x62" default_value="0x0" />
+<reg address="0x63" default_value="0x70" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0xf0" default_value="0x0" />
+</ldn>
+<ldn number="0x7" name="Keyboard" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0x72" default_value="0x0" />
+<reg address="0xf0" default_value="0x0" />
+</ldn>
+<ldn number="0x8" name="Aux I/O" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0xc1" default_value="0x1" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0xc5" default_value="0x0" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0xf1" default_value="0x0" />
+<reg address="0xf2" default_value="0x0" />
+<reg address="0xf3" default_value="0x0" />
+<reg address="0xf4" default_value="0x0" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0x0" default_value="NANA" />
+</ldn>
+<ldn number="0xa" name="ACPI" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0x0" default_value="NANA" />
+</ldn>
+</sio>
+<sio model="FDC37B77x" id="0x43" >
+</sio>
+<sio model="FDC37B78x" id="0x44" >
+<noldn>
+<reg address="0x3" default_value="0x3" />
+<reg address="0x20" default_value="0x44" />
+<reg address="0x21" default_value="0x0" />
+<reg address="0x22" default_value="0x0" />
+<reg address="0x23" default_value="0x0" />
+<reg address="0x24" default_value="0x4" />
+<reg address="0x26" default_value="0xfffffffb" />
+<reg address="0x27" default_value="0xfffffffb" />
+<reg address="0x28" default_value="0x0" />
+<reg address="0x2b" default_value="NANA" />
+<reg address="0x2c" default_value="NANA" />
+<reg address="0x2d" default_value="NANA" />
+<reg address="0x2e" default_value="NANA" />
+<reg address="0x2f" default_value="NANA" />
+</noldn>
+<ldn number="0x0" name="Floppy" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0xf0" />
+<reg address="0x70" default_value="0x6" />
+<reg address="0x74" default_value="0x2" />
+<reg address="0xf0" default_value="0xe" />
+<reg address="0xf1" default_value="0x0" />
+<reg address="0xf2" default_value="0xff" />
+<reg address="0xf4" default_value="0x0" />
+<reg address="0xf5" default_value="0x0" />
+</ldn>
+<ldn number="0x3" name="Parallel port" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0xf0" default_value="0x3c" />
+<reg address="0xf1" default_value="0x0" />
+</ldn>
+<ldn number="0x4" name="COM1" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0xf0" default_value="0x0" />
+</ldn>
+<ldn number="0x5" name="COM2" description="">
+<reg address="0x30" default_value="NANA" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x62" default_value="0x0" />
+<reg address="0x63" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0xf0" default_value="0x0" />
+<reg address="0xf1" default_value="0x2" />
+<reg address="0xf2" default_value="0x3" />
+</ldn>
+<ldn number="0x6" name="Real-time clock (RTC)" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x62" default_value="0x0" />
+<reg address="0x63" default_value="0x70" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0xf0" default_value="0x0" />
+</ldn>
+<ldn number="0x7" name="Keyboard" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0x72" default_value="0x0" />
+<reg address="0xf0" default_value="0x0" />
+</ldn>
+<ldn number="0x8" name="Aux I/O" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0xc1" default_value="0x1" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0xc5" default_value="0x0" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0xf1" default_value="0x0" />
+<reg address="0xf2" default_value="0x0" />
+<reg address="0xf3" default_value="0x0" />
+<reg address="0xf4" default_value="0x0" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0x0" default_value="NANA" />
+</ldn>
+<ldn number="0xa" name="ACPI" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0x0" default_value="NANA" />
+</ldn>
+</sio>
+<sio model="FDC37M602" id="0x46" >
+</sio>
+<sio model="FDC37M60x" id="0x47" >
+</sio>
+<sio model="FDC37B72x" id="0x4c" >
+<noldn>
+<reg address="0x3" default_value="0x3" />
+<reg address="0x20" default_value="0x4c" />
+<reg address="0x21" default_value="0x0" />
+<reg address="0x22" default_value="0x0" />
+<reg address="0x23" default_value="0x0" />
+<reg address="0x24" default_value="0x4" />
+<reg address="0x26" default_value="0xfffffffb" />
+<reg address="0x27" default_value="0xfffffffb" />
+<reg address="0x28" default_value="0x0" />
+<reg address="0x2b" default_value="NANA" />
+<reg address="0x2c" default_value="NANA" />
+<reg address="0x2d" default_value="NANA" />
+<reg address="0x2e" default_value="NANA" />
+<reg address="0x2f" default_value="NANA" />
+</noldn>
+<ldn number="0x0" name="Floppy" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x3" />
+<reg address="0x61" default_value="0xf0" />
+<reg address="0x70" default_value="0x6" />
+<reg address="0x74" default_value="0x2" />
+<reg address="0xf0" default_value="0xe" />
+<reg address="0xf1" default_value="0x0" />
+<reg address="0xf2" default_value="0xff" />
+<reg address="0xf4" default_value="0x0" />
+<reg address="0xf5" default_value="0x0" />
+</ldn>
+<ldn number="0x3" name="Parallel port" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0x74" default_value="0x4" />
+<reg address="0xf0" default_value="0x3c" />
+<reg address="0xf1" default_value="0x0" />
+</ldn>
+<ldn number="0x4" name="COM1" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0xf0" default_value="0x0" />
+</ldn>
+<ldn number="0x5" name="COM2" description="">
+<reg address="0x30" default_value="NANA" />
+<reg address="0x60" default_value="0x0" />
+<reg address="0x61" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0xf0" default_value="0x0" />
+<reg address="0xf1" default_value="0x2" />
+<reg address="0xf2" default_value="0x3" />
+</ldn>
+<ldn number="0x7" name="Keyboard" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x70" default_value="0x0" />
+<reg address="0x72" default_value="0x0" />
+<reg address="0xf0" default_value="0x0" />
+</ldn>
+<ldn number="0x8" name="Aux I/O" description="">
+<reg address="0x30" default_value="0x0" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0xc0" default_value="0x0" />
+<reg address="0xc1" default_value="0x1" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0x0" default_value="NANA" />
+<reg address="0xc5" default_value="0x0" />
+<reg address="0x0&q