From patchwork Thu Feb 17 06:37:08 2011
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Subject: Fam10 FIDVID in SVI 03/25
Date: Thu, 17 Feb 2011 06:37:08 -0000
From: xdrudis <xdrudis@tinet.cat>
X-Patchwork-Id: 2650
Message-Id: <20110217063708.GG8966@ideafix.casa.ct>
To: coreboot@coreboot.org

see patch
Acked-by: Marc Jones <marcj303@gmail.com>


Prepare for next patches (Improving BKDG implementation of P-states,
CPU and northbridge frequency and voltage
handling for Fam 10 in SVI mode). 

No change of behaviour intended.

Refactor FAM10 fidvid . prep_fid_change was already long and it'd 
get longer with forthcoming patches. We now take apart F3xA0, 
Power Control Misc Register to its own function. 

Signed-off-by: Xavi Drudis Ferran <xdrudis@tinet.cat>

--- src/cpu/amd/model_10xxx/fidvid.c	2011-02-16 20:51:55.000000000 +0100
+++ src/cpu/amd/model_10xxx/fidvid.c	2011-02-16 20:51:55.000000000 +0100
@@ -231,9 +231,36 @@ static void config_clk_power_ctrl_reg0(i
 	}
 }
 
+static void config_power_ctrl_misc_reg(device_t dev) {
+	/* check PVI/SVI */
+	u32 dword = pci_read_config32(dev, 0xA0);
+	if (dword & PVI_MODE) {	/* PVI */
+		/* set slamVidMode to 0 for PVI */
+		dword &= VID_SLAM_OFF | PLLLOCK_OFF;
+		dword |= PLLLOCK_DFT_L;
+		pci_write_config32(dev, 0xA0, dword);
+	} else {	/* SVI */
+		/* set slamVidMode to 1 for SVI */
+		dword &= PLLLOCK_OFF;
+		dword |= PLLLOCK_DFT_L | VID_SLAM_ON;
+		pci_write_config32(dev, 0xA0, dword);
+
+		u32 dtemp = dword;
+
+		/* Program F3xD8[PwrPlanes] according F3xA0[DulaVdd]  */
+		dword = pci_read_config32(dev, 0xD8);
+
+		if (dtemp & DUAL_VDD_BIT)
+			dword |= PWR_PLN_ON;
+		else
+			dword &= PWR_PLN_OFF;
+		pci_write_config32(dev, 0xD8, dword);
+	}
+}
+
 static void prep_fid_change(void)
 {
-	u32 dword, dtemp;
+        u32 dword;
 	u32 nodes;
 	device_t dev;
 	int i;
@@ -253,31 +280,8 @@ static void prep_fid_change(void)
 
 		config_clk_power_ctrl_reg0(i);
 
-		/* check PVI/SVI */
-		dword = pci_read_config32(dev, 0xA0);
-		if (dword & PVI_MODE) {	/* PVI */
-			/* set slamVidMode to 0 for PVI */
-			dword &= VID_SLAM_OFF | PLLLOCK_OFF;
-			dword |= PLLLOCK_DFT_L;
-			pci_write_config32(dev, 0xA0, dword);
-		} else {	/* SVI */
-			/* set slamVidMode to 1 for SVI */
-			dword &= PLLLOCK_OFF;
-			dword |= PLLLOCK_DFT_L | VID_SLAM_ON;
-			pci_write_config32(dev, 0xA0, dword);
-
-			dtemp = dword;
-
-			/* Program F3xD8[PwrPlanes] according F3xA0[DulaVdd]  */
-			dword = pci_read_config32(dev, 0xD8);
-
-			if (dtemp & DUAL_VDD_BIT)
-				dword |= PWR_PLN_ON;
-			else
-				dword &= PWR_PLN_OFF;
-			pci_write_config32(dev, 0xD8, dword);
-		}
-
+                config_power_ctrl_misc_reg(dev);
+             
 		/* Note the following settings are additional from the ported
 		 * function setFidVidRegs()
 		 */