From patchwork Thu Feb 17 06:45:35 2011
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Subject: Fam10 FIDVID in SVI 22/25
Date: Thu, 17 Feb 2011 06:45:35 -0000
From: xdrudis <xdrudis@tinet.cat>
X-Patchwork-Id: 2669
Message-Id: <20110217064535.GZ8966@ideafix.casa.ct>
To: coreboot@coreboot.org

see patch
Acked-by: Marc Jones <marcj303@gmail.com>


Improving BKDG implementation of P-states,
CPU and northbridge frequency and voltage
handling for Fam 10 in SVI mode. 

I don't understand what this was doing nor find docs for these regs
Maybe it was left over from some copy & paste ? 

Signed-off-by: Xavi Drudis Ferran <xdrudis@tinet.cat>

--- src/cpu/amd/model_10xxx/fidvid.c	2011-02-16 00:51:36.000000000 +0100
+++ src/cpu/amd/model_10xxx/fidvid.c	2011-02-16 01:08:16.000000000 +0100
@@ -394,19 +394,6 @@
 	} else {	/* SVI */
 		/* set slamVidMode to 1 for SVI */
 		dword |= VID_SLAM_ON;
-
-		u32 dtemp = dword;
-
-		/* Program F3xD8[PwrPlanes] according F3xA0[DulaVdd]  */
-		dword = pci_read_config32(dev, 0xD8);
-
-		if (dtemp & DUAL_VDD_BIT)
-			dword |= PWR_PLN_ON;
-		else
-			dword &= PWR_PLN_OFF;
-		pci_write_config32(dev, 0xD8, dword);
-
-                dword = dtemp;
         }
         /* set the rest of A0 since we're at it... */