Patchwork [4/7] SuperMicro H8SCM support (AMD SP5100 remove legacy)

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Submitter Bao, Zheng
Date 2011-03-23 07:04:22
Message ID <DD1CC71B621B004FA76856E5129D6B1704BA2951@sbjgexmb1.amd.com>
Download mbox | patch
Permalink /patch/2809/
State Accepted
Headers show

Comments

Bao, Zheng - 2011-03-23 07:04:22
Since the SB700 has changed to sb7xx_51xx, change legacy name in
other mainboard.

Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Since the SB700 has changed to sb7xx_51xx, change legacy name in
other mainboard.

Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Paul Menzel - 2011-03-23 10:12:25
Am Mittwoch, den 23.03.2011, 15:04 +0800 schrieb Bao, Zheng:
> Since the SB700 has changed to sb7xx_51xx, change legacy name in
> other mainboard.

s/mainboard/mainboards/

Should the this patch be merged with PATCH 2/7, since otherwise the
build would break in between which would prevent doing bisects?


Thanks,

Paul
Peter Stuge - 2011-03-23 12:07:25
Paul Menzel wrote:
> Am Mittwoch, den 23.03.2011, 15:04 +0800 schrieb Bao, Zheng:
> > Since the SB700 has changed to sb7xx_51xx, change legacy name in
> > other mainboard.
> 
> s/mainboard/mainboards/
> 
> Should the this patch be merged with PATCH 2/7,

Yes, the renaming of files and the use of those files always go in
the same commit, since the changes are very much related.


//Peter
Marc Jones - 2011-03-25 16:33:39
On Wed, Mar 23, 2011 at 1:04 AM, Bao, Zheng <Zheng.Bao@amd.com> wrote:
> Since the SB700 has changed to sb7xx_51xx, change legacy name in
> other mainboard.
>
> Signed-off-by: Zheng Bao <zheng.bao@amd.com>

Acked-by: Marc Jones <marcj303@gmail.com>

Patch

Index: src/mainboard/asrock/939a785gmh/romstage.c
===================================================================
--- src/mainboard/asrock/939a785gmh/romstage.c	(revision 6459)
+++ src/mainboard/asrock/939a785gmh/romstage.c	(working copy)
@@ -146,22 +146,22 @@ 
 		/* Nothing special needs to be done to find bus 0 */
 		/* Allow the HT devices to be found */
 		enumerate_ht_chain();
-		/* sb700_lpc_port80(); */
-		sb700_pci_port80();
+		/* sb7xx_51xx_lpc_port80(); */
+		sb7xx_51xx_pci_port80();
 	}
 
 	if (bist == 0)
 		bsp_apicid = init_cpus(cpu_init_detectedx, sysinfo);
 
 	enable_rs780_dev8();
-	sb700_lpc_init();
+	sb7xx_51xx_lpc_init();
 
 	sio_init();
 	w83627dhg_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
 	uart_init();
 
 #if CONFIG_USBDEBUG
-	sb700_enable_usbdebug(CONFIG_USBDEBUG_DEFAULT_PORT);
+	sb7xx_51xx_enable_usbdebug(CONFIG_USBDEBUG_DEFAULT_PORT);
 	early_usbdebug_init();
 #endif
 
@@ -186,7 +186,7 @@ 
 
 	/* run _early_setup before soft-reset. */
 	rs780_early_setup();
-	sb700_early_setup();
+	sb7xx_51xx_early_setup();
 
 	/* Check to see if processor is capable of changing FIDVID  */
 	/* otherwise it will throw a GP# when reading FIDVID_STATUS */
@@ -226,7 +226,7 @@ 
 	sdram_initialize(sysinfo->nodes, sysinfo->ctrl, sysinfo);
 
 	rs780_before_pci_init();
-	sb700_before_pci_init();
+	sb7xx_51xx_before_pci_init();
 
 	post_cache_as_ram();
 }
Index: src/mainboard/asrock/939a785gmh/mainboard.c
===================================================================
--- src/mainboard/asrock/939a785gmh/mainboard.c	(revision 6459)
+++ src/mainboard/asrock/939a785gmh/mainboard.c	(working copy)
@@ -168,7 +168,7 @@ 
 };
 
 /* override the default SATA PHY setup */
-void sb700_setup_sata_phys(struct device *dev) {
+void sb7xx_51xx_setup_sata_phys(struct device *dev) {
 	/* RPR7.6.1 Program the PHY Global Control to 0x2C00 */
 	pci_write_config16(dev, 0x86, 0x2c00);
 
Index: src/mainboard/gigabyte/ma78gm/romstage.c
===================================================================
--- src/mainboard/gigabyte/ma78gm/romstage.c	(revision 6459)
+++ src/mainboard/gigabyte/ma78gm/romstage.c	(working copy)
@@ -87,7 +87,7 @@ 
 		/* mov bsp to bus 0xff when > 8 nodes */
 		set_bsp_node_CHtExtNodeCfgEn();
 		enumerate_ht_chain();
-		sb700_pci_port80();
+		sb7xx_51xx_pci_port80();
 	}
 
 	post_code(0x30);
@@ -100,14 +100,14 @@ 
 	post_code(0x32);
 
 	enable_rs780_dev8();
-	sb700_lpc_init();
+	sb7xx_51xx_lpc_init();
 
 	it8718f_enable_serial(0, CONFIG_TTYS0_BASE);
 	it8718f_disable_reboot();
 	uart_init();
 
 #if CONFIG_USBDEBUG
-	sb700_enable_usbdebug(CONFIG_USBDEBUG_DEFAULT_PORT);
+	sb7xx_51xx_enable_usbdebug(CONFIG_USBDEBUG_DEFAULT_PORT);
 	early_usbdebug_init();
 #endif
 
@@ -165,7 +165,7 @@ 
 
 	/* run _early_setup before soft-reset. */
 	rs780_early_setup();
-	sb700_early_setup();
+	sb7xx_51xx_early_setup();
 
 #if CONFIG_SET_FIDVID
 	msr = rdmsr(0xc0010071);
@@ -223,7 +223,7 @@ 
 //	die("After MCT init before CAR disabled.");
 
 	rs780_before_pci_init();
-	sb700_before_pci_init();
+	sb7xx_51xx_before_pci_init();
 
 	post_code(0x42);
 	printk(BIOS_DEBUG, "\n*** Yes, the copy/decompress is taking a while, FIXME!\n");
Index: src/mainboard/gigabyte/ma785gmt/romstage.c
===================================================================
--- src/mainboard/gigabyte/ma785gmt/romstage.c	(revision 6459)
+++ src/mainboard/gigabyte/ma785gmt/romstage.c	(working copy)
@@ -83,7 +83,7 @@ 
 		/* mov bsp to bus 0xff when > 8 nodes */
 		set_bsp_node_CHtExtNodeCfgEn();
 		enumerate_ht_chain();
-		sb700_pci_port80();
+		sb7xx_51xx_pci_port80();
 	}
 
 	post_code(0x30);
@@ -96,14 +96,14 @@ 
 	post_code(0x32);
 
 	enable_rs780_dev8();
-	sb700_lpc_init();
+	sb7xx_51xx_lpc_init();
 
 	it8718f_enable_serial(0, CONFIG_TTYS0_BASE);
 	it8718f_disable_reboot();
 	uart_init();
 
 #if CONFIG_USBDEBUG
-	sb700_enable_usbdebug(CONFIG_USBDEBUG_DEFAULT_PORT);
+	sb7xx_51xx_enable_usbdebug(CONFIG_USBDEBUG_DEFAULT_PORT);
 	early_usbdebug_init();
 #endif
 
@@ -163,7 +163,7 @@ 
 
 	/* run _early_setup before soft-reset. */
 	rs780_early_setup();
-	sb700_early_setup();
+	sb7xx_51xx_early_setup();
 
 #if CONFIG_SET_FIDVID
 	msr = rdmsr(0xc0010071);
@@ -221,7 +221,7 @@ 
 //	die("After MCT init before CAR disabled.");
 
 	rs780_before_pci_init();
-	sb700_before_pci_init();
+	sb7xx_51xx_before_pci_init();
 
 	post_code(0x42);
 	printk(BIOS_DEBUG, "\n*** Yes, the copy/decompress is taking a while, FIXME!\n");
Index: src/mainboard/amd/mahogany/romstage.c
===================================================================
--- src/mainboard/amd/mahogany/romstage.c	(revision 6459)
+++ src/mainboard/amd/mahogany/romstage.c	(working copy)
@@ -80,21 +80,21 @@ 
 		/* Nothing special needs to be done to find bus 0 */
 		/* Allow the HT devices to be found */
 		enumerate_ht_chain();
-		/* sb700_lpc_port80(); */
-		sb700_pci_port80();
+		/* sb7xx_51xx_lpc_port80(); */
+		sb7xx_51xx_pci_port80();
 	}
 
 	if (bist == 0)
 		bsp_apicid = init_cpus(cpu_init_detectedx, sysinfo);
 
 	enable_rs780_dev8();
-	sb700_lpc_init();
+	sb7xx_51xx_lpc_init();
 
 	it8718f_enable_serial(0, CONFIG_TTYS0_BASE);
 	uart_init();
 
 #if CONFIG_USBDEBUG
-	sb700_enable_usbdebug(CONFIG_USBDEBUG_DEFAULT_PORT);
+	sb7xx_51xx_enable_usbdebug(CONFIG_USBDEBUG_DEFAULT_PORT);
 	early_usbdebug_init();
 #endif
 
@@ -119,7 +119,7 @@ 
 
 	/* run _early_setup before soft-reset. */
 	rs780_early_setup();
-	sb700_early_setup();
+	sb7xx_51xx_early_setup();
 
 	/* Check to see if processor is capable of changing FIDVID  */
 	/* otherwise it will throw a GP# when reading FIDVID_STATUS */
@@ -159,7 +159,7 @@ 
 	sdram_initialize(sysinfo->nodes, sysinfo->ctrl, sysinfo);
 
 	rs780_before_pci_init();
-	sb700_before_pci_init();
+	sb7xx_51xx_before_pci_init();
 
 	post_cache_as_ram();
 }
Index: src/mainboard/amd/mahogany_fam10/romstage.c
===================================================================
--- src/mainboard/amd/mahogany_fam10/romstage.c	(revision 6459)
+++ src/mainboard/amd/mahogany_fam10/romstage.c	(working copy)
@@ -88,7 +88,7 @@ 
 		/* mov bsp to bus 0xff when > 8 nodes */
 		set_bsp_node_CHtExtNodeCfgEn();
 		enumerate_ht_chain();
-		sb700_pci_port80();
+		sb7xx_51xx_pci_port80();
 	}
 
 	post_code(0x30);
@@ -101,13 +101,13 @@ 
 	post_code(0x32);
 
 	enable_rs780_dev8();
-	sb700_lpc_init();
+	sb7xx_51xx_lpc_init();
 
 	it8718f_enable_serial(0, CONFIG_TTYS0_BASE);
 	uart_init();
 
 #if CONFIG_USBDEBUG
-	sb700_enable_usbdebug(CONFIG_USBDEBUG_DEFAULT_PORT);
+	sb7xx_51xx_enable_usbdebug(CONFIG_USBDEBUG_DEFAULT_PORT);
 	early_usbdebug_init();
 #endif
 
@@ -167,7 +167,7 @@ 
 
 	/* run _early_setup before soft-reset. */
 	rs780_early_setup();
-	sb700_early_setup();
+	sb7xx_51xx_early_setup();
 
  #if CONFIG_SET_FIDVID
 	msr = rdmsr(0xc0010071);
@@ -225,7 +225,7 @@ 
 //	die("After MCT init before CAR disabled.");
 
 	rs780_before_pci_init();
-	sb700_before_pci_init();
+	sb7xx_51xx_before_pci_init();
 
 	post_code(0x42);
 	printk(BIOS_DEBUG, "\n*** Yes, the copy/decompress is taking a while, FIXME!\n");
Index: src/mainboard/amd/tilapia_fam10/romstage.c
===================================================================
--- src/mainboard/amd/tilapia_fam10/romstage.c	(revision 6459)
+++ src/mainboard/amd/tilapia_fam10/romstage.c	(working copy)
@@ -87,7 +87,7 @@ 
 		/* mov bsp to bus 0xff when > 8 nodes */
 		set_bsp_node_CHtExtNodeCfgEn();
 		enumerate_ht_chain();
-		sb700_pci_port80();
+		sb7xx_51xx_pci_port80();
 	}
 
 	post_code(0x30);
@@ -100,13 +100,13 @@ 
 	post_code(0x32);
 
 	enable_rs780_dev8();
-	sb700_lpc_init();
+	sb7xx_51xx_lpc_init();
 
 	it8718f_enable_serial(0, CONFIG_TTYS0_BASE);
 	uart_init();
 
 #if CONFIG_USBDEBUG
-	sb700_enable_usbdebug(CONFIG_USBDEBUG_DEFAULT_PORT);
+	sb7xx_51xx_enable_usbdebug(CONFIG_USBDEBUG_DEFAULT_PORT);
 	early_usbdebug_init();
 #endif
 
@@ -166,7 +166,7 @@ 
 
 	/* run _early_setup before soft-reset. */
 	rs780_early_setup();
-	sb700_early_setup();
+	sb7xx_51xx_early_setup();
 
 #if CONFIG_SET_FIDVID
 	msr = rdmsr(0xc0010071);
@@ -224,7 +224,7 @@ 
 //	die("After MCT init before CAR disabled.");
 
 	rs780_before_pci_init();
-	sb700_before_pci_init();
+	sb7xx_51xx_before_pci_init();
 
 	post_code(0x42);
 	printk(BIOS_DEBUG, "\n*** Yes, the copy/decompress is taking a while, FIXME!\n");
Index: src/mainboard/iei/kino-780am2-fam10/romstage.c
===================================================================
--- src/mainboard/iei/kino-780am2-fam10/romstage.c	(revision 6459)
+++ src/mainboard/iei/kino-780am2-fam10/romstage.c	(working copy)
@@ -89,7 +89,7 @@ 
 		/* mov bsp to bus 0xff when > 8 nodes */
 		set_bsp_node_CHtExtNodeCfgEn();
 		enumerate_ht_chain();
-		sb700_pci_port80();
+		sb7xx_51xx_pci_port80();
 	}
 
 	post_code(0x30);
@@ -102,13 +102,13 @@ 
 	post_code(0x32);
 
 	enable_rs780_dev8();
-	sb700_lpc_init();
+	sb7xx_51xx_lpc_init();
 
 	f71859_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
 	uart_init();
 
 #if CONFIG_USBDEBUG
-	sb700_enable_usbdebug(CONFIG_USBDEBUG_DEFAULT_PORT);
+	sb7xx_51xx_enable_usbdebug(CONFIG_USBDEBUG_DEFAULT_PORT);
 	early_usbdebug_init();
 #endif
 
@@ -168,7 +168,7 @@ 
 
 	/* run _early_setup before soft-reset. */
 	rs780_early_setup();
-	sb700_early_setup();
+	sb7xx_51xx_early_setup();
 
  #if CONFIG_SET_FIDVID
 	msr = rdmsr(0xc0010071);
@@ -226,7 +226,7 @@ 
 //	die("After MCT init before CAR disabled.");
 
 	rs780_before_pci_init();
-	sb700_before_pci_init();
+	sb7xx_51xx_before_pci_init();
 
 	post_code(0x42);
 	printk(BIOS_DEBUG, "\n*** Yes, the copy/decompress is taking a while, FIXME!\n");
Index: src/mainboard/jetway/pa78vm5/romstage.c
===================================================================
--- src/mainboard/jetway/pa78vm5/romstage.c	(revision 6459)
+++ src/mainboard/jetway/pa78vm5/romstage.c	(working copy)
@@ -94,7 +94,7 @@ 
 		/* mov bsp to bus 0xff when > 8 nodes */
 		set_bsp_node_CHtExtNodeCfgEn();
 		enumerate_ht_chain();
-		sb700_pci_port80();
+		sb7xx_51xx_pci_port80();
 	}
 
 	post_code(0x30);
@@ -107,13 +107,13 @@ 
 	post_code(0x32);
 
 	enable_rs780_dev8();
-	sb700_lpc_init();
+	sb7xx_51xx_lpc_init();
 
 	f71863fg_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
 	uart_init();
 
 #if CONFIG_USBDEBUG
-	sb700_enable_usbdebug(CONFIG_USBDEBUG_DEFAULT_PORT);
+	sb7xx_51xx_enable_usbdebug(CONFIG_USBDEBUG_DEFAULT_PORT);
 	early_usbdebug_init();
 #endif
 
@@ -173,7 +173,7 @@ 
 
 	/* run _early_setup before soft-reset. */
 	rs780_early_setup();
-	sb700_early_setup();
+	sb7xx_51xx_early_setup();
 
 #if CONFIG_SET_FIDVID
 	msr = rdmsr(0xc0010071);
@@ -231,7 +231,7 @@ 
 //	die("After MCT init before CAR disabled.");
 
 	rs780_before_pci_init();
-	sb700_before_pci_init();
+	sb7xx_51xx_before_pci_init();
 
 	post_code(0x42);
 	printk(BIOS_DEBUG, "\n*** Yes, the copy/decompress is taking a while, FIXME!\n");
Index: src/mainboard/asus/m4a785-m/romstage.c
===================================================================
--- src/mainboard/asus/m4a785-m/romstage.c	(revision 6459)
+++ src/mainboard/asus/m4a785-m/romstage.c	(working copy)
@@ -87,7 +87,7 @@ 
 		/* mov bsp to bus 0xff when > 8 nodes */
 		set_bsp_node_CHtExtNodeCfgEn();
 		enumerate_ht_chain();
-		sb700_pci_port80();
+		sb7xx_51xx_pci_port80();
 	}
 
 	post_code(0x30);
@@ -100,14 +100,14 @@ 
 	post_code(0x32);
 
 	enable_rs780_dev8();
-	sb700_lpc_init();
+	sb7xx_51xx_lpc_init();
 
 	it8712f_enable_serial(0, CONFIG_TTYS0_BASE);
 	it8712f_kill_watchdog();
 	uart_init();
 
 #if CONFIG_USBDEBUG
-	sb700_enable_usbdebug(CONFIG_USBDEBUG_DEFAULT_PORT);
+	sb7xx_51xx_enable_usbdebug(CONFIG_USBDEBUG_DEFAULT_PORT);
 	early_usbdebug_init();
 #endif
 
@@ -167,7 +167,7 @@ 
 
 	/* run _early_setup before soft-reset. */
 	rs780_early_setup();
-	sb700_early_setup();
+	sb7xx_51xx_early_setup();
 
  #if CONFIG_SET_FIDVID
 	msr = rdmsr(0xc0010071);
@@ -225,7 +225,7 @@ 
 //	die("After MCT init before CAR disabled.");
 
 	rs780_before_pci_init();
-	sb700_before_pci_init();
+	sb7xx_51xx_before_pci_init();
 
 	post_code(0x42);
 	printk(BIOS_DEBUG, "\n*** Yes, the copy/decompress is taking a while, FIXME!\n");
Index: src/mainboard/asus/m4a78-em/romstage.c
===================================================================
--- src/mainboard/asus/m4a78-em/romstage.c	(revision 6459)
+++ src/mainboard/asus/m4a78-em/romstage.c	(working copy)
@@ -87,7 +87,7 @@ 
 		/* mov bsp to bus 0xff when > 8 nodes */
 		set_bsp_node_CHtExtNodeCfgEn();
 		enumerate_ht_chain();
-		sb700_pci_port80();
+		sb7xx_51xx_pci_port80();
 	}
 
 	post_code(0x30);
@@ -100,14 +100,14 @@ 
 	post_code(0x32);
 
 	enable_rs780_dev8();
-	sb700_lpc_init();
+	sb7xx_51xx_lpc_init();
 
 	it8712f_enable_serial(0, CONFIG_TTYS0_BASE);
 	it8712f_kill_watchdog();
 	uart_init();
 
 #if CONFIG_USBDEBUG
-	sb700_enable_usbdebug(CONFIG_USBDEBUG_DEFAULT_PORT);
+	sb7xx_51xx_enable_usbdebug(CONFIG_USBDEBUG_DEFAULT_PORT);
 	early_usbdebug_init();
 #endif
 
@@ -167,7 +167,7 @@ 
 
 	/* run _early_setup before soft-reset. */
 	rs780_early_setup();
-	sb700_early_setup();
+	sb7xx_51xx_early_setup();
 
  #if CONFIG_SET_FIDVID
 	msr = rdmsr(0xc0010071);
@@ -225,7 +225,7 @@ 
 //	die("After MCT init before CAR disabled.");
 
 	rs780_before_pci_init();
-	sb700_before_pci_init();
+	sb7xx_51xx_before_pci_init();
 
 	post_code(0x42);
 	printk(BIOS_DEBUG, "\n*** Yes, the copy/decompress is taking a while, FIXME!\n");