Patchwork use PCI_VENDOR_ID_* define in all driver .c files

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Submitter Idwer Vollering
Date 2011-03-31 14:51:01
Message ID <AANLkTimWx6V_XCrSSp3WSmx9X16ar3rZDbPshyQ+cVGv@mail.gmail.com>
Download mbox | patch
Permalink /patch/2823/
State Bitrotted
Headers show

Comments

Idwer Vollering - 2011-03-31 14:51:01
Use the appropiate vendor ID from the, present but not always used, #define.
Unfortunately, some lines that currently are less than 80 characters
wide will exceed that character count.

board_enable and chipset_enable.c aren't touched by this patch.

Signed-off-by: Idwer Vollering <vidwer@gmail.com>
Stefan Reinauer - 2011-04-01 00:46:51
* Idwer Vollering <vidwer@gmail.com> [110331 16:51]:
> Use the appropiate vendor ID from the, present but not always used, #define.
> Unfortunately, some lines that currently are less than 80 characters
> wide will exceed that character count.
> 
> board_enable and chipset_enable.c aren't touched by this patch.
> 
> Signed-off-by: Idwer Vollering <vidwer@gmail.com>

I think this adds another indirection layer when trying to figure out
what's going on. But that's just my very personal and slightly kinky
opinion.

Stefan

Patch

Index: drkaiser.c
===================================================================
--- drkaiser.c	(revision 1283)
+++ drkaiser.c	(working copy)
@@ -31,7 +31,7 @@ 
 #define DRKAISER_MEMMAP_MASK		((1 << 17) - 1)
 
 const struct pcidev_status drkaiser_pcidev[] = {
-	{0x1803, 0x5057, OK, "Dr. Kaiser", "PC-Waechter (Actel FPGA)"},
+	{PCI_VENDOR_ID_DRKAISER, 0x5057, OK, "Dr. Kaiser", "PC-Waechter (Actel FPGA)"},
 	{},
 };
 
Index: gfxnvidia.c
===================================================================
--- gfxnvidia.c	(revision 1283)
+++ gfxnvidia.c	(working copy)
@@ -33,29 +33,29 @@ 
 uint8_t *nvidia_bar;
 
 const struct pcidev_status gfx_nvidia[] = {
-	{0x10de, 0x0010, NT, "NVIDIA", "Mutara V08 [NV2]" },
-	{0x10de, 0x0018, NT, "NVIDIA", "RIVA 128" },
-	{0x10de, 0x0020, NT, "NVIDIA", "RIVA TNT" },
-	{0x10de, 0x0028, NT, "NVIDIA", "RIVA TNT2/TNT2 Pro" },
-	{0x10de, 0x0029, NT, "NVIDIA", "RIVA TNT2 Ultra" },
-	{0x10de, 0x002c, NT, "NVIDIA", "Vanta/Vanta LT" },
-	{0x10de, 0x002d, OK, "NVIDIA", "RIVA TNT2 Model 64/Model 64 Pro" },
-	{0x10de, 0x00a0, NT, "NVIDIA", "Aladdin TNT2" },
-	{0x10de, 0x0100, NT, "NVIDIA", "GeForce 256" },
-	{0x10de, 0x0101, NT, "NVIDIA", "GeForce DDR" },
-	{0x10de, 0x0103, NT, "NVIDIA", "Quadro" },
-	{0x10de, 0x0110, NT, "NVIDIA", "GeForce2 MX" },
-	{0x10de, 0x0111, NT, "NVIDIA", "GeForce2 MX" },
-	{0x10de, 0x0112, NT, "NVIDIA", "GeForce2 GO" },
-	{0x10de, 0x0113, NT, "NVIDIA", "Quadro2 MXR" },
-	{0x10de, 0x0150, NT, "NVIDIA", "GeForce2 GTS/Pro" },
-	{0x10de, 0x0151, NT, "NVIDIA", "GeForce2 GTS" },
-	{0x10de, 0x0152, NT, "NVIDIA", "GeForce2 Ultra" },
-	{0x10de, 0x0153, NT, "NVIDIA", "Quadro2 Pro" },
-	{0x10de, 0x0200, NT, "NVIDIA", "GeForce 3 nFX" },
-	{0x10de, 0x0201, NT, "NVIDIA", "GeForce 3 nFX" },
-	{0x10de, 0x0202, NT, "NVIDIA", "GeForce 3 nFX Ultra" },
-	{0x10de, 0x0203, NT, "NVIDIA", "Quadro 3 DDC" },
+	{PCI_VENDOR_ID_NVIDIA, 0x0010, NT, "NVIDIA", "Mutara V08 [NV2]" },
+	{PCI_VENDOR_ID_NVIDIA, 0x0018, NT, "NVIDIA", "RIVA 128" },
+	{PCI_VENDOR_ID_NVIDIA, 0x0020, NT, "NVIDIA", "RIVA TNT" },
+	{PCI_VENDOR_ID_NVIDIA, 0x0028, NT, "NVIDIA", "RIVA TNT2/TNT2 Pro" },
+	{PCI_VENDOR_ID_NVIDIA, 0x0029, NT, "NVIDIA", "RIVA TNT2 Ultra" },
+	{PCI_VENDOR_ID_NVIDIA, 0x002c, NT, "NVIDIA", "Vanta/Vanta LT" },
+	{PCI_VENDOR_ID_NVIDIA, 0x002d, OK, "NVIDIA", "RIVA TNT2 Model 64/Model 64 Pro" },
+	{PCI_VENDOR_ID_NVIDIA, 0x00a0, NT, "NVIDIA", "Aladdin TNT2" },
+	{PCI_VENDOR_ID_NVIDIA, 0x0100, NT, "NVIDIA", "GeForce 256" },
+	{PCI_VENDOR_ID_NVIDIA, 0x0101, NT, "NVIDIA", "GeForce DDR" },
+	{PCI_VENDOR_ID_NVIDIA, 0x0103, NT, "NVIDIA", "Quadro" },
+	{PCI_VENDOR_ID_NVIDIA, 0x0110, NT, "NVIDIA", "GeForce2 MX" },
+	{PCI_VENDOR_ID_NVIDIA, 0x0111, NT, "NVIDIA", "GeForce2 MX" },
+	{PCI_VENDOR_ID_NVIDIA, 0x0112, NT, "NVIDIA", "GeForce2 GO" },
+	{PCI_VENDOR_ID_NVIDIA, 0x0113, NT, "NVIDIA", "Quadro2 MXR" },
+	{PCI_VENDOR_ID_NVIDIA, 0x0150, NT, "NVIDIA", "GeForce2 GTS/Pro" },
+	{PCI_VENDOR_ID_NVIDIA, 0x0151, NT, "NVIDIA", "GeForce2 GTS" },
+	{PCI_VENDOR_ID_NVIDIA, 0x0152, NT, "NVIDIA", "GeForce2 Ultra" },
+	{PCI_VENDOR_ID_NVIDIA, 0x0153, NT, "NVIDIA", "Quadro2 Pro" },
+	{PCI_VENDOR_ID_NVIDIA, 0x0200, NT, "NVIDIA", "GeForce 3 nFX" },
+	{PCI_VENDOR_ID_NVIDIA, 0x0201, NT, "NVIDIA", "GeForce 3 nFX" },
+	{PCI_VENDOR_ID_NVIDIA, 0x0202, NT, "NVIDIA", "GeForce 3 nFX Ultra" },
+	{PCI_VENDOR_ID_NVIDIA, 0x0203, NT, "NVIDIA", "Quadro 3 DDC" },
 
 	{},
 };
Index: nicrealtek.c
===================================================================
--- nicrealtek.c	(revision 1283)
+++ nicrealtek.c	(working copy)
@@ -31,8 +31,8 @@ 
 #define BIOS_ROM_DATA		0xD7
 
 const struct pcidev_status nics_realtek[] = {
-	{0x10ec, 0x8139, OK, "Realtek", "RTL8139/8139C/8139C+"},
-	{0x1113, 0x1211, OK, "SMC2", "1211TX"}, /* RTL8139 clone */
+	{PCI_VENDOR_ID_REALTEK, 0x8139, OK, "Realtek", "RTL8139/8139C/8139C+"},
+	{PCI_VENDOR_ID_SMC1211, 0x1211, OK, "SMC2", "1211TX"}, /* RTL8139 clone */
 	{},
 };
 
Index: satamv.c
===================================================================
--- satamv.c	(revision 1283)
+++ satamv.c	(working copy)
@@ -24,12 +24,14 @@ 
 #include "flash.h"
 #include "programmer.h"
 
+#define PCI_VENDOR_ID_MARVELL	0x11ab
+
 uint8_t *mv_bar;
 uint16_t mv_iobar;
 
 const struct pcidev_status satas_mv[] = {
 	/* 88SX6041 and 88SX6042 are the same according to the datasheet. */
-	{0x11ab, 0x7042, OK, "Marvell", "88SX7042 PCI-e 4-port SATA-II"},
+	{PCI_VENDOR_ID_MARVELL, 0x7042, OK, "Marvell", "88SX7042 PCI-e 4-port SATA-II"},
 
 	{},
 };
Index: nicnatsemi.c
===================================================================
--- nicnatsemi.c	(revision 1283)
+++ nicnatsemi.c	(working copy)
@@ -30,8 +30,8 @@ 
 #define BOOT_ROM_DATA		0x54
 
 const struct pcidev_status nics_natsemi[] = {
-	{0x100b, 0x0020, NT, "National Semiconductor", "DP83815/DP83816"},
-	{0x100b, 0x0022, NT, "National Semiconductor", "DP83820"},
+	{PCI_VENDOR_ID_NATSEMI, 0x0020, NT, "National Semiconductor", "DP83815/DP83816"},
+	{PCI_VENDOR_ID_NATSEMI, 0x0022, NT, "National Semiconductor", "DP83820"},
 	{},
 };
 
Index: atahpt.c
===================================================================
--- atahpt.c	(revision 1283)
+++ atahpt.c	(working copy)
@@ -31,9 +31,9 @@ 
 #define PCI_VENDOR_ID_HPT	0x1103
 
 const struct pcidev_status ata_hpt[] = {
-	{0x1103, 0x0004, NT, "Highpoint", "HPT366/368/370/370A/372/372N"},
-	{0x1103, 0x0005, NT, "Highpoint", "HPT372A/372N"},
-	{0x1103, 0x0006, NT, "Highpoint", "HPT302/302N"},
+	{PCI_VENDOR_ID_HPT, 0x0004, NT, "Highpoint", "HPT366/368/370/370A/372/372N"},
+	{PCI_VENDOR_ID_HPT, 0x0005, NT, "Highpoint", "HPT372A/372N"},
+	{PCI_VENDOR_ID_HPT, 0x0006, NT, "Highpoint", "HPT302/302N"},
 
 	{},
 };
Index: nic3com.c
===================================================================
--- nic3com.c	(revision 1283)
+++ nic3com.c	(working copy)
@@ -37,20 +37,20 @@ 
 
 const struct pcidev_status nics_3com[] = {
 	/* 3C90xB */
-	{0x10b7, 0x9055, OK, "3COM", "3C90xB: PCI 10/100 Mbps; shared 10BASE-T/100BASE-TX"},
-	{0x10b7, 0x9001, NT, "3COM", "3C90xB: PCI 10/100 Mbps; shared 10BASE-T/100BASE-T4" },
-	{0x10b7, 0x9004, OK, "3COM", "3C90xB: PCI 10BASE-T (TPO)" },
-	{0x10b7, 0x9005, NT, "3COM", "3C90xB: PCI 10BASE-T/10BASE2/AUI (COMBO)" },
-	{0x10b7, 0x9006, NT, "3COM", "3C90xB: PCI 10BASE-T/10BASE2 (TPC)" },
-	{0x10b7, 0x900a, NT, "3COM", "3C90xB: PCI 10BASE-FL" },
-	{0x10b7, 0x905a, NT, "3COM", "3C90xB: PCI 10BASE-FX" },
-	{0x10b7, 0x9058, OK, "3COM", "3C905B: Cyclone 10/100/BNC" },
+	{PCI_VENDOR_ID_3COM, 0x9055, OK, "3COM", "3C90xB: PCI 10/100 Mbps; shared 10BASE-T/100BASE-TX"},
+	{PCI_VENDOR_ID_3COM, 0x9001, NT, "3COM", "3C90xB: PCI 10/100 Mbps; shared 10BASE-T/100BASE-T4" },
+	{PCI_VENDOR_ID_3COM, 0x9004, OK, "3COM", "3C90xB: PCI 10BASE-T (TPO)" },
+	{PCI_VENDOR_ID_3COM, 0x9005, NT, "3COM", "3C90xB: PCI 10BASE-T/10BASE2/AUI (COMBO)" },
+	{PCI_VENDOR_ID_3COM, 0x9006, NT, "3COM", "3C90xB: PCI 10BASE-T/10BASE2 (TPC)" },
+	{PCI_VENDOR_ID_3COM, 0x900a, NT, "3COM", "3C90xB: PCI 10BASE-FL" },
+	{PCI_VENDOR_ID_3COM, 0x905a, NT, "3COM", "3C90xB: PCI 10BASE-FX" },
+	{PCI_VENDOR_ID_3COM, 0x9058, OK, "3COM", "3C905B: Cyclone 10/100/BNC" },
 
 	/* 3C905C */
-	{0x10b7, 0x9200, OK, "3COM", "3C905C: EtherLink 10/100 PCI (TX)" },
+	{PCI_VENDOR_ID_3COM, 0x9200, OK, "3COM", "3C905C: EtherLink 10/100 PCI (TX)" },
 
 	/* 3C980C */
-	{0x10b7, 0x9805, NT, "3COM", "3C980C: EtherLink Server 10/100 PCI (TX)" },
+	{PCI_VENDOR_ID_3COM, 0x9805, NT, "3COM", "3C980C: EtherLink Server 10/100 PCI (TX)" },
 
 	{},
 };
Index: satasii.c
===================================================================
--- satasii.c	(revision 1283)
+++ satasii.c	(working copy)
@@ -30,12 +30,12 @@ 
 static uint16_t id;
 
 const struct pcidev_status satas_sii[] = {
-	{0x1095, 0x0680, OK, "Silicon Image", "PCI0680 Ultra ATA-133 Host Ctrl"},
-	{0x1095, 0x3112, OK, "Silicon Image", "SiI 3112 [SATALink/SATARaid] SATA Ctrl"},
-	{0x1095, 0x3114, OK, "Silicon Image", "SiI 3114 [SATALink/SATARaid] SATA Ctrl"},
-	{0x1095, 0x3124, OK, "Silicon Image", "SiI 3124 PCI-X SATA Ctrl"},
-	{0x1095, 0x3132, OK, "Silicon Image", "SiI 3132 SATA Raid II Ctrl"},
-	{0x1095, 0x3512, OK, "Silicon Image", "SiI 3512 [SATALink/SATARaid] SATA Ctrl"},
+	{PCI_VENDOR_ID_SII, 0x0680, OK, "Silicon Image", "PCI0680 Ultra ATA-133 Host Ctrl"},
+	{PCI_VENDOR_ID_SII, 0x3112, OK, "Silicon Image", "SiI 3112 [SATALink/SATARaid] SATA Ctrl"},
+	{PCI_VENDOR_ID_SII, 0x3114, OK, "Silicon Image", "SiI 3114 [SATALink/SATARaid] SATA Ctrl"},
+	{PCI_VENDOR_ID_SII, 0x3124, OK, "Silicon Image", "SiI 3124 PCI-X SATA Ctrl"},
+	{PCI_VENDOR_ID_SII, 0x3132, OK, "Silicon Image", "SiI 3132 SATA Raid II Ctrl"},
+	{PCI_VENDOR_ID_SII, 0x3512, OK, "Silicon Image", "SiI 3512 [SATALink/SATARaid] SATA Ctrl"},
 
 	{},
 };