From patchwork Wed Sep 23 17:41:42 2009 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Subject: Compression fix Date: Wed, 23 Sep 2009 17:41:42 -0000 From: Myles Watson X-Patchwork-Id: 284 Message-Id: <2831fecf0909231041h4bbb3fdh2938ea492fe4784e@mail.gmail.com> To: coreboot Separate payload compression from stage compression. I figured out why sometimes my coreboot_ram was 40K and sometimes it was 250K. Signed-off-by: Myles Watson Thanks, Myles Acked-by: Peter Stuge Index: svn/src/arch/i386/Makefile.inc =================================================================== --- svn.orig/src/arch/i386/Makefile.inc +++ svn/src/arch/i386/Makefile.inc @@ -25,7 +25,7 @@ ifeq ($(CONFIG_PAYLOAD_NONE),y) @printf " PAYLOAD none (as specified by user)\n" else @printf " PAYLOAD $(CONFIG_FALLBACK_PAYLOAD_FILE) $(COMPRESSFLAG)\n" - $(CBFSTOOL) ./build/coreboot.rom add-payload $(CONFIG_FALLBACK_PAYLOAD_FILE) fallback/payload $(CBFS_COMPRESS_FLAG) + $(CBFSTOOL) ./build/coreboot.rom add-payload $(CONFIG_FALLBACK_PAYLOAD_FILE) fallback/payload $(CBFS_PAYLOAD_COMPRESS_FLAG) ifeq ($(CONFIG_VGA_BIOS),y) @printf " VGABIOS $(CONFIG_FALLBACK_VGA_BIOS_FILE) $(CONFIG_FALLBACK_VGA_BIOS_ID)\n" $(CBFSTOOL) ./build/coreboot.rom add $(CONFIG_FALLBACK_VGA_BIOS_FILE) "pci$(CONFIG_FALLBACK_VGA_BIOS_ID).rom" optionrom Index: svn/Makefile =================================================================== --- svn.orig/Makefile +++ svn/Makefile @@ -236,9 +236,10 @@ CFLAGS +=-Wwrite-strings -Wredundant-dec CFLAGS += -Werror-implicit-function-declaration -Wstrict-aliasing -Wshadow CFLAGS += -fno-common -ffreestanding -fno-builtin -fomit-frame-pointer -CBFS_COMPRESS_FLAG:= -ifeq ($(CONFIG_COMPRESSED_PAYLOAD_LZMA),y) CBFS_COMPRESS_FLAG:=l +CBFS_PAYLOAD_COMPRESS_FLAG:= +ifeq ($(CONFIG_COMPRESSED_PAYLOAD_LZMA),y) +CBFS_PAYLOAD_COMPRESS_FLAG:=l endif coreboot: prepare prepare2 $(obj)/coreboot.rom