Patchwork here's the completely fixed patch.

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Submitter Brandon Dowdy
Date 2011-04-27 21:27:20
Message ID <BANLkTimY9-Z31L9Rt_P5KCjU6dWsKNiRdA@mail.gmail.com>
Download mbox | patch
Permalink /patch/2924/
State Superseded
Headers show

Comments

Brandon Dowdy - 2011-04-27 21:27:20
Here is the same patch that is completely looked at and fixed.
Stefan Reinauer - 2011-04-27 22:36:18
* Brandon Dowdy <brandonrd7@gmail.com> [110427 23:27]:
> Here is the same patch that is completely looked at and fixed.

This patch does not hook up any of the code it adds. It basically does
nothing. Did you ever try this code before sending it? I'm pretty sure
it doesn't work, whatever the problem is it's trying to solve.

Some other things:

 - why do you call the EC access function UC? 
 - Maybe these functions can be shared with some KBC stuff and/or moved
   to a separate file?
 - Signed-off-by: is missing

Stefan
Michael Karcher - 2011-04-28 10:42:59
Am Donnerstag, den 28.04.2011, 00:36 +0200 schrieb Stefan Reinauer:
>  - why do you call the EC access function UC? 
This is actually my idea, i called them "uc" for microcontroller,
because that interface is used for embedded controllers as well as
keyboard controllers.

>  - Signed-off-by: is missing
He had it in the original patch, but was told that as most code in that
patch was not written by him, he can not sign off that. Please see the
end of
http://www.coreboot.org/pipermail/flashrom/2011-April/006252.html

Regards,
  Michael Karcher

Patch

Index: board_enable.c
===================================================================
--- board_enable.c	(revision 1288)
+++ board_enable.c	(working copy) 
@@ -1853,11 +1856,150 @@ 
+
+
+static int wait_uc_writebuf_empty(uint16_t port)
+{
+    int count;
+
+    for (count = 0; count < 50; count++)
+    {
+        /* quit if OBF bit clear */
+        if (!(INB(port + 4) & 2))
+        { 
+            msg_pinfo("EC write buffer is already empty.\n");
+            return 0;
+        }
+        usleep(10000);
+    }
+    msg_perr("wait_uc_writebuf_empty returned false or EC write buffer not empty.\n");
+    return -1;
+}
+
+static int uc_send_command(uint16_t port, uint8_t command)
+{
+       if (wait_uc_writebuf_empty(port) != 0)
+               return -1;
+       OUTB(command, port + 4);
+       return 0;
+}
+
+static int uc_send_data(uint16_t port, uint8_t command)
+{
+       if (wait_uc_writebuf_empty(port) != 0)
+               return -1;
+       OUTB(command, port);
+       return 0;
+}
+
+static int compal_os_takeover_fan(void) 
+{
+    if(uc_send_command(0x60, 0x59) != 0) // system state notification
+    {
+        msg_perr("Unable to send System State Notification.\n");
+        return -1;
+    }
+
+    if(uc_send_data(0x60, 0xA8) != 0) // disable EC fan control
+    {
+        msg_perr("Unable to disable fan control by the EC.\n");
+        return -1;
+    }
+    if(uc_send_command(0x60, 0x49) != 0) // thermal state notification
+    {
+        msg_perr("Unable to send Thermal State Notification.\n");
+        return -1;
+    }
+    if(uc_send_data(0x60, 0xA2) != 0) // set fans to level 2
+    {
+        msg_perr("Unable to set fans to high speed.\n");
+        return -1;
+    }
+    return 0;
+}
+
+static int compal_pc87591_flash_enable(void) 
+{
+    int i;
+    unsigned int flashcontrolbase;
+
+    /* select logical device 0xf: shared BIOS and flash control */
+    sio_write(0x4C, 0x7, 0xF);
+    sio_write(0x4C, 0x30, 0x1); /* activate processor access */
+
+    /* get I/O base address */
+    flashcontrolbase = sio_read(0x4C, 0x61) | (sio_read(0x4C, 0x60) << 8);
+    msg_pinfo("flash control base address is 0x%x\n", flashcontrolbase);
+    for(i = 0; i < 16; i++)
+        OUTB(i * 0x10, flashcontrolbase+8); /* remove protection of flash segment i */
+
+    if(uc_send_command(0x60, 0x59) != 0) // system state notification
+    {
+        msg_perr("Unable to send System State Notification.\n");
+        return -1;
+    }
+
+    if(uc_send_data(0x60, 0xF2) != 0) // enter flash mode
+    {
+        msg_perr("Unable to put the EC into flash mode.\n");
+        return -1;
+    }
+
+    return 0;
+}
+
+static int intel_ich_gpio25_lower(void)
+{
+       return intel_ich_gpio_set(25, 0);
+}
+
+static void toshiba_flashmode_exit(void * cmdptr) 
+{
+       if(uc_send_command(0x60, 0x49) != 0) // thermal state notification
+       {
+           msg_perr("Unable to send Thermal State Notification.\n");
+           return;
+       }
+
+       if(uc_send_data(0x60, 0xA1) != 0) // set fans back to level 1
+       {
+           msg_perr("Unable to set fans back to level 1.\n");
+           return;
+       }
+}
+
+static int board_toshiba_satellite_s520(void) 
+{
+    /* Copyright (C) 2004 Toshiba and Compal. */
+    if(compal_os_takeover_fan() != 0)
+    {
+        msg_perr("compal_os_takeover_fan() is not returning 0.\n");
+        return -1;
+    }
+
+    if(compal_pc87591_flash_enable() != 0)
+    {
+        msg_perr("compal_pc87591_flash_enable() is not returning 0.\n");
+        return -1;
+    }
+
+
+    if (intel_ich_gpio25_lower() != 0)
+    { 
+        msg_perr("Unable to lower GPIO 25.\n");
+    	return -1;
+    }
+
+    register_shutdown(toshiba_flashmode_exit, NULL);
+    buses_supported = CHIP_BUSTYPE_PARALLEL;
+    return 0;
+}
+