Patchwork Only UDMA/33 PATA on m57sli, UDMA/66 with factory BIOS

login
register
about
Submitter Harald Gutmann
Date 2009-07-13 20:14:40
Message ID <200907132214.45436.harald.gutmann@gmx.net>
Download mbox | patch
Permalink /patch/30/
State Rejected, archived
Headers show

Comments

Harald Gutmann - 2009-07-13 20:14:40
On Monday 13 July 2009 20:32:46 Harald Gutmann wrote:
> 4. assume you did everything right and claim that it is value 0x72
> (hopefully you got it right with the pci-register-endianness and the
> address number). ;)
Okay, this was for sure wrong, as I read the line number instead the pci-
register number. It has to be 0x52 instead 0x72.

Attached is a little patch, which is not working on different hardware than 
mine, as some values are hard-coded. Also the place I patched that stuff is 
totally "wrong".

This patch works for me on my hardware:
[    2.256143] hda: UDMA/133 mode selected
[    2.256333] hdb: UDMA/66 mode selected

There are a few things which I need to figure out to get this stuff working like 
it should:
[*] Where shall I add the patch? src/southbridge/nvidia/mcp55/mcp55.c in 
mcp55_enable case device = IDE? some better/different suggestions?

[*] How to figure out the UDMA modes supported by the attached devices in 
coreboot? As this is according to IDE devices which can be changed at any 
time, it would be necessary to check for supported UDMA modes on run-time.

Any suggestions/ideas/further reading documents/... is welcome.



Kind regards,
Harald Gutmann
Tom Sylla - 2009-07-13 22:34:12
On Mon, Jul 13, 2009 at 4:14 PM, Harald Gutmann<harald.gutmann@gmx.net> wrote:
> [*] How to figure out the UDMA modes supported by the attached devices in
> coreboot? As this is according to IDE devices which can be changed at any
> time, it would be necessary to check for supported UDMA modes on run-time.

I am still confused by the more basic question of how you are
detecting the presence of an 80 conductor cable. You need a GPIO or
one of the mechanisms described in the PATA spec from T13. You need
that in addition to knowing what the drives support. To know what the
drives support you look in their identify device information (also
specified by T13, but you can find examples in the kernel or Hale
Landis' code)
Harald Gutmann - 2009-07-15 17:05:49
On Tuesday 14 July 2009 00:34:12 Tom Sylla wrote:
> On Mon, Jul 13, 2009 at 4:14 PM, Harald Gutmann<harald.gutmann@gmx.net> 
wrote:
> > [*] How to figure out the UDMA modes supported by the attached devices in
> > coreboot? As this is according to IDE devices which can be changed at any
> > time, it would be necessary to check for supported UDMA modes on
> > run-time.
>
> I am still confused by the more basic question of how you are
> detecting the presence of an 80 conductor cable.
The AMD74xx ide controller has the advantage that the presence of the 80 
conductor cable is reflected in it's pci-registers.
I determined that through the kernel driver source for this controller and 
verified it with replacing the 80 wire cable with a 40 wire cable.
The bit 0x52 of the pci-registers from the AMD74xx controller changes to 04 
when using a 40 wire cable.

> You need a GPIO or
> one of the mechanisms described in the PATA spec from T13.
This shouldn't be necessary for the 80 wire cable, as this is reflected in the 
pci-register.

> You need
> that in addition to knowing what the drives support. To know what the
> drives support you look in their identify device information (also
> specified by T13, but you can find examples in the kernel or Hale
> Landis' code)
This is ATM the interesting part which needs to be done. Figuring out which 
UDMA mode is supported by the attached drives, as the kernel driver sets the 
mode to a value which is also in the pci-registers of that controller. The 
value is at offset 0x62-0x63 for primary master & slave. My little previous 
attached patch does check if the 80 wire cable is used, and if it's used sets 
the 0x62-0x63 values to those which are needed by my connected devices.
This part is right now hardcoded, and should be done via looking up the device 
information and set the value dynamically to work with every ide-device.

Regards,
Harald

Patch

Index: mptable.c
===================================================================
--- mptable.c	(revision 4397)
+++ mptable.c	(working copy)
@@ -93,6 +93,19 @@ 
 		        pci_write_config32(dev, 0x84, 0x200018d2);
                 }
 	}
+	//TODO: Wrong place!
+	{
+		device_t dev;
+		dev = dev_find_slot(bus_mcp55[0], PCI_DEVFN(sbdn+ 0x4,0));
+		if (dev) {
+			if(pci_read_config8(dev, 0x52) == 0x00){
+				pci_write_config8(dev, 0x5e, 0x99);
+				//TODO: check for UDMA modes and set bits * this is hardcoded
+				pci_write_config8(dev, 0x62, 0xc5);
+				pci_write_config8(dev, 0x63, 0xc7);
+			}
+		}
+	}
 
 	/*I/O Ints:	     Type	Trigger    Polarity	                  Bus ID   IRQ	APIC ID	      PIN# */	
 	smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, apicid_mcp55, 0x0);