Patchwork New patch to review: 3218571 Really move SB800 clock init earlier

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Submitter gerrit@coreboot.org
Date 2011-06-11 02:48:49
Message ID <E1QVEFl-0000GR-AC@ra.coresystems.de>
Download mbox | patch
Permalink /patch/3108/
State New, archived
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gerrit@coreboot.org - 2011-06-11 02:48:49
Marshall Buschman (mbuschman@lucidmachines.com) just uploaded a new patch set to gerrit, which you can find at
http://review.coreboot.org/22

-gerrit

Patch

commit 3218571ad2ebbafd9fa03d16fa2c9fe91c647025
Author: Marshall Buschman <mbuschman@lucidmachines.com>
Date:   Fri Jun 10 21:42:21 2011 -0500

    Really move SB800 clock init earlier
    
    Move SB800 clock init code, not copy it.
    Doh!
    
    Change-Id: I1b1bd36b7c1bd85d879544b014d81c55a94916b9
    Signed-off-by: Marshall Buschman <mbuschman@lucidmachines.com>

diff --git a/src/mainboard/asrock/e350m1/romstage.c b/src/mainboard/asrock/e350m1/romstage.c
index aaaaee4..351bf51 100644
--- a/src/mainboard/asrock/e350m1/romstage.c
+++ b/src/mainboard/asrock/e350m1/romstage.c
@@ -94,17 +94,6 @@  void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 		w83627hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
 		console_init();
 	}
-	//reg8 = pmio_read(0x24);
-	outb(0x24, 0xCD6);
-	reg8 = inb(0xCD7);
-	reg8 |= 1;
-	reg8 &= ~(1 << 1);
-	//pmio_write(0x24, reg8);
-	outb(0x24, 0xCD6);
-	outb(reg8, 0xCD7);
-
-	*(volatile u32 *)(0xFED80000 + 0xE00 + 0x40) &= ~((1 << 0) | (1 << 2));	/* 48Mhz */
-	*(volatile u32 *)(0xFED80000 + 0xE00 + 0x40) |= 1 << 1;	/* 48Mhz */
 
 	/* Halt if there was a built in self test failure */
 	post_code(0x34);