===================================================================
@@ -7,6 +7,7 @@
#include <arch/io.h>
#include <string.h>
#include "chip.h"
+#include <cbfs.h>
/* vgabios.c. Derived from: */
@@ -266,7 +267,7 @@
{
unsigned long busdevfn;
- unsigned int rom = dev->rom_address;
+ unsigned int rom = cbfs_load_optionrom(dev->vendor, dev->device, 0);
unsigned char *buf;
unsigned int size = 64*1024;
int i;
===================================================================
@@ -7,6 +7,7 @@
//#include <printk.h>
#include <string.h>
#include "vgachip.h"
+#include <cbfs.h>
/* vgabios.c. Derived from: */
@@ -356,7 +357,7 @@
/* declare rom address here - keep any config data out of the way
* of core LXB stuff */
- rom = 0xfffc0000;
+ rom = (unsigned int)cbfs_load_optionrom(dev->vendor, dev->device, 0);
pci_write_config32(dev, PCI_ROM_ADDRESS, rom|1);
printk_debug("rom base, size: %x\n", rom);
===================================================================
@@ -28,6 +28,7 @@
#undef __KERNEL__
#include <arch/io.h>
#include <string.h>
+#include <cbfs.h>
void write_protect_vgabios(void);
@@ -323,7 +324,7 @@
* of core LXB stuff */
#warning ROM address hardcoded to 512K
- rom = 0xfff80000;
+ rom = (unsigned int)cbfs_load_optionrom(dev->vendor, dev->device, 0);
pci_write_config32(dev, PCI_ROM_ADDRESS, rom | 1);
printk_debug("rom base, size: %x\n", rom);
===================================================================
@@ -7,6 +7,7 @@
//#include <printk.h>
#include <string.h>
#include "vgachip.h"
+#include <cbfs.h>
/* vgabios.c. Derived from: */
@@ -356,7 +357,7 @@
/* declare rom address here - keep any config data out of the way
* of core LXB stuff */
- rom = 0xfff80000;
+ rom = cbfs_load_optionrom(dev->vendor, dev->device, 0);
pci_write_config32(dev, PCI_ROM_ADDRESS, rom|1);
printk_debug("VGA BIOS ROM base address: %x\n", rom);
===================================================================
@@ -6,6 +6,7 @@
#include <arch/io.h>
#include <string.h>
#include "vgachip.h"
+#include <cbfs.h>
/* vgabios.c. Derived from: */
@@ -319,7 +320,7 @@
/* declare rom address here - keep any config data out of the way
* of core LXB stuff */
- rom = 0xffffffff - CONFIG_ROM_SIZE + 1;
+ rom = cbfs_load_optionrom(dev->vendor, dev->device, 0);
pci_write_config32(dev, PCI_ROM_ADDRESS, rom | 1);
printk_debug("rom base: %x\n", rom);
buf = (unsigned char *)rom;
===================================================================
@@ -7,6 +7,7 @@
//#include <printk.h>
#include <string.h>
#include "vgachip.h"
+#include <cbfs.h>
/* vgabios.c. Derived from: */
@@ -356,7 +357,7 @@
/* declare rom address here - keep any config data out of the way
* of core LXB stuff */
- rom = 0xfff80000;
+ rom = cbfs_load_optionrom(dev->vendor, dev->device, 0);
pci_write_config32(dev, PCI_ROM_ADDRESS, rom|1);
printk_debug("rom base, size: %x\n", rom);
Hi, there were a couple of copies of vgabios.c that looked for the option rom image at fixed addresses (usually begin of flash), which is not the supported way of doing things anymore. As this patch removes the non-CBFS capability, I'd commit it right after the removal of non-CBFS support this evening (in ~3 hours), as non-CBFS support isn't necessary anymore at that point. Of course, the duplication should be eliminated, as well as (some of) the rom_address entries in Config.lb and devicetree.cb for the boards. It might also be worthwhile to investigate if src/devices/pci_rom.c couldn't be used for the option rom loading. Just using dev->rom_address didn't work on my board, but this fix was good enough for me for now. The change is the same in all vgabios.c files, it's boot tested on cx700 (via/vt8454c), via/epia-m and artecgroup/dbe61 are build tested. Furthermore, for cn400, via/epia-n built, for cn700, via/epia-cn built, for vx800, via/epia-m700 built Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>