From patchwork Sun Oct 4 12:18:01 2009 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Subject: remove pre-cbfs build system, pt. 2 Date: Sun, 04 Oct 2009 12:18:01 -0000 From: Patrick Georgi X-Patchwork-Id: 329 Message-Id: <1254658681.4077.15.camel@tetris> To: coreboot@coreboot.org Hi, This removes the uses of the buildrom utility and the coreboot.strip intermediate file. Signed-off-by: Patrick Georgi Acked-by: Peter Stuge Index: src/arch/i386/Config.lb =================================================================== --- src/arch/i386/Config.lb.orig 2009-10-04 13:45:55.373687113 +0200 +++ src/arch/i386/Config.lb 2009-10-04 13:47:42.838745240 +0200 @@ -44,16 +44,6 @@ if CONFIG_USE_FAILOVER_IMAGE makedefine COREBOOT_APC:= makedefine COREBOOT_RAM_ROM:= - - makerule coreboot.rom - depends "coreboot.strip" - action "cp $< $@" - end -else - makerule coreboot.rom - depends "coreboot.strip buildrom" - action "./buildrom $< $@ /dev/null $(CONFIG_ROM_IMAGE_SIZE) $(CONFIG_ROM_SECTION_SIZE)" - end end makerule crt0.S Index: src/arch/ppc/Config.lb =================================================================== --- src/arch/ppc/Config.lb.orig 2009-10-04 13:47:46.297690533 +0200 +++ src/arch/ppc/Config.lb 2009-10-04 13:48:53.029686606 +0200 @@ -1,12 +1,7 @@ ldscript init/ldscript.lb -makerule coreboot.strip - depends "coreboot" - action "cp $< $@" -end - makerule coreboot.rom - depends "coreboot.strip" + depends "coreboot" action "cp $< $@" end Index: src/config/Config.lb =================================================================== --- src/config/Config.lb.orig 2009-10-04 13:46:44.865690115 +0200 +++ src/config/Config.lb 2009-10-04 13:48:31.909683271 +0200 @@ -33,9 +33,9 @@ # action "perl -e 'foreach $$var (split(\" \", $$ENV{VARIABLES})) { if ($$ENV{$$var} =~ m/^(0x[0-9a-fA-F]+|0[0-7]+|[0-9]+)$$/) { print \"$$var = $$ENV{$$var};\n\"; }}' > $@" #end -makerule coreboot.strip +makerule coreboot.rom depends "coreboot" - action "$(CONFIG_OBJCOPY) -O binary coreboot coreboot.strip" + action "$(CONFIG_OBJCOPY) -O binary coreboot coreboot.rom" end makerule coreboot.a @@ -133,12 +133,6 @@ action "$(CONFIG_CROSS_COMPILE)objdump -dS coreboot > coreboot.disasm" end -# the buildrom tool -makerule buildrom - depends "$(TOP)/util/buildrom/buildrom.c" - action "$(HOSTCC) -o $@ $<" -end - # Force crt0.s (which has build time version code in it to rebuild every time) makedefine .PHONY : crt0.s makerule crt0.s @@ -204,7 +198,7 @@ action "rm -f ldscript.ld" action "rm -f a.out *.s *.l *.o *.E *.inc" action "rm -f TAGS tags romcc*" - action "rm -f docipl buildrom* chips.c *chip.c coreboot_apc* coreboot_ram* coreboot_pay*" + action "rm -f docipl chips.c *chip.c coreboot_apc* coreboot_ram* coreboot_pay*" action "rm -f build_opt_tbl* nrv2b* option_table.c option_table.h crt0.S crt0.disasm" action "rm -f smm smm.elf smm.map smm_bin.c" action "rm -f dsdt.aml dsdt.c" Index: src/config/coreboot_ram.ld =================================================================== --- src/config/coreboot_ram.ld.orig 2009-10-04 13:47:01.829689687 +0200 +++ src/config/coreboot_ram.ld 2009-10-04 13:47:12.437686635 +0200 @@ -57,7 +57,7 @@ /* * kevinh/Ispiri - Added an align, because the objcopy tool * incorrectly converts sections that are not long word aligned. - * This breaks the coreboot.strip target. + * This breaks the coreboot.rom target. */ . = ALIGN(4);