Patchwork Add board enable for ABIT AV8

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Submitter Christoph Grenz
Date 2011-10-13 18:44:17
Message ID <201110132044.17877.christophg+cb@grenz-bonn.de>
Download mbox | patch
Permalink /patch/3427/
State Accepted
Commit r1455
Headers show

Comments

Christoph Grenz - 2011-10-13 18:44:17
adds board enable for ABIT AV8.

I compared the download pages of both, abit AV8 and abit AV8-3rd Eye, and the 
BIOS downloads are the same. So it's save to assume that this board enable 
works on both revisions of abit AV8. (Tested on AV8)

Signed-off-by: Christoph Grenz <christophg+cb at grenz-bonn.de>
Stefan Reinauer - 2011-10-13 21:10:39
On 10/13/11 11:44 AM, Christoph Grenz wrote:
> ===================================================================
> --- board_enable.c	(Revision 1450)
> +++ board_enable.c	(Arbeitskopie)
> @@ -1830,6 +1830,22 @@
>
>   /*
>    * Suited for:
> + *  - abit AV8: Socket939 + K8T800Pro + VT8237
> + */
> +static int board_abit_av8(void)
> +{
> +	uint8_t val;
> +
> +	/* Raise GPO ports GP22&  GP23 */
> +	val = INB(0x404E);
> +	val |= 0xC0;
> +	OUTB(val, 0x404E);
> +	
> +	return 0;
> +}
> +
It would be better to read out the GPIO base and use offsets to that 
instead of hard coding the IO address.
Christoph Grenz - 2011-10-14 08:52:31
Am Donnerstag, 13. Oktober 2011, um 23:10:39 schrieb Stefan Reinauer:
> It would be better to read out the GPIO base and use offsets to that
> instead of hard coding the IO address.

The IO address is hardcoded in the BIOS image and I couldn't find a reference 
to the base address besides in the DSDT, so it should always be the same. And 
IMO parsing the DSDT would be a little overkill.
Stefan Tauner - 2011-10-21 13:25:10
On Fri, 14 Oct 2011 10:52:31 +0200
Christoph Grenz <christophg+cb@grenz-bonn.de> wrote:

> Am Donnerstag, 13. Oktober 2011, um 23:10:39 schrieb Stefan Reinauer:
> > It would be better to read out the GPIO base and use offsets to that
> > instead of hard coding the IO address.
> 
> The IO address is hardcoded in the BIOS image and I couldn't find a reference 
> to the base address besides in the DSDT, so it should always be the same. And 
> IMO parsing the DSDT would be a little overkill.

and, it is certainly good enough already to be committed. else it will
sit forever in the queue like so many other patches i have cleaned up
in the last months. criticism is valued (thanks for the suggestion
stefan!), but i think it should go in now, hence
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
and committed in r1455.

Thanks for your contribution Christoph and gl in the current semester ;)

Patch

Index: print.c
===================================================================
--- print.c	(Revision 1450)
+++ print.c	(Arbeitskopie)
@@ -535,6 +535,7 @@ 
 #if defined(__i386__) || defined(__x86_64__)
 	B("A-Trend",	"ATC-6220",		1, "http://www.motherboard.cz/mb/atrend/atc6220.htm", NULL),
 	B("abit",	"AN-M2",		1, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?DEFTITLE=Y&fMTYPE=Socket%20AM2&pMODEL_NAME=AN-M2", NULL),
+	B("abit",	"AV8",			1, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?DEFTITLE=Y&fMTYPE=Socket%20939&pMODEL_NAME=AV8", NULL),
 	B("abit",	"AX8",			1, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?DEFTITLE=Y&fMTYPE=Socket%20939&pMODEL_NAME=AX8", NULL),
 	B("abit",	"BM6",			1, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?pMODEL_NAME=BM6&fMTYPE=Socket%20370", NULL),
 	B("abit",	"Fatal1ty F-I90HD",	1, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?pMODEL_NAME=Fatal1ty+F-I90HD&fMTYPE=LGA775", NULL),
Index: board_enable.c
===================================================================
--- board_enable.c	(Revision 1450)
+++ board_enable.c	(Arbeitskopie)
@@ -1830,6 +1830,22 @@ 
 
 /*
  * Suited for:
+ *  - abit AV8: Socket939 + K8T800Pro + VT8237
+ */
+static int board_abit_av8(void)
+{
+	uint8_t val;
+
+	/* Raise GPO ports GP22 & GP23 */
+	val = INB(0x404E);
+	val |= 0xC0;
+	OUTB(val, 0x404E);
+	
+	return 0;
+}
+
+/*
+ * Suited for:
  *  - ASUS A7V333: VIA KT333 + VT8233A + IT8703F
  *  - ASUS A7V8X: VIA KT400 + VT8235 + IT8703F
  */
@@ -1979,6 +1995,7 @@ 
 	/* first pci-id set [4],          second pci-id set [4],          dmi identifier, coreboot id [2],  phase, vendor name,  board name       max_rom_...  OK? flash enable */
 #if defined(__i386__) || defined(__x86_64__)
 	{0x10DE, 0x0547, 0x147B, 0x1C2F,  0x10DE, 0x0548, 0x147B, 0x1C2F, NULL,         NULL, NULL,           P3, "abit",        "AN-M2",                 0,   NT, nvidia_mcp_gpio2_raise},
+	{0x1106, 0x0282, 0x147B, 0x1415,  0x1106, 0x3227, 0x147B, 0x1415, "^AV8 ",      NULL, NULL,           P3, "abit",        "AV8",                   0,   OK, board_abit_av8},
 	{0x8086, 0x7190,      0,      0,  0x8086, 0x7110,      0,      0, "^i440BX-W977 (BM6)$", NULL, NULL,  P3, "abit",        "BM6",                   0,   OK, intel_piix4_gpo26_lower},
 	{0x8086, 0x24d3, 0x147b, 0x1014,  0x8086, 0x2578, 0x147b, 0x1014, NULL,         NULL, NULL,           P3, "abit",        "IC7",                   0,   NT, intel_ich_gpio23_raise},
 	{0x8086, 0x2930, 0x147b, 0x1084,  0x11ab, 0x4364, 0x147b, 0x1084, NULL,         NULL, NULL,           P3, "abit",        "IP35",                  0,   OK, intel_ich_gpio16_raise},